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developer4f0d84b2023-03-03 14:21:44 +08001From 7a1f0d570d96e8e23b771976da052e94def589b9 Mon Sep 17 00:00:00 2001
developere2cc0fa2022-03-29 17:31:03 +08002From: MeiChia Chiu <meichia.chiu@mediatek.com>
developerf64861f2022-06-22 11:44:53 +08003Date: Wed, 22 Jun 2022 10:45:53 +0800
developer9851a292022-12-15 17:33:43 +08004Subject: [PATCH 1004/1009] mt76: mt7915: add support for muru_onoff via
developerbd398d52022-06-06 20:53:24 +08005 debugfs
developere2cc0fa2022-03-29 17:31:03 +08006
7---
developereb2bd8e2023-02-09 11:16:04 +08008 mt7915/init.c | 2 ++
9 mt7915/mcu.c | 12 +++++++++---
developer5ce5ea42022-08-31 14:12:29 +080010 mt7915/mcu.h | 6 ++++++
developereb2bd8e2023-02-09 11:16:04 +080011 mt7915/mt7915.h | 2 ++
developer5ce5ea42022-08-31 14:12:29 +080012 mt7915/mtk_debugfs.c | 33 +++++++++++++++++++++++++++++++++
developereb2bd8e2023-02-09 11:16:04 +080013 5 files changed, 52 insertions(+), 3 deletions(-)
developere2cc0fa2022-03-29 17:31:03 +080014
15diff --git a/mt7915/init.c b/mt7915/init.c
developer4f0d84b2023-03-03 14:21:44 +080016index c27469e4..1177e4e7 100644
developere2cc0fa2022-03-29 17:31:03 +080017--- a/mt7915/init.c
18+++ b/mt7915/init.c
developer4f0d84b2023-03-03 14:21:44 +080019@@ -445,6 +445,8 @@ mt7915_init_wiphy(struct mt7915_phy *phy)
developereb2bd8e2023-02-09 11:16:04 +080020 mphy->leds.cdev.brightness_set = mt7915_led_set_brightness;
21 mphy->leds.cdev.blink_set = mt7915_led_set_blink;
22 }
23+
24+ phy->muru_onoff = OFDMA_DL | MUMIMO_UL | MUMIMO_DL;
developere2cc0fa2022-03-29 17:31:03 +080025 }
26
developereb2bd8e2023-02-09 11:16:04 +080027 static void
developere2cc0fa2022-03-29 17:31:03 +080028diff --git a/mt7915/mcu.c b/mt7915/mcu.c
developer4f0d84b2023-03-03 14:21:44 +080029index 40f77428..b507f14f 100644
developere2cc0fa2022-03-29 17:31:03 +080030--- a/mt7915/mcu.c
31+++ b/mt7915/mcu.c
developereb2bd8e2023-02-09 11:16:04 +080032@@ -864,6 +864,7 @@ mt7915_mcu_sta_muru_tlv(struct mt7915_dev *dev, struct sk_buff *skb,
33 struct ieee80211_sta *sta, struct ieee80211_vif *vif)
34 {
35 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
36+ struct mt7915_phy *phy = mvif->phy;
37 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem;
38 struct sta_rec_muru *muru;
39 struct tlv *tlv;
40@@ -876,13 +877,18 @@ mt7915_mcu_sta_muru_tlv(struct mt7915_dev *dev, struct sk_buff *skb,
developere2cc0fa2022-03-29 17:31:03 +080041
42 muru = (struct sta_rec_muru *)tlv;
43
44- muru->cfg.mimo_dl_en = mvif->cap.he_mu_ebfer ||
developereb6a0182022-12-12 18:53:32 +080045- mvif->cap.vht_mu_ebfer ||
developere2cc0fa2022-03-29 17:31:03 +080046- mvif->cap.vht_mu_ebfee;
developereb6a0182022-12-12 18:53:32 +080047+ muru->cfg.mimo_dl_en = (mvif->cap.he_mu_ebfer ||
48+ mvif->cap.vht_mu_ebfer ||
49+ mvif->cap.vht_mu_ebfee) &&
developereb2bd8e2023-02-09 11:16:04 +080050+ !!(phy->muru_onoff & MUMIMO_DL);
developerf64861f2022-06-22 11:44:53 +080051 if (!is_mt7915(&dev->mt76))
52 muru->cfg.mimo_ul_en = true;
53 muru->cfg.ofdma_dl_en = true;
54
developereb2bd8e2023-02-09 11:16:04 +080055+ muru->cfg.mimo_ul_en = !!(phy->muru_onoff & MUMIMO_UL);
56+ muru->cfg.ofdma_dl_en = !!(phy->muru_onoff & OFDMA_DL);
57+ muru->cfg.ofdma_ul_en = !!(phy->muru_onoff & OFDMA_UL);
developerf64861f2022-06-22 11:44:53 +080058+
developereb6a0182022-12-12 18:53:32 +080059 if (sta->deflink.vht_cap.vht_supported)
developere2cc0fa2022-03-29 17:31:03 +080060 muru->mimo_dl.vht_mu_bfee =
developereb6a0182022-12-12 18:53:32 +080061 !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE);
developere2cc0fa2022-03-29 17:31:03 +080062diff --git a/mt7915/mcu.h b/mt7915/mcu.h
developer4f0d84b2023-03-03 14:21:44 +080063index c776417b..275a0ece 100644
developere2cc0fa2022-03-29 17:31:03 +080064--- a/mt7915/mcu.h
65+++ b/mt7915/mcu.h
developerc04f5402023-02-03 09:22:26 +080066@@ -609,4 +609,10 @@ struct csi_data {
developere2cc0fa2022-03-29 17:31:03 +080067 };
68 #endif
69
70+/* MURU */
developer4721e252022-06-21 16:41:28 +080071+#define OFDMA_DL BIT(0)
72+#define OFDMA_UL BIT(1)
73+#define MUMIMO_DL BIT(2)
74+#define MUMIMO_UL BIT(3)
developere2cc0fa2022-03-29 17:31:03 +080075+
76 #endif
developereb2bd8e2023-02-09 11:16:04 +080077diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h
developer4f0d84b2023-03-03 14:21:44 +080078index df0d7a1e..e94970ba 100644
developereb2bd8e2023-02-09 11:16:04 +080079--- a/mt7915/mt7915.h
80+++ b/mt7915/mt7915.h
81@@ -307,6 +307,8 @@ struct mt7915_phy {
82 u32 rx_ampdu_ts;
83 u32 ampdu_ref;
84
85+ u8 muru_onoff;
86+
87 struct mib_stats mib;
88 struct mt76_channel_state state_ts;
89
developere2cc0fa2022-03-29 17:31:03 +080090diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c
developer4f0d84b2023-03-03 14:21:44 +080091index 530bde1a..824ddeda 100644
developere2cc0fa2022-03-29 17:31:03 +080092--- a/mt7915/mtk_debugfs.c
93+++ b/mt7915/mtk_debugfs.c
developerd75d3632023-01-05 14:31:01 +080094@@ -2558,6 +2558,38 @@ static int mt7915_token_txd_read(struct seq_file *s, void *data)
developere2cc0fa2022-03-29 17:31:03 +080095 return 0;
96 }
97
98+static int mt7915_muru_onoff_get(void *data, u64 *val)
99+{
developereb2bd8e2023-02-09 11:16:04 +0800100+ struct mt7915_phy *phy = data;
developere2cc0fa2022-03-29 17:31:03 +0800101+
developereb2bd8e2023-02-09 11:16:04 +0800102+ *val = phy->muru_onoff;
developere2cc0fa2022-03-29 17:31:03 +0800103+
developereb2bd8e2023-02-09 11:16:04 +0800104+ printk("mumimo ul:%d, mumimo dl:%d, ofdma ul:%d, ofdma dl:%d\n",
105+ !!(phy->muru_onoff & MUMIMO_UL),
106+ !!(phy->muru_onoff & MUMIMO_DL),
107+ !!(phy->muru_onoff & OFDMA_UL),
108+ !!(phy->muru_onoff & OFDMA_DL));
developere2cc0fa2022-03-29 17:31:03 +0800109+
developereb2bd8e2023-02-09 11:16:04 +0800110+ return 0;
developere2cc0fa2022-03-29 17:31:03 +0800111+}
112+
113+static int mt7915_muru_onoff_set(void *data, u64 val)
114+{
developereb2bd8e2023-02-09 11:16:04 +0800115+ struct mt7915_phy *phy = data;
developere2cc0fa2022-03-29 17:31:03 +0800116+
developereb2bd8e2023-02-09 11:16:04 +0800117+ if (val > 15) {
118+ printk("Wrong value! The value is between 0 ~ 15.\n");
119+ goto exit;
120+ }
developere2cc0fa2022-03-29 17:31:03 +0800121+
developereb2bd8e2023-02-09 11:16:04 +0800122+ phy->muru_onoff = val;
developere2cc0fa2022-03-29 17:31:03 +0800123+exit:
developereb2bd8e2023-02-09 11:16:04 +0800124+ return 0;
developere2cc0fa2022-03-29 17:31:03 +0800125+}
126+
127+DEFINE_DEBUGFS_ATTRIBUTE(fops_muru_onoff, mt7915_muru_onoff_get,
developer4721e252022-06-21 16:41:28 +0800128+ mt7915_muru_onoff_set, "%llx\n");
developere2cc0fa2022-03-29 17:31:03 +0800129+
130 static int mt7915_amsduinfo_read(struct seq_file *s, void *data)
131 {
132 struct mt7915_dev *dev = dev_get_drvdata(s->private);
developerd75d3632023-01-05 14:31:01 +0800133@@ -2937,6 +2969,7 @@ int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir)
developere2cc0fa2022-03-29 17:31:03 +0800134
135 mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0);
136
developereb2bd8e2023-02-09 11:16:04 +0800137+ debugfs_create_file("muru_onoff", 0600, dir, phy, &fops_muru_onoff);
developere2cc0fa2022-03-29 17:31:03 +0800138 debugfs_create_file("fw_debug_module", 0600, dir, dev,
139 &fops_fw_debug_module);
140 debugfs_create_file("fw_debug_level", 0600, dir, dev,
141--
developer4f0d84b2023-03-03 14:21:44 +08001422.18.0
developere2cc0fa2022-03-29 17:31:03 +0800143