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filogic
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uboot
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685dc1b19e08d47545a4874eaa393846f6db741d
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arch
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arm
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mach-socfpga
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include
da13a0a
arm: socfpga: fix SPL booting from fpga OnChip RAM
by Simon Goldschmidt
· Wed Oct 10 14:55:23 2018 +0200
2e75a74
arm: socfpga: Remove unused function socfpga_emac_manage_reset()
by Ley Foon Tan
· Fri Sep 21 00:22:14 2018 +0800
897dbd7
socfpga: stratix10: fix sdram_calculate_size
by Dalon Westergreen
· Tue Sep 11 10:06:14 2018 -0700
8fdb419
ARM: socfpga: Reorder Arria10 SPL
by Marek Vasut
· Sat Aug 18 19:11:52 2018 +0200
7ebd938
arm: socfpga: Fix SYSMGR_FPGAINTF_EMACx bit mask
by Ley Foon Tan
· Thu Aug 16 02:20:17 2018 +0800
71b1637
ARM: socfpga: clk: Convert to clock framework
by Marek Vasut
· Mon Aug 06 21:42:05 2018 +0200
40ca091
ARM: socfpga: Zap unused reset code
by Marek Vasut
· Mon Aug 13 18:57:08 2018 +0200
8b73c87
ARM: socfpga: Zap all the UART handling complexity
by Marek Vasut
· Sun Apr 15 16:29:12 2018 +0200
8e30203
arm: socfpga: gen5: combine some init code for SPL and U-Boot
by Simon Goldschmidt
· Mon Aug 13 21:34:35 2018 +0200
f9c7f79
ddr: altera: stratix10: Add DDR support for Stratix10 SoC
by Ley Foon Tan
· Thu May 24 00:17:30 2018 +0800
975e496
arm: socfpga: stratix10: Add SPL driver for Stratix10 SoC
by Ley Foon Tan
· Thu May 24 00:17:28 2018 +0800
e5b6a66
arm: socfpga: stratix10: Add mailbox support for Stratix10 SoC
by Ley Foon Tan
· Thu May 24 00:17:25 2018 +0800
4cc6b58
arm: socfpga: misc: Move bridge command to misc common
by Ley Foon Tan
· Thu May 24 00:17:23 2018 +0800
4606fc7
SPDX: Fixup SPDX tags in a few new files
by Tom Rini
· Sun May 20 09:47:45 2018 -0400
7cdb912
arm: socfpga: stratix10: Add pinmux support for Stratix10 SoC
by Ley Foon Tan
· Fri May 18 22:05:24 2018 +0800
449cbae
arm: socfpga: stratix10: Add reset manager driver for Stratix10 SoC
by Ley Foon Tan
· Fri May 18 22:05:23 2018 +0800
6751e7d
arm: socfpga: stratix10: Add clock manager driver for Stratix10 SoC
by Ley Foon Tan
· Fri May 18 22:05:22 2018 +0800
a61fd02
arm: socfpga: stratix10: Add watchdog and firewall base addresses
by Ley Foon Tan
· Fri May 18 22:05:21 2018 +0800
d5fba89
ARM: socfpga: Fix Documentation errors in scu_registers
by Ben Kalo
· Tue May 15 19:45:37 2018 +0300
402735b
ARM: socfpga: Add DDR driver for Arria 10
by Tien Fong Chee
· Tue Dec 05 15:58:02 2017 +0800
38fad17
ARM: socfpga: Rename the gen5 sdram driver to more specific name
by Tien Fong Chee
· Tue Dec 05 15:58:00 2017 +0800
3386c85
ARM: socfpga: Repair A10 EMAC reset handling
by Marek Vasut
· Mon Apr 23 22:49:31 2018 +0200
ec472e0
ARM: socfpga: Sync A10 clock manager binding parser
by Marek Vasut
· Sat May 12 00:09:21 2018 +0200
0d5abc9
ARM: socfpga: Zap CONFIG_SOCFPGA_VIRTUAL_TARGET
by Marek Vasut
· Mon Apr 23 01:26:10 2018 +0200
323f9de
ARM: socfpga: Add boot trampoline for Arria10
by Marek Vasut
· Sun Apr 15 13:15:33 2018 +0200
10e4779
SPDX: Convert all of our single license tags to Linux Kernel style
by Tom Rini
· Sun May 06 17:58:06 2018 -0400
2c828e3
arm: socfpga: stratix10: Add base address map for Statix10 SoC
by Chin Liang See
· Thu Mar 08 21:39:24 2018 -0600
85bd93d
socfpga: boot0 hook: adjust to unified boot0 semantics
by Philipp Tomsich
· Tue Oct 10 16:21:07 2017 +0200
1d675f3
arm: socfpga: Add FPGA driver support for Arria 10
by Tien Fong Chee
· Wed Jul 26 13:05:43 2017 +0800
31e50f4
arm: socfpga: Restructure FPGA driver in the preparation to support A10
by Tien Fong Chee
· Wed Jul 26 13:05:38 2017 +0800
7b7b625
arm: socfpga: Remove unused passing parameter of socfpga_bridges_reset
by Tien Fong Chee
· Wed Jul 26 13:05:37 2017 +0800
cfd0c54
arm: socfpga: Add misc support for Arria 10
by Ley Foon Tan
· Wed Apr 26 02:44:43 2017 +0800
9ea8c5b
arm: socfpga: Add pinmux for Arria 10
by Ley Foon Tan
· Wed Apr 26 02:44:42 2017 +0800
d33c203
arm: socfpga: Add sdram header file for Arria 10
by Ley Foon Tan
· Wed Apr 26 02:44:41 2017 +0800
c3b4963
arm: socfpga: Add system manager for Arria 10
by Ley Foon Tan
· Wed Apr 26 02:44:40 2017 +0800
ca40f29
arm: socfpga: Add clock driver for Arria 10
by Ley Foon Tan
· Wed Apr 26 02:44:39 2017 +0800
778ed2c
arm: socfpga: Add reset driver support for Arria 10
by Ley Foon Tan
· Wed Apr 26 02:44:38 2017 +0800
05e8629
arm: socfpga: Add A10 macros
by Ley Foon Tan
· Wed Apr 26 02:44:37 2017 +0800
b149f2b
arm: socfpga: Restructure misc driver
by Ley Foon Tan
· Wed Apr 26 02:44:36 2017 +0800
d5c5e3b
arm: socfpga: Restructure system manager
by Ley Foon Tan
· Wed Apr 26 02:44:35 2017 +0800
dd5d12d
arm: socfpga: Restructure reset manager driver
by Ley Foon Tan
· Wed Apr 26 02:44:34 2017 +0800
ec6f882
arm: socfpga: Restructure clock manager driver
by Ley Foon Tan
· Wed Apr 26 02:44:33 2017 +0800
19869ea
ARM: socfpga: boot0 hook: remove macro from boot0 header file
by Chee, Tien Fong
· Wed Mar 29 11:49:16 2017 +0800
2492b9f
arm: socfpga: set the mpuclk divider in the Altera group register
by Dinh Nguyen
· Tue Jan 31 12:33:08 2017 -0600
bcd861b
ARM: socfpga: Add boot0 hook to prevent SPL corruption
by Marek Vasut
· Wed Nov 16 17:20:23 2016 +0100
3ea5951
ddr: altera: Configuring SDRAM extra cycles timing parameters
by Chin Liang See
· Wed Sep 21 10:25:56 2016 +0800
734c066
arm: socfpga: Nuke useless include
by Marek Vasut
· Sat Mar 19 18:59:11 2016 +0100
8dcb5c5
arm: socfpga: Define NAND reset bit
by Marek Vasut
· Sun Dec 20 04:00:41 2015 +0100
c4b66c4
arm: socfpga: fix up a questionable macro for SDMMC
by Dinh Nguyen
· Wed Dec 02 13:31:33 2015 -0600
eca8b5c
ARM: socfpga: rename the cyclone5 and arria5 base address file
by Dinh Nguyen
· Mon Nov 23 17:27:17 2015 -0600
b1f95d6
ARM: socfpga: arria10: add base address map for Arria10
by Dinh Nguyen
· Mon Nov 23 17:27:16 2015 -0600
e3f7a45
arm: socfpga: reset: FIX address of tstscratch register
by Philipp Rosenberger
· Thu Nov 12 18:23:10 2015 +0100
200f0c5
arm: socfpga: reset: correct dma, qspi, and sdmmc reset bit defines
by Dinh Nguyen
· Mon Nov 02 17:11:21 2015 -0600
1749723
mmc: dw_mmc: Probe the MMC from OF
by Marek Vasut
· Sat Jul 25 10:48:14 2015 +0200
7b64873
arm: socfpga: Make the pinmux table const u8
by Marek Vasut
· Mon Aug 10 22:17:46 2015 +0200
b640cae
arm: socfpga: scan: Add code to get FPGA ID
by Dinh Nguyen
· Fri Jul 31 11:06:50 2015 -0500
65371c8
arm: socfpga: scan: Clean up horrible macros
by Marek Vasut
· Sat Aug 01 03:18:50 2015 +0200
24d12ec
arm: socfpga: scan: Clean up scan_chain_engine_is_idle()
by Marek Vasut
· Sat Aug 01 02:48:03 2015 +0200
f00a6ea
ddr: altera: sequencer: Wrap misc remaining macros
by Marek Vasut
· Sun Aug 02 19:18:47 2015 +0200
3bf9204
ddr: altera: sequencer: Wrap IO_* macros
by Marek Vasut
· Sun Aug 02 19:00:23 2015 +0200
39b620e
ddr: altera: sequencer: Wrap RW_MGR_* macros
by Marek Vasut
· Sun Aug 02 18:12:08 2015 +0200
3384e74
ddr: altera: sequencer: Wrap ac_rom_init and inst_rom_init
by Marek Vasut
· Sun Aug 02 17:15:19 2015 +0200
14c5d9a
ddr: altera: sequencer: Clean up mach/sdram.h
by Marek Vasut
· Sun Aug 02 17:02:11 2015 +0200
32ada57
ddr: altera: sdram: Introduce socfpga_sdram_get_config()
by Marek Vasut
· Sat Aug 01 21:35:18 2015 +0200
1b1cc10
ddr: altera: sdram: Clean up sdram_mmr_init_full() part 8
by Marek Vasut
· Sat Aug 01 22:25:29 2015 +0200
33acf0f
ddr: altera: Wrap SOCFPGA_SDR_ADDRESS into SDR_PHYGRP.*ADDRESS
by Marek Vasut
· Sun Jul 12 20:05:54 2015 +0200
1100e34
arm: socfpga: system: Clean up pinmux_config.c
by Marek Vasut
· Sat Jul 25 11:09:11 2015 +0200
8306b1e
arm: socfpga: system: Rework sysmgr_enable_warmrstcfgio()
by Marek Vasut
· Thu Jul 09 04:40:11 2015 +0200
9c3e006
arm: socfpga: scan: Zap iocsr_scan_chain*_table()
by Marek Vasut
· Sat Jul 25 09:53:23 2015 +0200
b4c1a00
arm: socfpga: scan: Staticize scan_mgr_io_scan_chain_prg()
by Marek Vasut
· Sat Jul 25 09:33:28 2015 +0200
084d06c
arm: socfpga: clock: Clean up pll_config.h
by Marek Vasut
· Sat Jul 25 08:44:27 2015 +0200
940077d
arm: socfpga: clock: Get rid of cm_config_t typedef
by Marek Vasut
· Sat Jul 25 08:37:16 2015 +0200
fc31d6e
arm: socfpga: reset: Add SDMMC, QSPI and DMA defines
by Marek Vasut
· Thu Jul 09 04:28:13 2015 +0200
49edbd4
arm: socfpga: reset: Add function to reset add peripherals
by Marek Vasut
· Thu Jul 09 04:27:28 2015 +0200
75f6b5c
arm: socfpga: reset: Replace ad-hoc reset functions
by Marek Vasut
· Thu Jul 09 02:51:56 2015 +0200
3425eeb
arm: socfpga: reset: Implement unified function to toggle reset
by Marek Vasut
· Thu Jul 09 02:45:15 2015 +0200
bb1f889
arm: socfpga: reset: Start reworking the SoCFPGA reset manager
by Marek Vasut
· Thu Jul 09 02:30:35 2015 +0200
ab8f13f
arm: socfpga: reset: Add missing reset manager regs
by Marek Vasut
· Thu Jul 09 03:39:06 2015 +0200
e08c559
ddr: altera: Move struct sdram_prot_rule prototype
by Marek Vasut
· Sun Jul 26 10:37:54 2015 +0200
43bb47e
arm: socfpga: Move sdram_config.h to board dir
by Marek Vasut
· Sun Jul 12 15:59:10 2015 +0200
429642c
driver/ddr/altera: Add DDR driver for Altera's SDRAM controller
by Dinh Nguyen
· Tue Jun 02 22:52:48 2015 -0500
cfcf5d6
ARM: socfpga: move SoC headers to mach-socfpga/include/mach
by Masahiro Yamada
· Tue Apr 21 20:38:22 2015 +0900