| commit | 200f0c58124e966c9427c30902ae3e12a69b6167 | [log] [tgz] |
|---|---|---|
| author | Dinh Nguyen <dinguyen@opensource.altera.com> | Mon Nov 02 17:11:21 2015 -0600 |
| committer | Marek Vasut <marex@denx.de> | Tue Nov 03 17:32:16 2015 +0100 |
| tree | d1ace21fa5e8986683e6fbb282a8af07575869c0 | |
| parent | 6a45b045877756d6bbee13e5c765d54b34bf85ae [diff] |
arm: socfpga: reset: correct dma, qspi, and sdmmc reset bit defines The DMA, QSPI, and SD/MMC reset bits are located in the permodrst register, not the mpumodrst. So the bank for these reset bits should be 1, not 0. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>