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git01.mediatek.com / filogic / uboot / fe61a3529c416f35d29611e565f99eaada357a32 / . / arch / arm / dts / rk3399-u-boot.dtsi
blob: bd7527dde22311b49c919df0601b849c930e988c [file] [log] [blame]
Jagan Teki208badd2019-03-11 13:50:03 +0530[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
4 */
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]5#include "rockchip-u-boot.dtsi"
6
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]7/ {
8 aliases {
9 mmc0 = &sdhci;
10 mmc1 = &sdmmc;
Jagan Teki77c31a82020-05-09 22:26:23 +0530[diff] [blame]11 pci0 = &pcie0;
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]12 spi1 = &spi1;
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]13 };
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]14
Jonas Karlman747c9572024-04-30 15:30:18 +0000[diff] [blame]15 chosen {
16 u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
17 };
18
Jonas Karlman47f7e5f2024-04-30 15:30:20 +0000[diff] [blame]19 pmusgrf: syscon@ff330000 {
20 compatible = "rockchip,rk3399-pmusgrf", "syscon";
21 reg = <0x0 0xff330000 0x0 0xe3d4>;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]22 bootph-all;
Jonas Karlman47f7e5f2024-04-30 15:30:20 +0000[diff] [blame]23 };
24
25 cic: syscon@ff620000 {
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]26 compatible = "rockchip,rk3399-cic", "syscon";
27 reg = <0x0 0xff620000 0x0 0x100>;
Jonas Karlman47f7e5f2024-04-30 15:30:20 +0000[diff] [blame]28 bootph-all;
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]29 };
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]30};
31
Quentin Schulz12df9cf2022-09-02 15:10:54 +0200[diff] [blame]32#if defined(CONFIG_ROCKCHIP_SPI_IMAGE) && defined(CONFIG_HAS_ROM)
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]33&binman {
Simon Glassf1268222023-01-07 14:07:17 -0700[diff] [blame]34 multiple-images;
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]35 rom {
36 filename = "u-boot.rom";
37 size = <0x400000>;
38 pad-byte = <0xff>;
39
40 mkimage {
41 args = "-n rk3399 -T rkspi";
Jonas Karlmanfe61a352024-12-12 23:57:11 +0000[diff] [blame^]42 multiple-data-files;
43#ifdef CONFIG_ROCKCHIP_EXTERNAL_TPL
44 rockchip-tpl {
45 };
46#elif defined(CONFIG_TPL)
47 u-boot-tpl {
48 };
49#endif
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]50 u-boot-spl {
51 };
52 };
53 u-boot-img {
Jonas Karlman1f3294b2024-12-12 23:57:09 +0000[diff] [blame]54 offset = <CONFIG_SYS_SPI_U_BOOT_OFFS>;
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]55 };
56 u-boot {
57 offset = <0x300000>;
58 };
59 fdtmap {
60 };
61 };
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]62};
Simon Glassf1268222023-01-07 14:07:17 -0700[diff] [blame]63#endif /* CONFIG_ROCKCHIP_SPI_IMAGE && CONFIG_HAS_ROM */
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]64
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]65&cru {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]66 bootph-all;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]67};
68
Jonas Karlmane872ddc2024-05-01 16:22:22 +0000[diff] [blame]69&dfi {
70 bootph-all;
71};
72
73&dmc {
74 reg = <0x0 0xffa80000 0x0 0x0800
75 0x0 0xffa80800 0x0 0x1800
76 0x0 0xffa82000 0x0 0x2000
77 0x0 0xffa84000 0x0 0x1000
78 0x0 0xffa88000 0x0 0x0800
79 0x0 0xffa88800 0x0 0x1800
80 0x0 0xffa8a000 0x0 0x2000
81 0x0 0xffa8c000 0x0 0x1000>;
82 bootph-all;
83 status = "okay";
84};
85
Yifeng Zhaod7e4c322021-11-01 12:43:47 +0800[diff] [blame]86&emmc_phy {
Jonas Karlman6a6b4f52024-04-30 15:30:24 +0000[diff] [blame]87 bootph-pre-ram;
88 bootph-some-ram;
Yifeng Zhaod7e4c322021-11-01 12:43:47 +0800[diff] [blame]89};
90
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]91&grf {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]92 bootph-all;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]93};
94
Jonas Karlman6a6b4f52024-04-30 15:30:24 +0000[diff] [blame]95&pcfg_pull_none {
96 bootph-all;
97};
98
99&pcfg_pull_up {
100 bootph-all;
101};
102
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]103&pinctrl {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]104 bootph-all;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]105};
106
Jagan Teki9b545852019-07-16 17:27:34 +0530[diff] [blame]107&pmu {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]108 bootph-all;
Jagan Teki9b545852019-07-16 17:27:34 +0530[diff] [blame]109};
110
Jonas Karlman47f7e5f2024-04-30 15:30:20 +0000[diff] [blame]111&pmucru {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]112 bootph-all;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]113};
114
Jonas Karlman47f7e5f2024-04-30 15:30:20 +0000[diff] [blame]115&pmugrf {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]116 bootph-all;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]117};
118
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]119&sdhci {
Jonas Karlman6a6b4f52024-04-30 15:30:24 +0000[diff] [blame]120 bootph-pre-ram;
121 bootph-some-ram;
Jonas Karlman47f7e5f2024-04-30 15:30:20 +0000[diff] [blame]122 max-frequency = <200000000>;
123
124 /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
Jonas Karlmanf79c5372023-05-06 17:41:11 +0000[diff] [blame]125 u-boot,spl-fifo-mode;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]126};
127
Jagan Teki208badd2019-03-11 13:50:03 +0530[diff] [blame]128&sdmmc {
Jonas Karlman6a6b4f52024-04-30 15:30:24 +0000[diff] [blame]129 bootph-pre-ram;
130 bootph-some-ram;
Deepak Das4ef2ded2020-04-15 08:55:24 +0530[diff] [blame]131
132 /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
133 u-boot,spl-fifo-mode;
Jagan Teki208badd2019-03-11 13:50:03 +0530[diff] [blame]134};
Jagan Teki60c5fed2019-05-07 23:51:51 +0530[diff] [blame]135
Jonas Karlman6a6b4f52024-04-30 15:30:24 +0000[diff] [blame]136&sdmmc_bus4 {
137 bootph-pre-ram;
138 bootph-some-ram;
139};
140
141&sdmmc_cd {
142 bootph-pre-ram;
143 bootph-some-ram;
144};
145
146&sdmmc_clk {
147 bootph-pre-ram;
148 bootph-some-ram;
149};
150
151&sdmmc_cmd {
152 bootph-pre-ram;
153 bootph-some-ram;
154};
155
Quentin Schulz419beef2024-06-17 15:10:08 +0200[diff] [blame]156&spi1 {
157 bootph-pre-ram;
158 bootph-some-ram;
159};
160
Jonas Karlman6a6b4f52024-04-30 15:30:24 +0000[diff] [blame]161&spi1_clk {
162 bootph-pre-ram;
163 bootph-some-ram;
164};
165
166&spi1_cs0 {
167 bootph-pre-ram;
168 bootph-some-ram;
169};
170
171&spi1_rx {
172 bootph-pre-ram;
173 bootph-some-ram;
174};
175
176&spi1_tx {
177 bootph-pre-ram;
178 bootph-some-ram;
Jagan Teki60c5fed2019-05-07 23:51:51 +0530[diff] [blame]179};
Jagan Teki2ff51fd2019-06-21 00:25:02 +0530[diff] [blame]180
Jagan Teki2ff51fd2019-06-21 00:25:02 +0530[diff] [blame]181&uart2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]182 bootph-all;
Jonas Karlmanfab0bd32024-04-30 15:30:23 +0000[diff] [blame]183 clock-frequency = <24000000>;
184};
185
186&uart2c_xfer {
187 bootph-pre-sram;
188 bootph-pre-ram;
Jagan Teki2ff51fd2019-06-21 00:25:02 +0530[diff] [blame]189};
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]190
191&vopb {
Jonas Karlman98519912024-04-30 15:30:21 +0000[diff] [blame]192 bootph-some-ram;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]193};
194
195&vopl {
Jonas Karlman98519912024-04-30 15:30:21 +0000[diff] [blame]196 bootph-some-ram;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]197};
Jonas Karlmane872ddc2024-05-01 16:22:22 +0000[diff] [blame]198
199&xin24m {
200 bootph-all;
201};