rockchip: rk3399: Sync SoC DT from Linux kernel v6.8

Sync RK3399 SoC common .dtsi-files from Linux kernel v6.8.

The ethernet0 alias is moved to rk3399-u-boot.dtsi in this patch, the
alias will be added in board specific .dts-files and finally removed
from rk3399-u-boot.dtsi in following patches.

The rng node is replaced with crypto0 and crypto1, both can supply
random numbers.

There is no other intended change with this patch.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 0357d62..6af9621 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -2,12 +2,11 @@
 /*
  * Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
  */
-#define USB_CLASS_HUB			9
-
 #include "rockchip-u-boot.dtsi"
 
 / {
 	aliases {
+		ethernet0 = &gmac;
 		mmc0 = &sdhci;
 		mmc1 = &sdmmc;
 		pci0 = &pcie0;
@@ -29,37 +28,6 @@
 		reg = <0x0 0xff620000 0x0 0x100>;
 		bootph-all;
 	};
-
-	dfi: dfi@ff630000 {
-		reg = <0x00 0xff630000 0x00 0x4000>;
-		compatible = "rockchip,rk3399-dfi";
-		rockchip,pmu = <&pmugrf>;
-		clocks = <&cru PCLK_DDR_MON>;
-		clock-names = "pclk_ddr_mon";
-		bootph-all;
-	};
-
-	rng: rng@ff8b8000 {
-		compatible = "rockchip,rk3399-crypto";
-		reg = <0x0 0xff8b8000 0x0 0x1000>;
-	};
-
-	dmc: dmc {
-		compatible = "rockchip,rk3399-dmc";
-		reg = <0x0 0xffa80000 0x0 0x0800
-		       0x0 0xffa80800 0x0 0x1800
-		       0x0 0xffa82000 0x0 0x2000
-		       0x0 0xffa84000 0x0 0x1000
-		       0x0 0xffa88000 0x0 0x0800
-		       0x0 0xffa88800 0x0 0x1800
-		       0x0 0xffa8a000 0x0 0x2000
-		       0x0 0xffa8c000 0x0 0x1000>;
-		devfreq-events = <&dfi>;
-		interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
-		clocks = <&cru SCLK_DDRC>;
-		clock-names = "dmc_clk";
-		bootph-all;
-	};
 };
 
 #if defined(CONFIG_ROCKCHIP_SPI_IMAGE) && defined(CONFIG_HAS_ROM)
@@ -91,6 +59,23 @@
 	bootph-all;
 };
 
+&dfi {
+	bootph-all;
+};
+
+&dmc {
+	reg = <0x0 0xffa80000 0x0 0x0800
+	       0x0 0xffa80800 0x0 0x1800
+	       0x0 0xffa82000 0x0 0x2000
+	       0x0 0xffa84000 0x0 0x1000
+	       0x0 0xffa88000 0x0 0x0800
+	       0x0 0xffa88800 0x0 0x1800
+	       0x0 0xffa8a000 0x0 0x2000
+	       0x0 0xffa8c000 0x0 0x1000>;
+	bootph-all;
+	status = "okay";
+};
+
 &emmc_phy {
 	bootph-pre-ram;
 	bootph-some-ram;
@@ -198,3 +183,7 @@
 &vopl {
 	bootph-some-ram;
 };
+
+&xin24m {
+	bootph-all;
+};