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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Ian Campbell6efe3692014-05-05 11:52:26 +01002/*
3 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
4 *
5 * (C) Copyright 2007-2011
6 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
7 * Tom Cubie <tangliang@allwinnertech.com>
8 *
9 * Configuration settings for the Allwinner sunxi series of boards.
Ian Campbell6efe3692014-05-05 11:52:26 +010010 */
11
12#ifndef _SUNXI_COMMON_CONFIG_H
13#define _SUNXI_COMMON_CONFIG_H
14
Hans de Goede22a1a532015-09-13 17:29:33 +020015#include <asm/arch/cpu.h>
Hans de Goeded241ecf2015-05-19 22:12:31 +020016#include <linux/stringify.h>
17
Ian Campbell6efe3692014-05-05 11:52:26 +010018/* Serial & console */
Ian Campbell6efe3692014-05-05 11:52:26 +010019#define CONFIG_SYS_NS16550_SERIAL
20/* ns16550 reg in the low bits of cpu reg */
Icenowy Zhengb00ef022022-01-29 10:23:06 -050021#ifdef CONFIG_MACH_SUNIV
22/* suniv doesn't have apb2 and uart is connected to apb1 */
23#define CONFIG_SYS_NS16550_CLK 100000000
24#else
Ian Campbell6efe3692014-05-05 11:52:26 +010025#define CONFIG_SYS_NS16550_CLK 24000000
Icenowy Zhengb00ef022022-01-29 10:23:06 -050026#endif
Thomas Chou00ad1f02015-11-19 21:48:13 +080027#ifndef CONFIG_DM_SERIAL
Simon Glass66648982014-10-30 20:25:50 -060028# define CONFIG_SYS_NS16550_REG_SIZE -4
29# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
30# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
31# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
32# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
33# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
34#endif
Ian Campbell6efe3692014-05-05 11:52:26 +010035
Paul Kocialkowskide05f942015-05-16 19:52:11 +020036/* CPU */
Paul Kocialkowskide05f942015-05-16 19:52:11 +020037
Hans de Goeded241ecf2015-05-19 22:12:31 +020038/*
39 * The DRAM Base differs between some models. We cannot use macros for the
40 * CONFIG_FOO defines which contain the DRAM base address since they end
41 * up unexpanded in include/autoconf.mk .
42 *
43 * So we have to have this #ifdef #else #endif block for these.
44 */
45#ifdef CONFIG_MACH_SUN9I
46#define SDRAM_OFFSET(x) 0x2##x
47#define CONFIG_SYS_SDRAM_BASE 0x20000000
Icenowy Zhengb00ef022022-01-29 10:23:06 -050048#elif defined(CONFIG_MACH_SUNIV)
49#define SDRAM_OFFSET(x) 0x8##x
50#define CONFIG_SYS_SDRAM_BASE 0x80000000
Hans de Goeded241ecf2015-05-19 22:12:31 +020051#else
52#define SDRAM_OFFSET(x) 0x4##x
Ian Campbell6efe3692014-05-05 11:52:26 +010053#define CONFIG_SYS_SDRAM_BASE 0x40000000
Icenowy Zheng52e61882017-04-08 15:30:12 +080054/* V3s do not have enough memory to place code at 0x4a000000 */
Hans de Goeded241ecf2015-05-19 22:12:31 +020055#endif
56
Hans de Goede0b95a282015-05-20 15:27:16 +020057/*
58 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
59 * slightly bigger. Note that it is possible to map the first 32 KiB of the
60 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
61 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
62 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
Icenowy Zheng5e6dd272018-07-21 16:20:20 +080063 * A64 and H5 also has SRAM A1 at 0x00010000, but no magic remap register
64 * is known yet.
65 * H6 has SRAM A1 at 0x00020000.
Hans de Goede0b95a282015-05-20 15:27:16 +020066 */
Icenowy Zheng5e6dd272018-07-21 16:20:20 +080067#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SUNXI_SRAM_ADDRESS
68/* FIXME: this may be larger on some SoCs */
69#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
Ian Campbell6efe3692014-05-05 11:52:26 +010070
Ian Campbell6efe3692014-05-05 11:52:26 +010071#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
72#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
73
Hans de Goede3ce35f92015-08-16 14:48:22 +020074#ifdef CONFIG_NAND_SUNXI
Boris Brezillon94754ad2016-06-15 21:09:27 +020075#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
Piotr Zierhoffere2b662b2015-07-23 14:33:03 +020076#endif
77
Ian Campbellb4e9f2f2014-05-05 14:42:31 +010078/* mmc config */
Ian Campbellb4e9f2f2014-05-05 14:42:31 +010079#define CONFIG_MMC_SUNXI_SLOT 0
Maxime Ripardd780cdc2017-02-27 18:22:03 +010080
Ian Campbell6efe3692014-05-05 11:52:26 +010081/*
82 * Miscellaneous configurable options
83 */
Ian Campbell6efe3692014-05-05 11:52:26 +010084
Ian Campbell6efe3692014-05-05 11:52:26 +010085/* standalone support */
Hans de Goeded241ecf2015-05-19 22:12:31 +020086#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
Ian Campbell6efe3692014-05-05 11:52:26 +010087
Ian Campbell6efe3692014-05-05 11:52:26 +010088/* FLASH and environment organization */
89
Icenowy Zheng5e6dd272018-07-21 16:20:20 +080090/*
91 * We cannot use expressions here, because expressions won't be evaluated in
92 * autoconf.mk.
93 */
94#if CONFIG_SUNXI_SRAM_ADDRESS == 0x10000
Andre Przywaracced7482017-04-26 01:32:42 +010095#ifdef CONFIG_ARM64
96/* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */
97#define LOW_LEVEL_SRAM_STACK 0x00054000
98#else
Andre Przywarade454ec2017-02-16 01:20:23 +000099#define LOW_LEVEL_SRAM_STACK 0x00018000
Andre Przywaracced7482017-04-26 01:32:42 +0100100#endif /* !CONFIG_ARM64 */
Icenowy Zheng73210762018-07-21 16:20:24 +0800101#elif CONFIG_SUNXI_SRAM_ADDRESS == 0x20000
Jernej Skrabece638e052021-01-11 21:11:46 +0100102#ifdef CONFIG_MACH_SUN50I_H616
Jernej Skrabece638e052021-01-11 21:11:46 +0100103#define LOW_LEVEL_SRAM_STACK 0x58000
104#else
Icenowy Zheng73210762018-07-21 16:20:24 +0800105/* end of SRAM A2 on H6 for now */
106#define LOW_LEVEL_SRAM_STACK 0x00118000
Jernej Skrabece638e052021-01-11 21:11:46 +0100107#endif
Siarhei Siamashka26c50fb2016-03-29 17:29:10 +0200108#else
Andre Przywarade454ec2017-02-16 01:20:23 +0000109#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
Siarhei Siamashka26c50fb2016-03-29 17:29:10 +0200110#endif
Ian Campbell140d8322014-05-05 11:52:30 +0100111
Hans de Goede73d7d422014-06-09 11:37:00 +0200112/* Ethernet support */
Hans de Goede73d7d422014-06-09 11:37:00 +0200113
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100114#ifdef CONFIG_ARM64
115/*
116 * Boards seem to come with at least 512MB of DRAM.
117 * The kernel should go at 512K, which is the default text offset (that will
118 * be adjusted at runtime if needed).
119 * There is no compression for arm64 kernels (yet), so leave some space
120 * for really big kernels, say 256MB for now.
121 * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100122 */
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100123#define BOOTM_SIZE __stringify(0xa000000)
124#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000))
Arnaud Ferrarisd08e1292021-02-20 13:14:15 +0100125#define KERNEL_COMP_ADDR_R __stringify(SDRAM_OFFSET(4000000))
126#define KERNEL_COMP_SIZE __stringify(0xb000000)
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100127#define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000))
128#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000))
129#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000))
130#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(FE00000))
131#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FF00000))
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100132
Andre Przywaraa2860fb2022-07-03 00:47:20 +0100133#elif (CONFIG_SUNXI_MINIMUM_DRAM_MB >= 256)
134/*
135 * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
136 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
137 * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end.
138 */
139#define BOOTM_SIZE __stringify(0xa000000)
140#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
141#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
142#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
143#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
144#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(3300000))
145#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3400000))
146
147#elif (CONFIG_SUNXI_MINIMUM_DRAM_MB >= 64)
Icenowy Zhengb00ef022022-01-29 10:23:06 -0500148/*
149 * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc.
150 * 16M uncompressed kernel, 8M compressed kernel, 1M fdt,
151 * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end.
152 */
153#define BOOTM_SIZE __stringify(0x2e00000)
154#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000))
155#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000))
156#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000))
157#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000))
158#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(1B00000))
159#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1C00000))
160
Andre Przywaraa2860fb2022-07-03 00:47:20 +0100161#elif (CONFIG_SUNXI_MINIMUM_DRAM_MB >= 32)
Icenowy Zhengb00ef022022-01-29 10:23:06 -0500162/*
Andre Przywara7bf64ec2022-10-06 18:16:34 +0100163 * 32M RAM minus 2.5MB for u-boot, heap, stack, etc.
164 * 16M uncompressed kernel, 7M compressed kernel, 128K fdt, 64K script,
165 * 128K DT overlay, 128K PXE and the ramdisk in the rest (max. 5MB)
Icenowy Zhengb00ef022022-01-29 10:23:06 -0500166 */
167#define BOOTM_SIZE __stringify(0x1700000)
Andre Przywara7bf64ec2022-10-06 18:16:34 +0100168#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000))
169#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1d50000))
170#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1d40000))
171#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1d00000))
172#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(1d20000))
173#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1800000))
Icenowy Zhengb00ef022022-01-29 10:23:06 -0500174
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100175#else
Andre Przywaraa2860fb2022-07-03 00:47:20 +0100176#error Need at least 32MB of DRAM. Please adjust load addresses.
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100177#endif
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200178
Hans de Goede2f60c312014-08-01 09:37:58 +0200179#define MEM_LAYOUT_ENV_SETTINGS \
Icenowy Zheng52e61882017-04-08 15:30:12 +0800180 "bootm_size=" BOOTM_SIZE "\0" \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200181 "kernel_addr_r=" KERNEL_ADDR_R "\0" \
182 "fdt_addr_r=" FDT_ADDR_R "\0" \
183 "scriptaddr=" SCRIPT_ADDR_R "\0" \
184 "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100185 "fdtoverlay_addr_r=" FDTOVERLAY_ADDR_R "\0" \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200186 "ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
187
Arnaud Ferrarisd08e1292021-02-20 13:14:15 +0100188#ifdef CONFIG_ARM64
189
190#define MEM_LAYOUT_ENV_EXTRA_SETTINGS \
191 "kernel_comp_addr_r=" KERNEL_COMP_ADDR_R "\0" \
192 "kernel_comp_size=" KERNEL_COMP_SIZE "\0"
193
194#else
195
196#define MEM_LAYOUT_ENV_EXTRA_SETTINGS ""
197
198#endif
199
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200200#define DFU_ALT_INFO_RAM \
201 "dfu_alt_info_ram=" \
202 "kernel ram " KERNEL_ADDR_R " 0x1000000;" \
203 "fdt ram " FDT_ADDR_R " 0x100000;" \
204 "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
Hans de Goede2f60c312014-08-01 09:37:58 +0200205
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800206#ifdef CONFIG_MMC
Karsten Merker16b91632015-12-16 20:59:40 +0100207#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
Maxime Ripard65cefba2017-08-23 10:12:22 +0200208#define BOOTENV_DEV_MMC_AUTO(devtypeu, devtypel, instance) \
209 BOOTENV_DEV_MMC(MMC, mmc, 0) \
210 BOOTENV_DEV_MMC(MMC, mmc, 1) \
211 "bootcmd_mmc_auto=" \
212 "if test ${mmc_bootdev} -eq 1; then " \
213 "run bootcmd_mmc1; " \
214 "run bootcmd_mmc0; " \
215 "elif test ${mmc_bootdev} -eq 0; then " \
216 "run bootcmd_mmc0; " \
217 "run bootcmd_mmc1; " \
218 "fi\0"
219
220#define BOOTENV_DEV_NAME_MMC_AUTO(devtypeu, devtypel, instance) \
221 "mmc_auto "
222
223#define BOOT_TARGET_DEVICES_MMC(func) func(MMC_AUTO, mmc_auto, na)
Karsten Merker16b91632015-12-16 20:59:40 +0100224#else
Maxime Ripard65cefba2017-08-23 10:12:22 +0200225#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
Karsten Merker16b91632015-12-16 20:59:40 +0100226#endif
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800227#else
228#define BOOT_TARGET_DEVICES_MMC(func)
229#endif
230
Hans de Goede6f2da072014-07-31 23:04:45 +0200231#ifdef CONFIG_AHCI
232#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
233#else
234#define BOOT_TARGET_DEVICES_SCSI(func)
235#endif
236
Paul Kocialkowski00529e32015-08-04 17:04:09 +0200237#ifdef CONFIG_USB_STORAGE
Chen-Yu Tsaiee0cf162014-10-03 20:16:22 +0800238#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
239#else
240#define BOOT_TARGET_DEVICES_USB(func)
241#endif
242
Ondrej Jirman4823c6f2019-02-13 18:50:36 +0100243#ifdef CONFIG_CMD_PXE
244#define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
245#else
246#define BOOT_TARGET_DEVICES_PXE(func)
247#endif
248
249#ifdef CONFIG_CMD_DHCP
250#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
251#else
252#define BOOT_TARGET_DEVICES_DHCP(func)
253#endif
254
Bernhard Nortmann8fd443c2015-09-17 18:52:53 +0200255/* FEL boot support, auto-execute boot.scr if a script address was provided */
256#define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
257 "bootcmd_fel=" \
258 "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
259 "echo '(FEL boot)'; " \
260 "source ${fel_scriptaddr}; " \
261 "fi\0"
262#define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
263 "fel "
264
Hans de Goede6f2da072014-07-31 23:04:45 +0200265#define BOOT_TARGET_DEVICES(func) \
Bernhard Nortmann8fd443c2015-09-17 18:52:53 +0200266 func(FEL, fel, na) \
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800267 BOOT_TARGET_DEVICES_MMC(func) \
Hans de Goede6f2da072014-07-31 23:04:45 +0200268 BOOT_TARGET_DEVICES_SCSI(func) \
Chen-Yu Tsaiee0cf162014-10-03 20:16:22 +0800269 BOOT_TARGET_DEVICES_USB(func) \
Ondrej Jirman4823c6f2019-02-13 18:50:36 +0100270 BOOT_TARGET_DEVICES_PXE(func) \
271 BOOT_TARGET_DEVICES_DHCP(func)
Hans de Goede6f2da072014-07-31 23:04:45 +0200272
Hans de Goede8ff8bc82015-10-09 17:11:15 +0100273#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
274#define BOOTCMD_SUNXI_COMPAT \
275 "bootcmd_sunxi_compat=" \
276 "setenv root /dev/mmcblk0p3 rootwait; " \
277 "if ext2load mmc 0 0x44000000 uEnv.txt; then " \
278 "echo Loaded environment from uEnv.txt; " \
279 "env import -t 0x44000000 ${filesize}; " \
280 "fi; " \
281 "setenv bootargs console=${console} root=${root} ${extraargs}; " \
282 "ext2load mmc 0 0x43000000 script.bin && " \
283 "ext2load mmc 0 0x48000000 uImage && " \
284 "bootm 0x48000000\0"
285#else
286#define BOOTCMD_SUNXI_COMPAT
287#endif
288
Hans de Goede6f2da072014-07-31 23:04:45 +0200289#include <config_distro_bootcmd.h>
290
Hans de Goede16030822014-09-18 21:03:34 +0200291#ifdef CONFIG_USB_KEYBOARD
292#define CONSOLE_STDIN_SETTINGS \
Hans de Goede16030822014-09-18 21:03:34 +0200293 "stdin=serial,usbkbd\0"
294#else
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200295#define CONSOLE_STDIN_SETTINGS \
296 "stdin=serial\0"
Hans de Goede16030822014-09-18 21:03:34 +0200297#endif
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200298
Simon Glass52cb5042022-10-18 07:46:31 -0600299#ifdef CONFIG_VIDEO
Jernej Skrabec8d91b462017-03-27 19:22:32 +0200300#define CONSOLE_STDOUT_SETTINGS \
301 "stdout=serial,vidconsole\0" \
302 "stderr=serial,vidconsole\0"
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200303#else
304#define CONSOLE_STDOUT_SETTINGS \
305 "stdout=serial\0" \
306 "stderr=serial\0"
307#endif
308
Maxime Ripard32c544d2017-11-14 21:24:00 +0100309#define PARTS_DEFAULT \
310 "name=loader1,start=8k,size=32k,uuid=${uuid_gpt_loader1};" \
311 "name=loader2,size=984k,uuid=${uuid_gpt_loader2};" \
312 "name=esp,size=128M,bootable,uuid=${uuid_gpt_esp};" \
313 "name=system,size=-,uuid=${uuid_gpt_system};"
314
315#define UUID_GPT_ESP "c12a7328-f81f-11d2-ba4b-00a0c93ec93b"
316
317#ifdef CONFIG_ARM64
318#define UUID_GPT_SYSTEM "b921b045-1df0-41c3-af44-4c6f280d3fae"
319#else
320#define UUID_GPT_SYSTEM "69dad710-2ce4-4e3c-b16c-21a1d49abed3"
321#endif
322
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200323#define CONSOLE_ENV_SETTINGS \
324 CONSOLE_STDIN_SETTINGS \
325 CONSOLE_STDOUT_SETTINGS
326
Andreas Färber26f00d22017-04-14 18:44:47 +0200327#ifdef CONFIG_ARM64
328#define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
329#else
330#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
331#endif
332
Hans de Goede6f2da072014-07-31 23:04:45 +0200333#define CONFIG_EXTRA_ENV_SETTINGS \
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200334 CONSOLE_ENV_SETTINGS \
Hans de Goede2f60c312014-08-01 09:37:58 +0200335 MEM_LAYOUT_ENV_SETTINGS \
Arnaud Ferrarisd08e1292021-02-20 13:14:15 +0100336 MEM_LAYOUT_ENV_EXTRA_SETTINGS \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200337 DFU_ALT_INFO_RAM \
Andreas Färber26f00d22017-04-14 18:44:47 +0200338 "fdtfile=" FDTFILE "\0" \
Hans de Goede2f60c312014-08-01 09:37:58 +0200339 "console=ttyS0,115200\0" \
Maxime Ripard32c544d2017-11-14 21:24:00 +0100340 "uuid_gpt_esp=" UUID_GPT_ESP "\0" \
341 "uuid_gpt_system=" UUID_GPT_SYSTEM "\0" \
342 "partitions=" PARTS_DEFAULT "\0" \
Hans de Goede8ff8bc82015-10-09 17:11:15 +0100343 BOOTCMD_SUNXI_COMPAT \
Hans de Goede6f2da072014-07-31 23:04:45 +0200344 BOOTENV
345
Ian Campbell6efe3692014-05-05 11:52:26 +0100346#endif /* _SUNXI_COMMON_CONFIG_H */