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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Ian Campbell6efe3692014-05-05 11:52:26 +01002/*
3 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
4 *
5 * (C) Copyright 2007-2011
6 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
7 * Tom Cubie <tangliang@allwinnertech.com>
8 *
9 * Configuration settings for the Allwinner sunxi series of boards.
Ian Campbell6efe3692014-05-05 11:52:26 +010010 */
11
12#ifndef _SUNXI_COMMON_CONFIG_H
13#define _SUNXI_COMMON_CONFIG_H
14
Hans de Goede22a1a532015-09-13 17:29:33 +020015#include <asm/arch/cpu.h>
Hans de Goeded241ecf2015-05-19 22:12:31 +020016#include <linux/stringify.h>
17
Ian Campbell6efe3692014-05-05 11:52:26 +010018/* Serial & console */
Ian Campbell6efe3692014-05-05 11:52:26 +010019#define CONFIG_SYS_NS16550_SERIAL
20/* ns16550 reg in the low bits of cpu reg */
Icenowy Zhengb00ef022022-01-29 10:23:06 -050021#ifdef CONFIG_MACH_SUNIV
22/* suniv doesn't have apb2 and uart is connected to apb1 */
23#define CONFIG_SYS_NS16550_CLK 100000000
24#else
Ian Campbell6efe3692014-05-05 11:52:26 +010025#define CONFIG_SYS_NS16550_CLK 24000000
Icenowy Zhengb00ef022022-01-29 10:23:06 -050026#endif
Thomas Chou00ad1f02015-11-19 21:48:13 +080027#ifndef CONFIG_DM_SERIAL
Simon Glass66648982014-10-30 20:25:50 -060028# define CONFIG_SYS_NS16550_REG_SIZE -4
29# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
30# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
31# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
32# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
33# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
34#endif
Ian Campbell6efe3692014-05-05 11:52:26 +010035
Paul Kocialkowskide05f942015-05-16 19:52:11 +020036/* CPU */
Paul Kocialkowskide05f942015-05-16 19:52:11 +020037
Hans de Goeded241ecf2015-05-19 22:12:31 +020038/*
39 * The DRAM Base differs between some models. We cannot use macros for the
40 * CONFIG_FOO defines which contain the DRAM base address since they end
41 * up unexpanded in include/autoconf.mk .
42 *
43 * So we have to have this #ifdef #else #endif block for these.
44 */
45#ifdef CONFIG_MACH_SUN9I
46#define SDRAM_OFFSET(x) 0x2##x
47#define CONFIG_SYS_SDRAM_BASE 0x20000000
Icenowy Zhengb00ef022022-01-29 10:23:06 -050048#elif defined(CONFIG_MACH_SUNIV)
49#define SDRAM_OFFSET(x) 0x8##x
50#define CONFIG_SYS_SDRAM_BASE 0x80000000
Hans de Goeded241ecf2015-05-19 22:12:31 +020051#else
52#define SDRAM_OFFSET(x) 0x4##x
Ian Campbell6efe3692014-05-05 11:52:26 +010053#define CONFIG_SYS_SDRAM_BASE 0x40000000
Icenowy Zheng52e61882017-04-08 15:30:12 +080054/* V3s do not have enough memory to place code at 0x4a000000 */
Hans de Goeded241ecf2015-05-19 22:12:31 +020055#endif
56
Hans de Goede0b95a282015-05-20 15:27:16 +020057/*
58 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
59 * slightly bigger. Note that it is possible to map the first 32 KiB of the
60 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
61 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
62 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
Icenowy Zheng5e6dd272018-07-21 16:20:20 +080063 * A64 and H5 also has SRAM A1 at 0x00010000, but no magic remap register
64 * is known yet.
65 * H6 has SRAM A1 at 0x00020000.
Hans de Goede0b95a282015-05-20 15:27:16 +020066 */
Icenowy Zheng5e6dd272018-07-21 16:20:20 +080067#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SUNXI_SRAM_ADDRESS
68/* FIXME: this may be larger on some SoCs */
69#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
Ian Campbell6efe3692014-05-05 11:52:26 +010070
Ian Campbell6efe3692014-05-05 11:52:26 +010071#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
72#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
73
Hans de Goede3ce35f92015-08-16 14:48:22 +020074#ifdef CONFIG_NAND_SUNXI
Boris Brezillon94754ad2016-06-15 21:09:27 +020075#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
Boris Brezillon57f20382016-06-15 21:09:23 +020076#define CONFIG_SYS_MAX_NAND_DEVICE 8
Piotr Zierhoffere2b662b2015-07-23 14:33:03 +020077#endif
78
Ian Campbellb4e9f2f2014-05-05 14:42:31 +010079/* mmc config */
Ian Campbellb4e9f2f2014-05-05 14:42:31 +010080#define CONFIG_MMC_SUNXI_SLOT 0
Maxime Ripardd780cdc2017-02-27 18:22:03 +010081
Emmanuel Vadot63b45782016-11-05 20:51:11 +010082#define CONFIG_SYS_MMC_MAX_DEVICE 4
Ian Campbellb4e9f2f2014-05-05 14:42:31 +010083
Ian Campbell6efe3692014-05-05 11:52:26 +010084/*
85 * Miscellaneous configurable options
86 */
Ian Campbell6efe3692014-05-05 11:52:26 +010087
Ian Campbell6efe3692014-05-05 11:52:26 +010088/* standalone support */
Hans de Goeded241ecf2015-05-19 22:12:31 +020089#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
Ian Campbell6efe3692014-05-05 11:52:26 +010090
Ian Campbell6efe3692014-05-05 11:52:26 +010091/* FLASH and environment organization */
92
Boris Brezillon8646f2a2015-07-27 16:21:26 +020093#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
Ian Campbell6efe3692014-05-05 11:52:26 +010094
Icenowy Zheng5e6dd272018-07-21 16:20:20 +080095/*
96 * We cannot use expressions here, because expressions won't be evaluated in
97 * autoconf.mk.
98 */
99#if CONFIG_SUNXI_SRAM_ADDRESS == 0x10000
Andre Przywaracced7482017-04-26 01:32:42 +0100100#ifdef CONFIG_ARM64
101/* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */
102#define LOW_LEVEL_SRAM_STACK 0x00054000
103#else
Andre Przywarade454ec2017-02-16 01:20:23 +0000104#define LOW_LEVEL_SRAM_STACK 0x00018000
Andre Przywaracced7482017-04-26 01:32:42 +0100105#endif /* !CONFIG_ARM64 */
Icenowy Zheng73210762018-07-21 16:20:24 +0800106#elif CONFIG_SUNXI_SRAM_ADDRESS == 0x20000
Jernej Skrabece638e052021-01-11 21:11:46 +0100107#ifdef CONFIG_MACH_SUN50I_H616
Jernej Skrabece638e052021-01-11 21:11:46 +0100108#define LOW_LEVEL_SRAM_STACK 0x58000
109#else
Icenowy Zheng73210762018-07-21 16:20:24 +0800110/* end of SRAM A2 on H6 for now */
111#define LOW_LEVEL_SRAM_STACK 0x00118000
Jernej Skrabece638e052021-01-11 21:11:46 +0100112#endif
Siarhei Siamashka26c50fb2016-03-29 17:29:10 +0200113#else
Andre Przywarade454ec2017-02-16 01:20:23 +0000114#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
Siarhei Siamashka26c50fb2016-03-29 17:29:10 +0200115#endif
Ian Campbell140d8322014-05-05 11:52:30 +0100116
Hans de Goede73d7d422014-06-09 11:37:00 +0200117/* Ethernet support */
Hans de Goede73d7d422014-06-09 11:37:00 +0200118
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100119#ifdef CONFIG_ARM64
120/*
121 * Boards seem to come with at least 512MB of DRAM.
122 * The kernel should go at 512K, which is the default text offset (that will
123 * be adjusted at runtime if needed).
124 * There is no compression for arm64 kernels (yet), so leave some space
125 * for really big kernels, say 256MB for now.
126 * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100127 */
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100128#define BOOTM_SIZE __stringify(0xa000000)
129#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000))
Arnaud Ferrarisd08e1292021-02-20 13:14:15 +0100130#define KERNEL_COMP_ADDR_R __stringify(SDRAM_OFFSET(4000000))
131#define KERNEL_COMP_SIZE __stringify(0xb000000)
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100132#define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000))
133#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000))
134#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000))
135#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(FE00000))
136#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FF00000))
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100137
Andre Przywaraa2860fb2022-07-03 00:47:20 +0100138#elif (CONFIG_SUNXI_MINIMUM_DRAM_MB >= 256)
139/*
140 * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
141 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
142 * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end.
143 */
144#define BOOTM_SIZE __stringify(0xa000000)
145#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
146#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
147#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
148#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
149#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(3300000))
150#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3400000))
151
152#elif (CONFIG_SUNXI_MINIMUM_DRAM_MB >= 64)
Icenowy Zhengb00ef022022-01-29 10:23:06 -0500153/*
154 * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc.
155 * 16M uncompressed kernel, 8M compressed kernel, 1M fdt,
156 * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end.
157 */
158#define BOOTM_SIZE __stringify(0x2e00000)
159#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000))
160#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000))
161#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000))
162#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000))
163#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(1B00000))
164#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1C00000))
165
Andre Przywaraa2860fb2022-07-03 00:47:20 +0100166#elif (CONFIG_SUNXI_MINIMUM_DRAM_MB >= 32)
Icenowy Zhengb00ef022022-01-29 10:23:06 -0500167/*
Andre Przywara7bf64ec2022-10-06 18:16:34 +0100168 * 32M RAM minus 2.5MB for u-boot, heap, stack, etc.
169 * 16M uncompressed kernel, 7M compressed kernel, 128K fdt, 64K script,
170 * 128K DT overlay, 128K PXE and the ramdisk in the rest (max. 5MB)
Icenowy Zhengb00ef022022-01-29 10:23:06 -0500171 */
172#define BOOTM_SIZE __stringify(0x1700000)
Andre Przywara7bf64ec2022-10-06 18:16:34 +0100173#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000))
174#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1d50000))
175#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1d40000))
176#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1d00000))
177#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(1d20000))
178#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1800000))
Icenowy Zhengb00ef022022-01-29 10:23:06 -0500179
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100180#else
Andre Przywaraa2860fb2022-07-03 00:47:20 +0100181#error Need at least 32MB of DRAM. Please adjust load addresses.
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100182#endif
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200183
Hans de Goede2f60c312014-08-01 09:37:58 +0200184#define MEM_LAYOUT_ENV_SETTINGS \
Icenowy Zheng52e61882017-04-08 15:30:12 +0800185 "bootm_size=" BOOTM_SIZE "\0" \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200186 "kernel_addr_r=" KERNEL_ADDR_R "\0" \
187 "fdt_addr_r=" FDT_ADDR_R "\0" \
188 "scriptaddr=" SCRIPT_ADDR_R "\0" \
189 "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100190 "fdtoverlay_addr_r=" FDTOVERLAY_ADDR_R "\0" \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200191 "ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
192
Arnaud Ferrarisd08e1292021-02-20 13:14:15 +0100193#ifdef CONFIG_ARM64
194
195#define MEM_LAYOUT_ENV_EXTRA_SETTINGS \
196 "kernel_comp_addr_r=" KERNEL_COMP_ADDR_R "\0" \
197 "kernel_comp_size=" KERNEL_COMP_SIZE "\0"
198
199#else
200
201#define MEM_LAYOUT_ENV_EXTRA_SETTINGS ""
202
203#endif
204
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200205#define DFU_ALT_INFO_RAM \
206 "dfu_alt_info_ram=" \
207 "kernel ram " KERNEL_ADDR_R " 0x1000000;" \
208 "fdt ram " FDT_ADDR_R " 0x100000;" \
209 "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
Hans de Goede2f60c312014-08-01 09:37:58 +0200210
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800211#ifdef CONFIG_MMC
Karsten Merker16b91632015-12-16 20:59:40 +0100212#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
Maxime Ripard65cefba2017-08-23 10:12:22 +0200213#define BOOTENV_DEV_MMC_AUTO(devtypeu, devtypel, instance) \
214 BOOTENV_DEV_MMC(MMC, mmc, 0) \
215 BOOTENV_DEV_MMC(MMC, mmc, 1) \
216 "bootcmd_mmc_auto=" \
217 "if test ${mmc_bootdev} -eq 1; then " \
218 "run bootcmd_mmc1; " \
219 "run bootcmd_mmc0; " \
220 "elif test ${mmc_bootdev} -eq 0; then " \
221 "run bootcmd_mmc0; " \
222 "run bootcmd_mmc1; " \
223 "fi\0"
224
225#define BOOTENV_DEV_NAME_MMC_AUTO(devtypeu, devtypel, instance) \
226 "mmc_auto "
227
228#define BOOT_TARGET_DEVICES_MMC(func) func(MMC_AUTO, mmc_auto, na)
Karsten Merker16b91632015-12-16 20:59:40 +0100229#else
Maxime Ripard65cefba2017-08-23 10:12:22 +0200230#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
Karsten Merker16b91632015-12-16 20:59:40 +0100231#endif
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800232#else
233#define BOOT_TARGET_DEVICES_MMC(func)
234#endif
235
Hans de Goede6f2da072014-07-31 23:04:45 +0200236#ifdef CONFIG_AHCI
237#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
238#else
239#define BOOT_TARGET_DEVICES_SCSI(func)
240#endif
241
Paul Kocialkowski00529e32015-08-04 17:04:09 +0200242#ifdef CONFIG_USB_STORAGE
Chen-Yu Tsaiee0cf162014-10-03 20:16:22 +0800243#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
244#else
245#define BOOT_TARGET_DEVICES_USB(func)
246#endif
247
Ondrej Jirman4823c6f2019-02-13 18:50:36 +0100248#ifdef CONFIG_CMD_PXE
249#define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
250#else
251#define BOOT_TARGET_DEVICES_PXE(func)
252#endif
253
254#ifdef CONFIG_CMD_DHCP
255#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
256#else
257#define BOOT_TARGET_DEVICES_DHCP(func)
258#endif
259
Bernhard Nortmann8fd443c2015-09-17 18:52:53 +0200260/* FEL boot support, auto-execute boot.scr if a script address was provided */
261#define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
262 "bootcmd_fel=" \
263 "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
264 "echo '(FEL boot)'; " \
265 "source ${fel_scriptaddr}; " \
266 "fi\0"
267#define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
268 "fel "
269
Hans de Goede6f2da072014-07-31 23:04:45 +0200270#define BOOT_TARGET_DEVICES(func) \
Bernhard Nortmann8fd443c2015-09-17 18:52:53 +0200271 func(FEL, fel, na) \
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800272 BOOT_TARGET_DEVICES_MMC(func) \
Hans de Goede6f2da072014-07-31 23:04:45 +0200273 BOOT_TARGET_DEVICES_SCSI(func) \
Chen-Yu Tsaiee0cf162014-10-03 20:16:22 +0800274 BOOT_TARGET_DEVICES_USB(func) \
Ondrej Jirman4823c6f2019-02-13 18:50:36 +0100275 BOOT_TARGET_DEVICES_PXE(func) \
276 BOOT_TARGET_DEVICES_DHCP(func)
Hans de Goede6f2da072014-07-31 23:04:45 +0200277
Hans de Goede8ff8bc82015-10-09 17:11:15 +0100278#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
279#define BOOTCMD_SUNXI_COMPAT \
280 "bootcmd_sunxi_compat=" \
281 "setenv root /dev/mmcblk0p3 rootwait; " \
282 "if ext2load mmc 0 0x44000000 uEnv.txt; then " \
283 "echo Loaded environment from uEnv.txt; " \
284 "env import -t 0x44000000 ${filesize}; " \
285 "fi; " \
286 "setenv bootargs console=${console} root=${root} ${extraargs}; " \
287 "ext2load mmc 0 0x43000000 script.bin && " \
288 "ext2load mmc 0 0x48000000 uImage && " \
289 "bootm 0x48000000\0"
290#else
291#define BOOTCMD_SUNXI_COMPAT
292#endif
293
Hans de Goede6f2da072014-07-31 23:04:45 +0200294#include <config_distro_bootcmd.h>
295
Hans de Goede16030822014-09-18 21:03:34 +0200296#ifdef CONFIG_USB_KEYBOARD
297#define CONSOLE_STDIN_SETTINGS \
Hans de Goede16030822014-09-18 21:03:34 +0200298 "stdin=serial,usbkbd\0"
299#else
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200300#define CONSOLE_STDIN_SETTINGS \
301 "stdin=serial\0"
Hans de Goede16030822014-09-18 21:03:34 +0200302#endif
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200303
Simon Glass52cb5042022-10-18 07:46:31 -0600304#ifdef CONFIG_VIDEO
Jernej Skrabec8d91b462017-03-27 19:22:32 +0200305#define CONSOLE_STDOUT_SETTINGS \
306 "stdout=serial,vidconsole\0" \
307 "stderr=serial,vidconsole\0"
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200308#else
309#define CONSOLE_STDOUT_SETTINGS \
310 "stdout=serial\0" \
311 "stderr=serial\0"
312#endif
313
Maxime Ripard32c544d2017-11-14 21:24:00 +0100314#define PARTS_DEFAULT \
315 "name=loader1,start=8k,size=32k,uuid=${uuid_gpt_loader1};" \
316 "name=loader2,size=984k,uuid=${uuid_gpt_loader2};" \
317 "name=esp,size=128M,bootable,uuid=${uuid_gpt_esp};" \
318 "name=system,size=-,uuid=${uuid_gpt_system};"
319
320#define UUID_GPT_ESP "c12a7328-f81f-11d2-ba4b-00a0c93ec93b"
321
322#ifdef CONFIG_ARM64
323#define UUID_GPT_SYSTEM "b921b045-1df0-41c3-af44-4c6f280d3fae"
324#else
325#define UUID_GPT_SYSTEM "69dad710-2ce4-4e3c-b16c-21a1d49abed3"
326#endif
327
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200328#define CONSOLE_ENV_SETTINGS \
329 CONSOLE_STDIN_SETTINGS \
330 CONSOLE_STDOUT_SETTINGS
331
Andreas Färber26f00d22017-04-14 18:44:47 +0200332#ifdef CONFIG_ARM64
333#define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
334#else
335#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
336#endif
337
Hans de Goede6f2da072014-07-31 23:04:45 +0200338#define CONFIG_EXTRA_ENV_SETTINGS \
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200339 CONSOLE_ENV_SETTINGS \
Hans de Goede2f60c312014-08-01 09:37:58 +0200340 MEM_LAYOUT_ENV_SETTINGS \
Arnaud Ferrarisd08e1292021-02-20 13:14:15 +0100341 MEM_LAYOUT_ENV_EXTRA_SETTINGS \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200342 DFU_ALT_INFO_RAM \
Andreas Färber26f00d22017-04-14 18:44:47 +0200343 "fdtfile=" FDTFILE "\0" \
Hans de Goede2f60c312014-08-01 09:37:58 +0200344 "console=ttyS0,115200\0" \
Maxime Ripard32c544d2017-11-14 21:24:00 +0100345 "uuid_gpt_esp=" UUID_GPT_ESP "\0" \
346 "uuid_gpt_system=" UUID_GPT_SYSTEM "\0" \
347 "partitions=" PARTS_DEFAULT "\0" \
Hans de Goede8ff8bc82015-10-09 17:11:15 +0100348 BOOTCMD_SUNXI_COMPAT \
Hans de Goede6f2da072014-07-31 23:04:45 +0200349 BOOTENV
350
Ian Campbell6efe3692014-05-05 11:52:26 +0100351#endif /* _SUNXI_COMMON_CONFIG_H */