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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Ian Campbell6efe3692014-05-05 11:52:26 +01002/*
3 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
4 *
5 * (C) Copyright 2007-2011
6 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
7 * Tom Cubie <tangliang@allwinnertech.com>
8 *
9 * Configuration settings for the Allwinner sunxi series of boards.
Ian Campbell6efe3692014-05-05 11:52:26 +010010 */
11
12#ifndef _SUNXI_COMMON_CONFIG_H
13#define _SUNXI_COMMON_CONFIG_H
14
Hans de Goede22a1a532015-09-13 17:29:33 +020015#include <asm/arch/cpu.h>
Hans de Goeded241ecf2015-05-19 22:12:31 +020016#include <linux/stringify.h>
17
Andre Przywarad8362162017-04-26 01:32:48 +010018#ifdef CONFIG_ARM64
Jagan Tekia4e696b2017-11-10 22:21:09 +053019#define CONFIG_SYS_BOOTM_LEN (32 << 20)
Andre Przywarad8362162017-04-26 01:32:48 +010020#endif
21
Ian Campbell6efe3692014-05-05 11:52:26 +010022/* Serial & console */
Ian Campbell6efe3692014-05-05 11:52:26 +010023#define CONFIG_SYS_NS16550_SERIAL
24/* ns16550 reg in the low bits of cpu reg */
Icenowy Zhengb00ef022022-01-29 10:23:06 -050025#ifdef CONFIG_MACH_SUNIV
26/* suniv doesn't have apb2 and uart is connected to apb1 */
27#define CONFIG_SYS_NS16550_CLK 100000000
28#else
Ian Campbell6efe3692014-05-05 11:52:26 +010029#define CONFIG_SYS_NS16550_CLK 24000000
Icenowy Zhengb00ef022022-01-29 10:23:06 -050030#endif
Thomas Chou00ad1f02015-11-19 21:48:13 +080031#ifndef CONFIG_DM_SERIAL
Simon Glass66648982014-10-30 20:25:50 -060032# define CONFIG_SYS_NS16550_REG_SIZE -4
33# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
34# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
35# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
36# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
37# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
38#endif
Ian Campbell6efe3692014-05-05 11:52:26 +010039
Paul Kocialkowskide05f942015-05-16 19:52:11 +020040/* CPU */
Andre Przywara70c78932017-02-16 01:20:19 +000041#define COUNTER_FREQUENCY 24000000
Paul Kocialkowskide05f942015-05-16 19:52:11 +020042
Hans de Goeded241ecf2015-05-19 22:12:31 +020043/*
44 * The DRAM Base differs between some models. We cannot use macros for the
45 * CONFIG_FOO defines which contain the DRAM base address since they end
46 * up unexpanded in include/autoconf.mk .
47 *
48 * So we have to have this #ifdef #else #endif block for these.
49 */
50#ifdef CONFIG_MACH_SUN9I
51#define SDRAM_OFFSET(x) 0x2##x
52#define CONFIG_SYS_SDRAM_BASE 0x20000000
Jernej Skrabec7654ef82021-03-23 21:27:31 +010053/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
Hans de Goede66ab79d2015-09-13 13:02:48 +020054 * since it needs to fit in with the other values. By also #defining it
55 * we get warnings if the Kconfig value mismatches. */
Hans de Goeded241ecf2015-05-19 22:12:31 +020056#define CONFIG_SPL_BSS_START_ADDR 0x2ff80000
Icenowy Zhengb00ef022022-01-29 10:23:06 -050057#elif defined(CONFIG_MACH_SUNIV)
58#define SDRAM_OFFSET(x) 0x8##x
59#define CONFIG_SYS_SDRAM_BASE 0x80000000
60/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
61 * since it needs to fit in with the other values. By also #defining it
62 * we get warnings if the Kconfig value mismatches.
63 */
64#define CONFIG_SPL_STACK_R_ADDR 0x81e00000
65#define CONFIG_SPL_BSS_START_ADDR 0x81f80000
Hans de Goeded241ecf2015-05-19 22:12:31 +020066#else
67#define SDRAM_OFFSET(x) 0x4##x
Ian Campbell6efe3692014-05-05 11:52:26 +010068#define CONFIG_SYS_SDRAM_BASE 0x40000000
Icenowy Zheng52e61882017-04-08 15:30:12 +080069/* V3s do not have enough memory to place code at 0x4a000000 */
Jernej Skrabec7654ef82021-03-23 21:27:31 +010070/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
Hans de Goede66ab79d2015-09-13 13:02:48 +020071 * since it needs to fit in with the other values. By also #defining it
72 * we get warnings if the Kconfig value mismatches. */
Hans de Goeded241ecf2015-05-19 22:12:31 +020073#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
74#endif
75
76#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */
Hans de Goeded241ecf2015-05-19 22:12:31 +020077
Hans de Goede0b95a282015-05-20 15:27:16 +020078/*
79 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
80 * slightly bigger. Note that it is possible to map the first 32 KiB of the
81 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
82 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
83 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
Icenowy Zheng5e6dd272018-07-21 16:20:20 +080084 * A64 and H5 also has SRAM A1 at 0x00010000, but no magic remap register
85 * is known yet.
86 * H6 has SRAM A1 at 0x00020000.
Hans de Goede0b95a282015-05-20 15:27:16 +020087 */
Icenowy Zheng5e6dd272018-07-21 16:20:20 +080088#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SUNXI_SRAM_ADDRESS
89/* FIXME: this may be larger on some SoCs */
90#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
Ian Campbell6efe3692014-05-05 11:52:26 +010091
92#define CONFIG_SYS_INIT_SP_OFFSET \
93 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
94#define CONFIG_SYS_INIT_SP_ADDR \
95 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
96
Ian Campbell6efe3692014-05-05 11:52:26 +010097#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
98#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
99
Ian Campbella2ebf922014-07-18 20:38:41 +0100100#ifdef CONFIG_AHCI
Bernhard Nortmannb4946db2015-06-10 10:51:40 +0200101#define CONFIG_SYS_64BIT_LBA
Ian Campbella2ebf922014-07-18 20:38:41 +0100102#endif
103
Hans de Goede3ce35f92015-08-16 14:48:22 +0200104#ifdef CONFIG_NAND_SUNXI
Boris Brezillon94754ad2016-06-15 21:09:27 +0200105#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
Boris Brezillon57f20382016-06-15 21:09:23 +0200106#define CONFIG_SYS_MAX_NAND_DEVICE 8
Piotr Zierhoffere2b662b2015-07-23 14:33:03 +0200107#endif
108
Ian Campbellb4e9f2f2014-05-05 14:42:31 +0100109/* mmc config */
Ian Campbellb4e9f2f2014-05-05 14:42:31 +0100110#define CONFIG_MMC_SUNXI_SLOT 0
Maxime Ripardd780cdc2017-02-27 18:22:03 +0100111
112#if defined(CONFIG_ENV_IS_IN_MMC)
Maxime Ripard814d82b2018-01-16 09:44:24 +0100113/*
114 * This is actually (CONFIG_ENV_OFFSET -
115 * (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)), but the value will be used
116 * directly in a makefile, without the preprocessor expansion.
117 */
118#define CONFIG_BOARD_SIZE_LIMIT 0x7e000
119#endif
120
Emmanuel Vadot63b45782016-11-05 20:51:11 +0100121#define CONFIG_SYS_MMC_MAX_DEVICE 4
Ian Campbellb4e9f2f2014-05-05 14:42:31 +0100122
Ian Campbell6efe3692014-05-05 11:52:26 +0100123/*
124 * Miscellaneous configurable options
125 */
Ian Campbell428734e2014-10-07 14:20:30 +0100126#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
127#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
Ian Campbell6efe3692014-05-05 11:52:26 +0100128
Ian Campbell6efe3692014-05-05 11:52:26 +0100129/* standalone support */
Hans de Goeded241ecf2015-05-19 22:12:31 +0200130#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
Ian Campbell6efe3692014-05-05 11:52:26 +0100131
Ian Campbell6efe3692014-05-05 11:52:26 +0100132/* FLASH and environment organization */
133
Boris Brezillon8646f2a2015-07-27 16:21:26 +0200134#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
Ian Campbell6efe3692014-05-05 11:52:26 +0100135
Icenowy Zheng5e6dd272018-07-21 16:20:20 +0800136/*
137 * We cannot use expressions here, because expressions won't be evaluated in
138 * autoconf.mk.
139 */
140#if CONFIG_SUNXI_SRAM_ADDRESS == 0x10000
Siarhei Siamashka6b0cd012017-04-26 01:32:49 +0100141#define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */
Andre Przywaracced7482017-04-26 01:32:42 +0100142#ifdef CONFIG_ARM64
143/* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */
144#define LOW_LEVEL_SRAM_STACK 0x00054000
145#else
Andre Przywarade454ec2017-02-16 01:20:23 +0000146#define LOW_LEVEL_SRAM_STACK 0x00018000
Andre Przywaracced7482017-04-26 01:32:42 +0100147#endif /* !CONFIG_ARM64 */
Icenowy Zheng73210762018-07-21 16:20:24 +0800148#elif CONFIG_SUNXI_SRAM_ADDRESS == 0x20000
Jernej Skrabece638e052021-01-11 21:11:46 +0100149#ifdef CONFIG_MACH_SUN50I_H616
150#define CONFIG_SPL_MAX_SIZE 0xbfa0 /* 48 KiB */
151#define LOW_LEVEL_SRAM_STACK 0x58000
152#else
Icenowy Zheng73210762018-07-21 16:20:24 +0800153#define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */
154/* end of SRAM A2 on H6 for now */
155#define LOW_LEVEL_SRAM_STACK 0x00118000
Jernej Skrabece638e052021-01-11 21:11:46 +0100156#endif
Siarhei Siamashka26c50fb2016-03-29 17:29:10 +0200157#else
Siarhei Siamashka6b0cd012017-04-26 01:32:49 +0100158#define CONFIG_SPL_MAX_SIZE 0x5fa0 /* 24KB on sun4i/sun7i */
Andre Przywarade454ec2017-02-16 01:20:23 +0000159#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
Siarhei Siamashka26c50fb2016-03-29 17:29:10 +0200160#endif
Ian Campbell140d8322014-05-05 11:52:30 +0100161
Andre Przywarade454ec2017-02-16 01:20:23 +0000162#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
163
Jernej Skrabece638e052021-01-11 21:11:46 +0100164#ifndef CONFIG_MACH_SUN50I_H616
Ian Campbell140d8322014-05-05 11:52:30 +0100165#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
Jernej Skrabece638e052021-01-11 21:11:46 +0100166#endif
Ian Campbell140d8322014-05-05 11:52:30 +0100167
Hans de Goede73d7d422014-06-09 11:37:00 +0200168/* Ethernet support */
Hans de Goede73d7d422014-06-09 11:37:00 +0200169
Paul Kocialkowski00529e32015-08-04 17:04:09 +0200170#ifdef CONFIG_USB_EHCI_HCD
Hans de Goede804fa572015-05-10 14:10:27 +0200171#define CONFIG_USB_OHCI_NEW
Hans de Goede804fa572015-05-10 14:10:27 +0200172#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
Hans de Goedef494cad2015-01-11 17:17:00 +0100173#endif
174
Ian Campbell6efe3692014-05-05 11:52:26 +0100175#ifndef CONFIG_SPL_BUILD
Hans de Goede6f2da072014-07-31 23:04:45 +0200176
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100177#ifdef CONFIG_ARM64
178/*
179 * Boards seem to come with at least 512MB of DRAM.
180 * The kernel should go at 512K, which is the default text offset (that will
181 * be adjusted at runtime if needed).
182 * There is no compression for arm64 kernels (yet), so leave some space
183 * for really big kernels, say 256MB for now.
184 * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100185 */
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100186#define BOOTM_SIZE __stringify(0xa000000)
187#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000))
Arnaud Ferrarisd08e1292021-02-20 13:14:15 +0100188#define KERNEL_COMP_ADDR_R __stringify(SDRAM_OFFSET(4000000))
189#define KERNEL_COMP_SIZE __stringify(0xb000000)
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100190#define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000))
191#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000))
192#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000))
193#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(FE00000))
194#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FF00000))
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100195
Icenowy Zhengb00ef022022-01-29 10:23:06 -0500196#elif defined(CONFIG_MACH_SUN8I_V3S)
197/*
198 * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc.
199 * 16M uncompressed kernel, 8M compressed kernel, 1M fdt,
200 * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end.
201 */
202#define BOOTM_SIZE __stringify(0x2e00000)
203#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000))
204#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000))
205#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000))
206#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000))
207#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(1B00000))
208#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1C00000))
209
210#elif defined(CONFIG_MACH_SUNIV)
211/*
212 * 32M RAM minus 1MB heap + 8MB for u-boot, stack, fb, etc.
213 * 8M uncompressed kernel, 4M compressed kernel, 512K fdt,
214 * 512K script, 512K pxe and the ramdisk at the end.
215 */
216#define BOOTM_SIZE __stringify(0x1700000)
217#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0500000))
218#define FDT_ADDR_R __stringify(SDRAM_OFFSET(0C00000))
219#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(0C50000))
220#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(0D00000))
221#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(0D50000))
222#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(0D60000))
223
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100224#else
Hans de Goede3400a7c2014-12-24 16:08:30 +0100225/*
Hans de Goede9f7dc802015-09-13 17:16:54 +0200226 * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
Hans de Goede3400a7c2014-12-24 16:08:30 +0100227 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100228 * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end.
Hans de Goede3400a7c2014-12-24 16:08:30 +0100229 */
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100230#define BOOTM_SIZE __stringify(0xa000000)
231#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
232#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
233#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
234#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
235#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(3300000))
236#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3400000))
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100237#endif
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200238
Hans de Goede2f60c312014-08-01 09:37:58 +0200239#define MEM_LAYOUT_ENV_SETTINGS \
Icenowy Zheng52e61882017-04-08 15:30:12 +0800240 "bootm_size=" BOOTM_SIZE "\0" \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200241 "kernel_addr_r=" KERNEL_ADDR_R "\0" \
242 "fdt_addr_r=" FDT_ADDR_R "\0" \
243 "scriptaddr=" SCRIPT_ADDR_R "\0" \
244 "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100245 "fdtoverlay_addr_r=" FDTOVERLAY_ADDR_R "\0" \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200246 "ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
247
Arnaud Ferrarisd08e1292021-02-20 13:14:15 +0100248#ifdef CONFIG_ARM64
249
250#define MEM_LAYOUT_ENV_EXTRA_SETTINGS \
251 "kernel_comp_addr_r=" KERNEL_COMP_ADDR_R "\0" \
252 "kernel_comp_size=" KERNEL_COMP_SIZE "\0"
253
254#else
255
256#define MEM_LAYOUT_ENV_EXTRA_SETTINGS ""
257
258#endif
259
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200260#define DFU_ALT_INFO_RAM \
261 "dfu_alt_info_ram=" \
262 "kernel ram " KERNEL_ADDR_R " 0x1000000;" \
263 "fdt ram " FDT_ADDR_R " 0x100000;" \
264 "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
Hans de Goede2f60c312014-08-01 09:37:58 +0200265
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800266#ifdef CONFIG_MMC
Karsten Merker16b91632015-12-16 20:59:40 +0100267#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
Maxime Ripard65cefba2017-08-23 10:12:22 +0200268#define BOOTENV_DEV_MMC_AUTO(devtypeu, devtypel, instance) \
269 BOOTENV_DEV_MMC(MMC, mmc, 0) \
270 BOOTENV_DEV_MMC(MMC, mmc, 1) \
271 "bootcmd_mmc_auto=" \
272 "if test ${mmc_bootdev} -eq 1; then " \
273 "run bootcmd_mmc1; " \
274 "run bootcmd_mmc0; " \
275 "elif test ${mmc_bootdev} -eq 0; then " \
276 "run bootcmd_mmc0; " \
277 "run bootcmd_mmc1; " \
278 "fi\0"
279
280#define BOOTENV_DEV_NAME_MMC_AUTO(devtypeu, devtypel, instance) \
281 "mmc_auto "
282
283#define BOOT_TARGET_DEVICES_MMC(func) func(MMC_AUTO, mmc_auto, na)
Karsten Merker16b91632015-12-16 20:59:40 +0100284#else
Maxime Ripard65cefba2017-08-23 10:12:22 +0200285#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
Karsten Merker16b91632015-12-16 20:59:40 +0100286#endif
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800287#else
288#define BOOT_TARGET_DEVICES_MMC(func)
289#endif
290
Hans de Goede6f2da072014-07-31 23:04:45 +0200291#ifdef CONFIG_AHCI
292#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
293#else
294#define BOOT_TARGET_DEVICES_SCSI(func)
295#endif
296
Paul Kocialkowski00529e32015-08-04 17:04:09 +0200297#ifdef CONFIG_USB_STORAGE
Chen-Yu Tsaiee0cf162014-10-03 20:16:22 +0800298#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
299#else
300#define BOOT_TARGET_DEVICES_USB(func)
301#endif
302
Ondrej Jirman4823c6f2019-02-13 18:50:36 +0100303#ifdef CONFIG_CMD_PXE
304#define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
305#else
306#define BOOT_TARGET_DEVICES_PXE(func)
307#endif
308
309#ifdef CONFIG_CMD_DHCP
310#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
311#else
312#define BOOT_TARGET_DEVICES_DHCP(func)
313#endif
314
Bernhard Nortmann8fd443c2015-09-17 18:52:53 +0200315/* FEL boot support, auto-execute boot.scr if a script address was provided */
316#define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
317 "bootcmd_fel=" \
318 "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
319 "echo '(FEL boot)'; " \
320 "source ${fel_scriptaddr}; " \
321 "fi\0"
322#define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
323 "fel "
324
Hans de Goede6f2da072014-07-31 23:04:45 +0200325#define BOOT_TARGET_DEVICES(func) \
Bernhard Nortmann8fd443c2015-09-17 18:52:53 +0200326 func(FEL, fel, na) \
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800327 BOOT_TARGET_DEVICES_MMC(func) \
Hans de Goede6f2da072014-07-31 23:04:45 +0200328 BOOT_TARGET_DEVICES_SCSI(func) \
Chen-Yu Tsaiee0cf162014-10-03 20:16:22 +0800329 BOOT_TARGET_DEVICES_USB(func) \
Ondrej Jirman4823c6f2019-02-13 18:50:36 +0100330 BOOT_TARGET_DEVICES_PXE(func) \
331 BOOT_TARGET_DEVICES_DHCP(func)
Hans de Goede6f2da072014-07-31 23:04:45 +0200332
Hans de Goede8ff8bc82015-10-09 17:11:15 +0100333#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
334#define BOOTCMD_SUNXI_COMPAT \
335 "bootcmd_sunxi_compat=" \
336 "setenv root /dev/mmcblk0p3 rootwait; " \
337 "if ext2load mmc 0 0x44000000 uEnv.txt; then " \
338 "echo Loaded environment from uEnv.txt; " \
339 "env import -t 0x44000000 ${filesize}; " \
340 "fi; " \
341 "setenv bootargs console=${console} root=${root} ${extraargs}; " \
342 "ext2load mmc 0 0x43000000 script.bin && " \
343 "ext2load mmc 0 0x48000000 uImage && " \
344 "bootm 0x48000000\0"
345#else
346#define BOOTCMD_SUNXI_COMPAT
347#endif
348
Hans de Goede6f2da072014-07-31 23:04:45 +0200349#include <config_distro_bootcmd.h>
350
Hans de Goede16030822014-09-18 21:03:34 +0200351#ifdef CONFIG_USB_KEYBOARD
352#define CONSOLE_STDIN_SETTINGS \
Hans de Goede16030822014-09-18 21:03:34 +0200353 "stdin=serial,usbkbd\0"
354#else
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200355#define CONSOLE_STDIN_SETTINGS \
356 "stdin=serial\0"
Hans de Goede16030822014-09-18 21:03:34 +0200357#endif
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200358
Jagan Teki5bc34cb2021-02-22 00:12:34 +0000359#ifdef CONFIG_DM_VIDEO
Jernej Skrabec8d91b462017-03-27 19:22:32 +0200360#define CONSOLE_STDOUT_SETTINGS \
361 "stdout=serial,vidconsole\0" \
362 "stderr=serial,vidconsole\0"
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200363#else
364#define CONSOLE_STDOUT_SETTINGS \
365 "stdout=serial\0" \
366 "stderr=serial\0"
367#endif
368
Maxime Ripardbe1d3562017-02-27 18:22:11 +0100369#ifdef CONFIG_MTDIDS_DEFAULT
370#define SUNXI_MTDIDS_DEFAULT \
371 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0"
372#else
373#define SUNXI_MTDIDS_DEFAULT
374#endif
375
376#ifdef CONFIG_MTDPARTS_DEFAULT
377#define SUNXI_MTDPARTS_DEFAULT \
378 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
379#else
380#define SUNXI_MTDPARTS_DEFAULT
381#endif
382
Maxime Ripard32c544d2017-11-14 21:24:00 +0100383#define PARTS_DEFAULT \
384 "name=loader1,start=8k,size=32k,uuid=${uuid_gpt_loader1};" \
385 "name=loader2,size=984k,uuid=${uuid_gpt_loader2};" \
386 "name=esp,size=128M,bootable,uuid=${uuid_gpt_esp};" \
387 "name=system,size=-,uuid=${uuid_gpt_system};"
388
389#define UUID_GPT_ESP "c12a7328-f81f-11d2-ba4b-00a0c93ec93b"
390
391#ifdef CONFIG_ARM64
392#define UUID_GPT_SYSTEM "b921b045-1df0-41c3-af44-4c6f280d3fae"
393#else
394#define UUID_GPT_SYSTEM "69dad710-2ce4-4e3c-b16c-21a1d49abed3"
395#endif
396
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200397#define CONSOLE_ENV_SETTINGS \
398 CONSOLE_STDIN_SETTINGS \
399 CONSOLE_STDOUT_SETTINGS
400
Andreas Färber26f00d22017-04-14 18:44:47 +0200401#ifdef CONFIG_ARM64
402#define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
403#else
404#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
405#endif
406
Hans de Goede6f2da072014-07-31 23:04:45 +0200407#define CONFIG_EXTRA_ENV_SETTINGS \
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200408 CONSOLE_ENV_SETTINGS \
Hans de Goede2f60c312014-08-01 09:37:58 +0200409 MEM_LAYOUT_ENV_SETTINGS \
Arnaud Ferrarisd08e1292021-02-20 13:14:15 +0100410 MEM_LAYOUT_ENV_EXTRA_SETTINGS \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200411 DFU_ALT_INFO_RAM \
Andreas Färber26f00d22017-04-14 18:44:47 +0200412 "fdtfile=" FDTFILE "\0" \
Hans de Goede2f60c312014-08-01 09:37:58 +0200413 "console=ttyS0,115200\0" \
Maxime Ripardbe1d3562017-02-27 18:22:11 +0100414 SUNXI_MTDIDS_DEFAULT \
415 SUNXI_MTDPARTS_DEFAULT \
Maxime Ripard32c544d2017-11-14 21:24:00 +0100416 "uuid_gpt_esp=" UUID_GPT_ESP "\0" \
417 "uuid_gpt_system=" UUID_GPT_SYSTEM "\0" \
418 "partitions=" PARTS_DEFAULT "\0" \
Hans de Goede8ff8bc82015-10-09 17:11:15 +0100419 BOOTCMD_SUNXI_COMPAT \
Hans de Goede6f2da072014-07-31 23:04:45 +0200420 BOOTENV
421
422#else /* ifndef CONFIG_SPL_BUILD */
423#define CONFIG_EXTRA_ENV_SETTINGS
Ian Campbell6efe3692014-05-05 11:52:26 +0100424#endif
425
426#endif /* _SUNXI_COMMON_CONFIG_H */