Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2 | |
| 3 | #include <common.h> |
Marek Vasut | 992af7d | 2020-07-08 06:31:54 +0200 | [diff] [blame] | 4 | #include <asm/io.h> |
Marek Vasut | 1d6c738 | 2020-07-08 07:26:14 +0200 | [diff] [blame] | 5 | #include <dm.h> |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 6 | #include <malloc.h> |
| 7 | #include <net.h> |
Ben Warren | 840f8a5 | 2008-08-31 10:45:44 -0700 | [diff] [blame] | 8 | #include <netdev.h> |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 9 | #include <pci.h> |
Simon Glass | 4dcacfc | 2020-05-10 11:40:13 -0600 | [diff] [blame] | 10 | #include <linux/bitops.h> |
Simon Glass | dbd7954 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 11 | #include <linux/delay.h> |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 12 | |
Marek Vasut | 091eea8 | 2020-04-19 04:05:44 +0200 | [diff] [blame] | 13 | #define SROM_DLEVEL 0 |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 14 | |
Marek Vasut | 81d10f7 | 2020-04-19 03:09:26 +0200 | [diff] [blame] | 15 | /* PCI Registers. */ |
| 16 | #define PCI_CFDA_PSM 0x43 |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 17 | |
| 18 | #define CFRV_RN 0x000000f0 /* Revision Number */ |
| 19 | |
| 20 | #define WAKEUP 0x00 /* Power Saving Wakeup */ |
| 21 | #define SLEEP 0x80 /* Power Saving Sleep Mode */ |
| 22 | |
Marek Vasut | 81d10f7 | 2020-04-19 03:09:26 +0200 | [diff] [blame] | 23 | #define DC2114x_BRK 0x0020 /* CFRV break between DC21142 & DC21143 */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 24 | |
Marek Vasut | 81d10f7 | 2020-04-19 03:09:26 +0200 | [diff] [blame] | 25 | /* Ethernet chip registers. */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 26 | #define DE4X5_BMR 0x000 /* Bus Mode Register */ |
| 27 | #define DE4X5_TPD 0x008 /* Transmit Poll Demand Reg */ |
| 28 | #define DE4X5_RRBA 0x018 /* RX Ring Base Address Reg */ |
| 29 | #define DE4X5_TRBA 0x020 /* TX Ring Base Address Reg */ |
| 30 | #define DE4X5_STS 0x028 /* Status Register */ |
| 31 | #define DE4X5_OMR 0x030 /* Operation Mode Register */ |
| 32 | #define DE4X5_SICR 0x068 /* SIA Connectivity Register */ |
| 33 | #define DE4X5_APROM 0x048 /* Ethernet Address PROM */ |
| 34 | |
Marek Vasut | 81d10f7 | 2020-04-19 03:09:26 +0200 | [diff] [blame] | 35 | /* Register bits. */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 36 | #define BMR_SWR 0x00000001 /* Software Reset */ |
| 37 | #define STS_TS 0x00700000 /* Transmit Process State */ |
| 38 | #define STS_RS 0x000e0000 /* Receive Process State */ |
| 39 | #define OMR_ST 0x00002000 /* Start/Stop Transmission Command */ |
| 40 | #define OMR_SR 0x00000002 /* Start/Stop Receive */ |
| 41 | #define OMR_PS 0x00040000 /* Port Select */ |
| 42 | #define OMR_SDP 0x02000000 /* SD Polarity - MUST BE ASSERTED */ |
| 43 | #define OMR_PM 0x00000080 /* Pass All Multicast */ |
| 44 | |
Marek Vasut | 81d10f7 | 2020-04-19 03:09:26 +0200 | [diff] [blame] | 45 | /* Descriptor bits. */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 46 | #define R_OWN 0x80000000 /* Own Bit */ |
| 47 | #define RD_RER 0x02000000 /* Receive End Of Ring */ |
| 48 | #define RD_LS 0x00000100 /* Last Descriptor */ |
| 49 | #define RD_ES 0x00008000 /* Error Summary */ |
| 50 | #define TD_TER 0x02000000 /* Transmit End Of Ring */ |
| 51 | #define T_OWN 0x80000000 /* Own Bit */ |
| 52 | #define TD_LS 0x40000000 /* Last Segment */ |
| 53 | #define TD_FS 0x20000000 /* First Segment */ |
| 54 | #define TD_ES 0x00008000 /* Error Summary */ |
| 55 | #define TD_SET 0x08000000 /* Setup Packet */ |
| 56 | |
| 57 | /* The EEPROM commands include the alway-set leading bit. */ |
| 58 | #define SROM_WRITE_CMD 5 |
| 59 | #define SROM_READ_CMD 6 |
| 60 | #define SROM_ERASE_CMD 7 |
| 61 | |
Marek Vasut | 81d10f7 | 2020-04-19 03:09:26 +0200 | [diff] [blame] | 62 | #define SROM_HWADD 0x0014 /* Hardware Address offset in SROM */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 63 | #define SROM_RD 0x00004000 /* Read from Boot ROM */ |
Marek Vasut | 81d10f7 | 2020-04-19 03:09:26 +0200 | [diff] [blame] | 64 | #define EE_DATA_WRITE 0x04 /* EEPROM chip data in. */ |
| 65 | #define EE_WRITE_0 0x4801 |
| 66 | #define EE_WRITE_1 0x4805 |
| 67 | #define EE_DATA_READ 0x08 /* EEPROM chip data out. */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 68 | #define SROM_SR 0x00000800 /* Select Serial ROM when set */ |
| 69 | |
| 70 | #define DT_IN 0x00000004 /* Serial Data In */ |
| 71 | #define DT_CLK 0x00000002 /* Serial ROM Clock */ |
| 72 | #define DT_CS 0x00000001 /* Serial ROM Chip Select */ |
| 73 | |
| 74 | #define POLL_DEMAND 1 |
| 75 | |
Marek Vasut | 1d6c738 | 2020-07-08 07:26:14 +0200 | [diff] [blame] | 76 | #define phys_to_bus(dev, a) dm_pci_phys_to_mem((dev), (a)) |
Marek Vasut | 75244fb | 2020-04-19 03:36:46 +0200 | [diff] [blame] | 77 | |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 78 | #define NUM_RX_DESC PKTBUFSRX |
| 79 | #define NUM_TX_DESC 1 /* Number of TX descriptors */ |
| 80 | #define RX_BUFF_SZ PKTSIZE_ALIGN |
| 81 | |
| 82 | #define TOUT_LOOP 1000000 |
| 83 | |
| 84 | #define SETUP_FRAME_LEN 192 |
| 85 | |
| 86 | struct de4x5_desc { |
| 87 | volatile s32 status; |
| 88 | u32 des1; |
| 89 | u32 buf; |
| 90 | u32 next; |
| 91 | }; |
| 92 | |
Marek Vasut | a3f8908 | 2020-07-08 06:42:07 +0200 | [diff] [blame] | 93 | struct dc2114x_priv { |
Marek Vasut | f19db7f | 2020-07-08 07:01:32 +0200 | [diff] [blame] | 94 | struct de4x5_desc rx_ring[NUM_RX_DESC] __aligned(32); |
| 95 | struct de4x5_desc tx_ring[NUM_TX_DESC] __aligned(32); |
| 96 | int rx_new; /* RX descriptor ring pointer */ |
| 97 | int tx_new; /* TX descriptor ring pointer */ |
| 98 | char rx_ring_size; |
| 99 | char tx_ring_size; |
Marek Vasut | 1d6c738 | 2020-07-08 07:26:14 +0200 | [diff] [blame] | 100 | struct udevice *devno; |
Marek Vasut | a3f8908 | 2020-07-08 06:42:07 +0200 | [diff] [blame] | 101 | char *name; |
| 102 | void __iomem *iobase; |
| 103 | u8 *enetaddr; |
| 104 | }; |
| 105 | |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 106 | /* RX and TX descriptor ring */ |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 107 | static u32 dc2114x_inl(struct dc2114x_priv *priv, u32 addr) |
Marek Vasut | 75244fb | 2020-04-19 03:36:46 +0200 | [diff] [blame] | 108 | { |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 109 | return le32_to_cpu(readl(priv->iobase + addr)); |
Marek Vasut | 75244fb | 2020-04-19 03:36:46 +0200 | [diff] [blame] | 110 | } |
| 111 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 112 | static void dc2114x_outl(struct dc2114x_priv *priv, u32 command, u32 addr) |
Marek Vasut | 75244fb | 2020-04-19 03:36:46 +0200 | [diff] [blame] | 113 | { |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 114 | writel(cpu_to_le32(command), priv->iobase + addr); |
Marek Vasut | 75244fb | 2020-04-19 03:36:46 +0200 | [diff] [blame] | 115 | } |
| 116 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 117 | static void reset_de4x5(struct dc2114x_priv *priv) |
Marek Vasut | 75244fb | 2020-04-19 03:36:46 +0200 | [diff] [blame] | 118 | { |
Marek Vasut | f02b701 | 2020-04-19 03:40:03 +0200 | [diff] [blame] | 119 | u32 i; |
Marek Vasut | 75244fb | 2020-04-19 03:36:46 +0200 | [diff] [blame] | 120 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 121 | i = dc2114x_inl(priv, DE4X5_BMR); |
Marek Vasut | 75244fb | 2020-04-19 03:36:46 +0200 | [diff] [blame] | 122 | mdelay(1); |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 123 | dc2114x_outl(priv, i | BMR_SWR, DE4X5_BMR); |
Marek Vasut | 75244fb | 2020-04-19 03:36:46 +0200 | [diff] [blame] | 124 | mdelay(1); |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 125 | dc2114x_outl(priv, i, DE4X5_BMR); |
Marek Vasut | 75244fb | 2020-04-19 03:36:46 +0200 | [diff] [blame] | 126 | mdelay(1); |
| 127 | |
| 128 | for (i = 0; i < 5; i++) { |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 129 | dc2114x_inl(priv, DE4X5_BMR); |
Marek Vasut | 75244fb | 2020-04-19 03:36:46 +0200 | [diff] [blame] | 130 | mdelay(10); |
| 131 | } |
| 132 | |
| 133 | mdelay(1); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 134 | } |
| 135 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 136 | static void start_de4x5(struct dc2114x_priv *priv) |
Marek Vasut | 75244fb | 2020-04-19 03:36:46 +0200 | [diff] [blame] | 137 | { |
Marek Vasut | f02b701 | 2020-04-19 03:40:03 +0200 | [diff] [blame] | 138 | u32 omr; |
Marek Vasut | 75244fb | 2020-04-19 03:36:46 +0200 | [diff] [blame] | 139 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 140 | omr = dc2114x_inl(priv, DE4X5_OMR); |
Marek Vasut | 75244fb | 2020-04-19 03:36:46 +0200 | [diff] [blame] | 141 | omr |= OMR_ST | OMR_SR; |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 142 | dc2114x_outl(priv, omr, DE4X5_OMR); /* Enable the TX and/or RX */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 143 | } |
| 144 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 145 | static void stop_de4x5(struct dc2114x_priv *priv) |
Marek Vasut | 75244fb | 2020-04-19 03:36:46 +0200 | [diff] [blame] | 146 | { |
Marek Vasut | f02b701 | 2020-04-19 03:40:03 +0200 | [diff] [blame] | 147 | u32 omr; |
Marek Vasut | 75244fb | 2020-04-19 03:36:46 +0200 | [diff] [blame] | 148 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 149 | omr = dc2114x_inl(priv, DE4X5_OMR); |
Marek Vasut | 75244fb | 2020-04-19 03:36:46 +0200 | [diff] [blame] | 150 | omr &= ~(OMR_ST | OMR_SR); |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 151 | dc2114x_outl(priv, omr, DE4X5_OMR); /* Disable the TX and/or RX */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 152 | } |
| 153 | |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 154 | /* SROM Read and write routines. */ |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 155 | static void sendto_srom(struct dc2114x_priv *priv, u_int command, u_long addr) |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 156 | { |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 157 | dc2114x_outl(priv, command, addr); |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 158 | udelay(1); |
| 159 | } |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 160 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 161 | static int getfrom_srom(struct dc2114x_priv *priv, u_long addr) |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 162 | { |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 163 | u32 tmp = dc2114x_inl(priv, addr); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 164 | |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 165 | udelay(1); |
| 166 | return tmp; |
| 167 | } |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 168 | |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 169 | /* Note: this routine returns extra data bits for size detection. */ |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 170 | static int do_read_eeprom(struct dc2114x_priv *priv, u_long ioaddr, int location, |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 171 | int addr_len) |
| 172 | { |
| 173 | int read_cmd = location | (SROM_READ_CMD << addr_len); |
| 174 | unsigned int retval = 0; |
| 175 | int i; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 176 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 177 | sendto_srom(priv, SROM_RD | SROM_SR, ioaddr); |
| 178 | sendto_srom(priv, SROM_RD | SROM_SR | DT_CS, ioaddr); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 179 | |
Marek Vasut | 091eea8 | 2020-04-19 04:05:44 +0200 | [diff] [blame] | 180 | debug_cond(SROM_DLEVEL >= 1, " EEPROM read at %d ", location); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 181 | |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 182 | /* Shift the read command bits out. */ |
| 183 | for (i = 4 + addr_len; i >= 0; i--) { |
| 184 | short dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 185 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 186 | sendto_srom(priv, SROM_RD | SROM_SR | DT_CS | dataval, |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 187 | ioaddr); |
| 188 | udelay(10); |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 189 | sendto_srom(priv, SROM_RD | SROM_SR | DT_CS | dataval | DT_CLK, |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 190 | ioaddr); |
| 191 | udelay(10); |
Marek Vasut | 091eea8 | 2020-04-19 04:05:44 +0200 | [diff] [blame] | 192 | debug_cond(SROM_DLEVEL >= 2, "%X", |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 193 | getfrom_srom(priv, ioaddr) & 15); |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 194 | retval = (retval << 1) | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 195 | !!(getfrom_srom(priv, ioaddr) & EE_DATA_READ); |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 196 | } |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 197 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 198 | sendto_srom(priv, SROM_RD | SROM_SR | DT_CS, ioaddr); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 199 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 200 | debug_cond(SROM_DLEVEL >= 2, " :%X:", getfrom_srom(priv, ioaddr) & 15); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 201 | |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 202 | for (i = 16; i > 0; i--) { |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 203 | sendto_srom(priv, SROM_RD | SROM_SR | DT_CS | DT_CLK, ioaddr); |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 204 | udelay(10); |
Marek Vasut | 091eea8 | 2020-04-19 04:05:44 +0200 | [diff] [blame] | 205 | debug_cond(SROM_DLEVEL >= 2, "%X", |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 206 | getfrom_srom(priv, ioaddr) & 15); |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 207 | retval = (retval << 1) | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 208 | !!(getfrom_srom(priv, ioaddr) & EE_DATA_READ); |
| 209 | sendto_srom(priv, SROM_RD | SROM_SR | DT_CS, ioaddr); |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 210 | udelay(10); |
| 211 | } |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 212 | |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 213 | /* Terminate the EEPROM access. */ |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 214 | sendto_srom(priv, SROM_RD | SROM_SR, ioaddr); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 215 | |
Marek Vasut | 091eea8 | 2020-04-19 04:05:44 +0200 | [diff] [blame] | 216 | debug_cond(SROM_DLEVEL >= 2, " EEPROM value at %d is %5.5x.\n", |
| 217 | location, retval); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 218 | |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 219 | return retval; |
| 220 | } |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 221 | |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 222 | /* |
| 223 | * This executes a generic EEPROM command, typically a write or write |
| 224 | * enable. It returns the data output from the EEPROM, and thus may |
| 225 | * also be used for reads. |
| 226 | */ |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 227 | static int do_eeprom_cmd(struct dc2114x_priv *priv, u_long ioaddr, int cmd, |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 228 | int cmd_len) |
| 229 | { |
| 230 | unsigned int retval = 0; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 231 | |
Marek Vasut | 091eea8 | 2020-04-19 04:05:44 +0200 | [diff] [blame] | 232 | debug_cond(SROM_DLEVEL >= 1, " EEPROM op 0x%x: ", cmd); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 233 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 234 | sendto_srom(priv, SROM_RD | SROM_SR | DT_CS | DT_CLK, ioaddr); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 235 | |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 236 | /* Shift the command bits out. */ |
| 237 | do { |
| 238 | short dataval = (cmd & BIT(cmd_len)) ? EE_WRITE_1 : EE_WRITE_0; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 239 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 240 | sendto_srom(priv, dataval, ioaddr); |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 241 | udelay(10); |
Marek Vasut | 268cc5b | 2020-04-19 03:09:47 +0200 | [diff] [blame] | 242 | |
Marek Vasut | 091eea8 | 2020-04-19 04:05:44 +0200 | [diff] [blame] | 243 | debug_cond(SROM_DLEVEL >= 2, "%X", |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 244 | getfrom_srom(priv, ioaddr) & 15); |
Nobuhiro Iwamatsu | d45fa74 | 2010-10-19 14:03:40 +0900 | [diff] [blame] | 245 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 246 | sendto_srom(priv, dataval | DT_CLK, ioaddr); |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 247 | udelay(10); |
| 248 | retval = (retval << 1) | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 249 | !!(getfrom_srom(priv, ioaddr) & EE_DATA_READ); |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 250 | } while (--cmd_len >= 0); |
wdenk | 0260cd6 | 2004-01-02 15:01:32 +0000 | [diff] [blame] | 251 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 252 | sendto_srom(priv, SROM_RD | SROM_SR | DT_CS, ioaddr); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 253 | |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 254 | /* Terminate the EEPROM access. */ |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 255 | sendto_srom(priv, SROM_RD | SROM_SR, ioaddr); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 256 | |
Marek Vasut | 091eea8 | 2020-04-19 04:05:44 +0200 | [diff] [blame] | 257 | debug_cond(SROM_DLEVEL >= 1, " EEPROM result is 0x%5.5x.\n", retval); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 258 | |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 259 | return retval; |
| 260 | } |
Marek Vasut | 331e4ec | 2020-04-18 01:56:51 +0200 | [diff] [blame] | 261 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 262 | static int read_srom(struct dc2114x_priv *priv, u_long ioaddr, int index) |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 263 | { |
| 264 | int ee_addr_size; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 265 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 266 | ee_addr_size = (do_read_eeprom(priv, ioaddr, 0xff, 8) & BIT(18)) ? 8 : 6; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 267 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 268 | return do_eeprom_cmd(priv, ioaddr, 0xffff | |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 269 | (((SROM_READ_CMD << ee_addr_size) | index) << 16), |
| 270 | 3 + ee_addr_size + 16); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 271 | } |
| 272 | |
Marek Vasut | 29b9efc | 2020-07-08 07:20:14 +0200 | [diff] [blame] | 273 | static void send_setup_frame(struct dc2114x_priv *priv) |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 274 | { |
| 275 | char setup_frame[SETUP_FRAME_LEN]; |
| 276 | char *pa = &setup_frame[0]; |
| 277 | int i; |
| 278 | |
| 279 | memset(pa, 0xff, SETUP_FRAME_LEN); |
| 280 | |
| 281 | for (i = 0; i < ETH_ALEN; i++) { |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 282 | *(pa + (i & 1)) = priv->enetaddr[i]; |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 283 | if (i & 0x01) |
| 284 | pa += 4; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 285 | } |
| 286 | |
Marek Vasut | f19db7f | 2020-07-08 07:01:32 +0200 | [diff] [blame] | 287 | for (i = 0; priv->tx_ring[priv->tx_new].status & cpu_to_le32(T_OWN); i++) { |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 288 | if (i < TOUT_LOOP) |
| 289 | continue; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 290 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 291 | printf("%s: tx error buffer not ready\n", priv->name); |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 292 | return; |
| 293 | } |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 294 | |
Marek Vasut | f19db7f | 2020-07-08 07:01:32 +0200 | [diff] [blame] | 295 | priv->tx_ring[priv->tx_new].buf = cpu_to_le32(phys_to_bus(priv->devno, |
Marek Vasut | b8e0b47 | 2020-07-08 06:50:41 +0200 | [diff] [blame] | 296 | (u32)&setup_frame[0])); |
Marek Vasut | f19db7f | 2020-07-08 07:01:32 +0200 | [diff] [blame] | 297 | priv->tx_ring[priv->tx_new].des1 = cpu_to_le32(TD_TER | TD_SET | SETUP_FRAME_LEN); |
| 298 | priv->tx_ring[priv->tx_new].status = cpu_to_le32(T_OWN); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 299 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 300 | dc2114x_outl(priv, POLL_DEMAND, DE4X5_TPD); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 301 | |
Marek Vasut | f19db7f | 2020-07-08 07:01:32 +0200 | [diff] [blame] | 302 | for (i = 0; priv->tx_ring[priv->tx_new].status & cpu_to_le32(T_OWN); i++) { |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 303 | if (i < TOUT_LOOP) |
| 304 | continue; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 305 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 306 | printf("%s: tx buffer not ready\n", priv->name); |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 307 | return; |
| 308 | } |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 309 | |
Marek Vasut | f19db7f | 2020-07-08 07:01:32 +0200 | [diff] [blame] | 310 | if (le32_to_cpu(priv->tx_ring[priv->tx_new].status) != 0x7FFFFFFF) { |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 311 | printf("TX error status2 = 0x%08X\n", |
Marek Vasut | f19db7f | 2020-07-08 07:01:32 +0200 | [diff] [blame] | 312 | le32_to_cpu(priv->tx_ring[priv->tx_new].status)); |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 313 | } |
| 314 | |
Marek Vasut | f19db7f | 2020-07-08 07:01:32 +0200 | [diff] [blame] | 315 | priv->tx_new = (priv->tx_new + 1) % NUM_TX_DESC; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 316 | } |
| 317 | |
Marek Vasut | 29b9efc | 2020-07-08 07:20:14 +0200 | [diff] [blame] | 318 | static int dc21x4x_send_common(struct dc2114x_priv *priv, void *packet, int length) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 319 | { |
Marek Vasut | e3ffef3 | 2020-04-19 03:10:14 +0200 | [diff] [blame] | 320 | int status = -1; |
| 321 | int i; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 322 | |
| 323 | if (length <= 0) { |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 324 | printf("%s: bad packet size: %d\n", priv->name, length); |
Marek Vasut | e3ffef3 | 2020-04-19 03:10:14 +0200 | [diff] [blame] | 325 | goto done; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 326 | } |
| 327 | |
Marek Vasut | f19db7f | 2020-07-08 07:01:32 +0200 | [diff] [blame] | 328 | for (i = 0; priv->tx_ring[priv->tx_new].status & cpu_to_le32(T_OWN); i++) { |
Marek Vasut | e3ffef3 | 2020-04-19 03:10:14 +0200 | [diff] [blame] | 329 | if (i < TOUT_LOOP) |
| 330 | continue; |
| 331 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 332 | printf("%s: tx error buffer not ready\n", priv->name); |
Marek Vasut | e3ffef3 | 2020-04-19 03:10:14 +0200 | [diff] [blame] | 333 | goto done; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 334 | } |
| 335 | |
Marek Vasut | f19db7f | 2020-07-08 07:01:32 +0200 | [diff] [blame] | 336 | priv->tx_ring[priv->tx_new].buf = cpu_to_le32(phys_to_bus(priv->devno, |
Marek Vasut | b8e0b47 | 2020-07-08 06:50:41 +0200 | [diff] [blame] | 337 | (u32)packet)); |
Marek Vasut | f19db7f | 2020-07-08 07:01:32 +0200 | [diff] [blame] | 338 | priv->tx_ring[priv->tx_new].des1 = cpu_to_le32(TD_TER | TD_LS | TD_FS | length); |
| 339 | priv->tx_ring[priv->tx_new].status = cpu_to_le32(T_OWN); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 340 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 341 | dc2114x_outl(priv, POLL_DEMAND, DE4X5_TPD); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 342 | |
Marek Vasut | f19db7f | 2020-07-08 07:01:32 +0200 | [diff] [blame] | 343 | for (i = 0; priv->tx_ring[priv->tx_new].status & cpu_to_le32(T_OWN); i++) { |
Marek Vasut | e3ffef3 | 2020-04-19 03:10:14 +0200 | [diff] [blame] | 344 | if (i < TOUT_LOOP) |
| 345 | continue; |
| 346 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 347 | printf(".%s: tx buffer not ready\n", priv->name); |
Marek Vasut | e3ffef3 | 2020-04-19 03:10:14 +0200 | [diff] [blame] | 348 | goto done; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 349 | } |
| 350 | |
Marek Vasut | f19db7f | 2020-07-08 07:01:32 +0200 | [diff] [blame] | 351 | if (le32_to_cpu(priv->tx_ring[priv->tx_new].status) & TD_ES) { |
| 352 | priv->tx_ring[priv->tx_new].status = 0x0; |
Marek Vasut | e3ffef3 | 2020-04-19 03:10:14 +0200 | [diff] [blame] | 353 | goto done; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 354 | } |
| 355 | |
| 356 | status = length; |
| 357 | |
Marek Vasut | e3ffef3 | 2020-04-19 03:10:14 +0200 | [diff] [blame] | 358 | done: |
Marek Vasut | f19db7f | 2020-07-08 07:01:32 +0200 | [diff] [blame] | 359 | priv->tx_new = (priv->tx_new + 1) % NUM_TX_DESC; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 360 | return status; |
| 361 | } |
| 362 | |
Marek Vasut | dabf04f | 2020-07-08 07:12:58 +0200 | [diff] [blame] | 363 | static int dc21x4x_recv_check(struct dc2114x_priv *priv) |
| 364 | { |
| 365 | int length = 0; |
| 366 | u32 status; |
| 367 | |
| 368 | status = le32_to_cpu(priv->rx_ring[priv->rx_new].status); |
| 369 | |
| 370 | if (status & R_OWN) |
| 371 | return 0; |
| 372 | |
| 373 | if (status & RD_LS) { |
| 374 | /* Valid frame status. */ |
| 375 | if (status & RD_ES) { |
| 376 | /* There was an error. */ |
| 377 | printf("RX error status = 0x%08X\n", status); |
| 378 | return -EINVAL; |
| 379 | } else { |
| 380 | /* A valid frame received. */ |
| 381 | length = (le32_to_cpu(priv->rx_ring[priv->rx_new].status) |
| 382 | >> 16); |
| 383 | |
| 384 | return length; |
| 385 | } |
| 386 | } |
| 387 | |
| 388 | return -EAGAIN; |
| 389 | } |
| 390 | |
Marek Vasut | 29b9efc | 2020-07-08 07:20:14 +0200 | [diff] [blame] | 391 | static int dc21x4x_init_common(struct dc2114x_priv *priv) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 392 | { |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 393 | int i; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 394 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 395 | reset_de4x5(priv); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 396 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 397 | if (dc2114x_inl(priv, DE4X5_STS) & (STS_TS | STS_RS)) { |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 398 | printf("Error: Cannot reset ethernet controller.\n"); |
| 399 | return -1; |
| 400 | } |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 401 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 402 | dc2114x_outl(priv, OMR_SDP | OMR_PS | OMR_PM, DE4X5_OMR); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 403 | |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 404 | for (i = 0; i < NUM_RX_DESC; i++) { |
Marek Vasut | f19db7f | 2020-07-08 07:01:32 +0200 | [diff] [blame] | 405 | priv->rx_ring[i].status = cpu_to_le32(R_OWN); |
| 406 | priv->rx_ring[i].des1 = cpu_to_le32(RX_BUFF_SZ); |
| 407 | priv->rx_ring[i].buf = cpu_to_le32(phys_to_bus(priv->devno, |
Marek Vasut | b8e0b47 | 2020-07-08 06:50:41 +0200 | [diff] [blame] | 408 | (u32)net_rx_packets[i])); |
Marek Vasut | f19db7f | 2020-07-08 07:01:32 +0200 | [diff] [blame] | 409 | priv->rx_ring[i].next = 0; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 410 | } |
| 411 | |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 412 | for (i = 0; i < NUM_TX_DESC; i++) { |
Marek Vasut | f19db7f | 2020-07-08 07:01:32 +0200 | [diff] [blame] | 413 | priv->tx_ring[i].status = 0; |
| 414 | priv->tx_ring[i].des1 = 0; |
| 415 | priv->tx_ring[i].buf = 0; |
| 416 | priv->tx_ring[i].next = 0; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 417 | } |
| 418 | |
Marek Vasut | f19db7f | 2020-07-08 07:01:32 +0200 | [diff] [blame] | 419 | priv->rx_ring_size = NUM_RX_DESC; |
| 420 | priv->tx_ring_size = NUM_TX_DESC; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 421 | |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 422 | /* Write the end of list marker to the descriptor lists. */ |
Marek Vasut | f19db7f | 2020-07-08 07:01:32 +0200 | [diff] [blame] | 423 | priv->rx_ring[priv->rx_ring_size - 1].des1 |= cpu_to_le32(RD_RER); |
| 424 | priv->tx_ring[priv->tx_ring_size - 1].des1 |= cpu_to_le32(TD_TER); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 425 | |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 426 | /* Tell the adapter where the TX/RX rings are located. */ |
Marek Vasut | f19db7f | 2020-07-08 07:01:32 +0200 | [diff] [blame] | 427 | dc2114x_outl(priv, phys_to_bus(priv->devno, (u32)&priv->rx_ring), |
Marek Vasut | b8e0b47 | 2020-07-08 06:50:41 +0200 | [diff] [blame] | 428 | DE4X5_RRBA); |
Marek Vasut | f19db7f | 2020-07-08 07:01:32 +0200 | [diff] [blame] | 429 | dc2114x_outl(priv, phys_to_bus(priv->devno, (u32)&priv->tx_ring), |
Marek Vasut | b8e0b47 | 2020-07-08 06:50:41 +0200 | [diff] [blame] | 430 | DE4X5_TRBA); |
Marek Vasut | e13635a | 2020-04-19 03:10:50 +0200 | [diff] [blame] | 431 | |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 432 | start_de4x5(priv); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 433 | |
Marek Vasut | f19db7f | 2020-07-08 07:01:32 +0200 | [diff] [blame] | 434 | priv->tx_new = 0; |
| 435 | priv->rx_new = 0; |
wdenk | 0260cd6 | 2004-01-02 15:01:32 +0000 | [diff] [blame] | 436 | |
Marek Vasut | 29b9efc | 2020-07-08 07:20:14 +0200 | [diff] [blame] | 437 | send_setup_frame(priv); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 438 | |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 439 | return 0; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 440 | } |
| 441 | |
Marek Vasut | 29b9efc | 2020-07-08 07:20:14 +0200 | [diff] [blame] | 442 | static void dc21x4x_halt_common(struct dc2114x_priv *priv) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 443 | { |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 444 | stop_de4x5(priv); |
| 445 | dc2114x_outl(priv, 0, DE4X5_SICR); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 446 | } |
| 447 | |
Marek Vasut | a3f8908 | 2020-07-08 06:42:07 +0200 | [diff] [blame] | 448 | static void read_hw_addr(struct dc2114x_priv *priv) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 449 | { |
Marek Vasut | a3f8908 | 2020-07-08 06:42:07 +0200 | [diff] [blame] | 450 | u_short tmp, *p = (u_short *)(&priv->enetaddr[0]); |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 451 | int i, j = 0; |
Marek Vasut | b46c7a0 | 2020-04-19 03:11:06 +0200 | [diff] [blame] | 452 | |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 453 | for (i = 0; i < (ETH_ALEN >> 1); i++) { |
Marek Vasut | 25ada1f | 2020-07-08 06:46:09 +0200 | [diff] [blame] | 454 | tmp = read_srom(priv, DE4X5_APROM, (SROM_HWADD >> 1) + i); |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 455 | *p = le16_to_cpu(tmp); |
| 456 | j += *p++; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 457 | } |
| 458 | |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 459 | if (!j || j == 0x2fffd) { |
Marek Vasut | a3f8908 | 2020-07-08 06:42:07 +0200 | [diff] [blame] | 460 | memset(priv->enetaddr, 0, ETH_ALEN); |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 461 | debug("Warning: can't read HW address from SROM.\n"); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 462 | } |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 463 | } |
| 464 | |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 465 | static struct pci_device_id supported[] = { |
Marek Vasut | 7cc35c8 | 2020-06-20 17:36:42 +0200 | [diff] [blame] | 466 | { PCI_DEVICE(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST) }, |
| 467 | { PCI_DEVICE(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21142) }, |
Marek Vasut | 5e2ad05 | 2020-04-19 04:00:49 +0200 | [diff] [blame] | 468 | { } |
| 469 | }; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 470 | |
Marek Vasut | 1d6c738 | 2020-07-08 07:26:14 +0200 | [diff] [blame] | 471 | static int dc2114x_start(struct udevice *dev) |
| 472 | { |
Simon Glass | fa20e93 | 2020-12-03 16:55:20 -0700 | [diff] [blame] | 473 | struct eth_pdata *plat = dev_get_plat(dev); |
Marek Vasut | 1d6c738 | 2020-07-08 07:26:14 +0200 | [diff] [blame] | 474 | struct dc2114x_priv *priv = dev_get_priv(dev); |
| 475 | |
| 476 | memcpy(priv->enetaddr, plat->enetaddr, sizeof(plat->enetaddr)); |
| 477 | |
| 478 | /* Ensure we're not sleeping. */ |
| 479 | dm_pci_write_config8(dev, PCI_CFDA_PSM, WAKEUP); |
| 480 | |
| 481 | return dc21x4x_init_common(priv); |
| 482 | } |
| 483 | |
| 484 | static void dc2114x_stop(struct udevice *dev) |
| 485 | { |
| 486 | struct dc2114x_priv *priv = dev_get_priv(dev); |
| 487 | |
| 488 | dc21x4x_halt_common(priv); |
| 489 | |
| 490 | dm_pci_write_config8(dev, PCI_CFDA_PSM, SLEEP); |
| 491 | } |
| 492 | |
| 493 | static int dc2114x_send(struct udevice *dev, void *packet, int length) |
| 494 | { |
| 495 | struct dc2114x_priv *priv = dev_get_priv(dev); |
| 496 | int ret; |
| 497 | |
| 498 | ret = dc21x4x_send_common(priv, packet, length); |
| 499 | |
| 500 | return ret ? 0 : -ETIMEDOUT; |
| 501 | } |
| 502 | |
| 503 | static int dc2114x_recv(struct udevice *dev, int flags, uchar **packetp) |
| 504 | { |
| 505 | struct dc2114x_priv *priv = dev_get_priv(dev); |
| 506 | int ret; |
| 507 | |
| 508 | ret = dc21x4x_recv_check(priv); |
| 509 | |
| 510 | if (ret < 0) { |
| 511 | /* Update entry information. */ |
| 512 | priv->rx_new = (priv->rx_new + 1) % priv->rx_ring_size; |
| 513 | ret = 0; |
| 514 | } |
| 515 | |
| 516 | if (!ret) |
| 517 | return 0; |
| 518 | |
| 519 | *packetp = net_rx_packets[priv->rx_new]; |
| 520 | |
| 521 | return ret - 4; |
| 522 | } |
| 523 | |
| 524 | static int dc2114x_free_pkt(struct udevice *dev, uchar *packet, int length) |
| 525 | { |
| 526 | struct dc2114x_priv *priv = dev_get_priv(dev); |
| 527 | |
| 528 | priv->rx_ring[priv->rx_new].status = cpu_to_le32(R_OWN); |
| 529 | |
| 530 | /* Update entry information. */ |
| 531 | priv->rx_new = (priv->rx_new + 1) % priv->rx_ring_size; |
| 532 | |
| 533 | return 0; |
| 534 | } |
| 535 | |
| 536 | static int dc2114x_read_rom_hwaddr(struct udevice *dev) |
| 537 | { |
| 538 | struct dc2114x_priv *priv = dev_get_priv(dev); |
| 539 | |
| 540 | read_hw_addr(priv); |
| 541 | |
| 542 | return 0; |
| 543 | } |
| 544 | |
| 545 | static int dc2114x_bind(struct udevice *dev) |
| 546 | { |
| 547 | static int card_number; |
| 548 | char name[16]; |
| 549 | |
| 550 | sprintf(name, "dc2114x#%u", card_number++); |
| 551 | |
| 552 | return device_set_name(dev, name); |
| 553 | } |
| 554 | |
| 555 | static int dc2114x_probe(struct udevice *dev) |
| 556 | { |
Simon Glass | fa20e93 | 2020-12-03 16:55:20 -0700 | [diff] [blame] | 557 | struct eth_pdata *plat = dev_get_plat(dev); |
Marek Vasut | 1d6c738 | 2020-07-08 07:26:14 +0200 | [diff] [blame] | 558 | struct dc2114x_priv *priv = dev_get_priv(dev); |
| 559 | u16 command, status; |
| 560 | u32 iobase; |
| 561 | |
| 562 | dm_pci_read_config32(dev, PCI_BASE_ADDRESS_1, &iobase); |
| 563 | iobase &= ~0xf; |
| 564 | |
| 565 | debug("dc2114x: DEC 2114x PCI Device @0x%x\n", iobase); |
| 566 | |
| 567 | priv->devno = dev; |
| 568 | priv->enetaddr = plat->enetaddr; |
| 569 | priv->iobase = (void __iomem *)dm_pci_mem_to_phys(dev, iobase); |
| 570 | |
| 571 | command = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER; |
| 572 | dm_pci_write_config16(dev, PCI_COMMAND, command); |
| 573 | dm_pci_read_config16(dev, PCI_COMMAND, &status); |
| 574 | if ((status & command) != command) { |
| 575 | printf("dc2114x: Couldn't enable IO access or Bus Mastering\n"); |
| 576 | return -EINVAL; |
| 577 | } |
| 578 | |
| 579 | dm_pci_write_config8(dev, PCI_LATENCY_TIMER, 0x60); |
| 580 | |
| 581 | return 0; |
| 582 | } |
| 583 | |
| 584 | static const struct eth_ops dc2114x_ops = { |
| 585 | .start = dc2114x_start, |
| 586 | .send = dc2114x_send, |
| 587 | .recv = dc2114x_recv, |
| 588 | .stop = dc2114x_stop, |
| 589 | .free_pkt = dc2114x_free_pkt, |
| 590 | .read_rom_hwaddr = dc2114x_read_rom_hwaddr, |
| 591 | }; |
| 592 | |
| 593 | U_BOOT_DRIVER(eth_dc2114x) = { |
| 594 | .name = "eth_dc2114x", |
| 595 | .id = UCLASS_ETH, |
| 596 | .bind = dc2114x_bind, |
| 597 | .probe = dc2114x_probe, |
| 598 | .ops = &dc2114x_ops, |
Simon Glass | 8a2b47f | 2020-12-03 16:55:17 -0700 | [diff] [blame] | 599 | .priv_auto = sizeof(struct dc2114x_priv), |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 600 | .plat_auto = sizeof(struct eth_pdata), |
Marek Vasut | 1d6c738 | 2020-07-08 07:26:14 +0200 | [diff] [blame] | 601 | }; |
| 602 | |
| 603 | U_BOOT_PCI_DEVICE(eth_dc2114x, supported); |