Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Jorge Ramirez-Ortiz | 92c1eff | 2018-01-10 11:33:49 +0100 | [diff] [blame] | 2 | /* |
Jorge Ramirez-Ortiz | 92c1eff | 2018-01-10 11:33:49 +0100 | [diff] [blame] | 3 | * (C) Copyright 2017 Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> |
Jorge Ramirez-Ortiz | 92c1eff | 2018-01-10 11:33:49 +0100 | [diff] [blame] | 4 | */ |
Konrad Dybcio | 6c0b844 | 2023-11-07 12:41:01 +0000 | [diff] [blame] | 5 | #ifndef _CLOCK_QCOM_H |
| 6 | #define _CLOCK_QCOM_H |
Jorge Ramirez-Ortiz | 92c1eff | 2018-01-10 11:33:49 +0100 | [diff] [blame] | 7 | |
Caleb Connolly | 7a63294 | 2023-11-07 12:41:02 +0000 | [diff] [blame] | 8 | #include <asm/io.h> |
| 9 | |
Jorge Ramirez-Ortiz | 92c1eff | 2018-01-10 11:33:49 +0100 | [diff] [blame] | 10 | #define CFG_CLK_SRC_CXO (0 << 8) |
| 11 | #define CFG_CLK_SRC_GPLL0 (1 << 8) |
Caleb Connolly | e55fb90 | 2024-04-08 15:06:49 +0200 | [diff] [blame] | 12 | #define CFG_CLK_SRC_GPLL0_AUX2 (2 << 8) |
Caleb Connolly | 78672c6 | 2024-04-08 15:06:51 +0200 | [diff] [blame] | 13 | #define CFG_CLK_SRC_GPLL9 (2 << 8) |
Caleb Connolly | e55fb90 | 2024-04-08 15:06:49 +0200 | [diff] [blame] | 14 | #define CFG_CLK_SRC_GPLL6 (4 << 8) |
| 15 | #define CFG_CLK_SRC_GPLL7 (3 << 8) |
Caleb Connolly | 9726810 | 2024-04-09 20:03:04 +0200 | [diff] [blame] | 16 | #define CFG_CLK_SRC_GPLL4 (5 << 8) |
Dzmitry Sankouski | 038f2b9 | 2021-10-17 13:44:30 +0300 | [diff] [blame] | 17 | #define CFG_CLK_SRC_GPLL0_EVEN (6 << 8) |
Jorge Ramirez-Ortiz | 92c1eff | 2018-01-10 11:33:49 +0100 | [diff] [blame] | 18 | #define CFG_CLK_SRC_MASK (7 << 8) |
| 19 | |
Caleb Connolly | cbdad44 | 2024-04-03 14:07:40 +0200 | [diff] [blame] | 20 | #define RCG_CFG_REG 0x4 |
| 21 | #define RCG_M_REG 0x8 |
| 22 | #define RCG_N_REG 0xc |
| 23 | #define RCG_D_REG 0x10 |
| 24 | |
Ramon Fried | ae29977 | 2018-05-16 12:13:39 +0300 | [diff] [blame] | 25 | struct pll_vote_clk { |
Jorge Ramirez-Ortiz | 92c1eff | 2018-01-10 11:33:49 +0100 | [diff] [blame] | 26 | uintptr_t status; |
| 27 | int status_bit; |
| 28 | uintptr_t ena_vote; |
| 29 | int vote_bit; |
| 30 | }; |
| 31 | |
Ramon Fried | ae29977 | 2018-05-16 12:13:39 +0300 | [diff] [blame] | 32 | struct vote_clk { |
| 33 | uintptr_t cbcr_reg; |
| 34 | uintptr_t ena_vote; |
| 35 | int vote_bit; |
| 36 | }; |
Jorge Ramirez-Ortiz | 92c1eff | 2018-01-10 11:33:49 +0100 | [diff] [blame] | 37 | |
Caleb Connolly | 397c84f | 2023-11-07 12:41:05 +0000 | [diff] [blame] | 38 | struct freq_tbl { |
| 39 | uint freq; |
| 40 | uint src; |
| 41 | u8 pre_div; |
| 42 | u16 m; |
| 43 | u16 n; |
| 44 | }; |
| 45 | |
| 46 | #define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) } |
| 47 | |
Caleb Connolly | 7a63294 | 2023-11-07 12:41:02 +0000 | [diff] [blame] | 48 | struct gate_clk { |
| 49 | uintptr_t reg; |
| 50 | u32 en_val; |
| 51 | const char *name; |
| 52 | }; |
| 53 | |
| 54 | #ifdef DEBUG |
| 55 | #define GATE_CLK(clk, reg, val) [clk] = { reg, val, #clk } |
| 56 | #else |
| 57 | #define GATE_CLK(clk, reg, val) [clk] = { reg, val, NULL } |
| 58 | #endif |
| 59 | |
Konrad Dybcio | 6c0b844 | 2023-11-07 12:41:01 +0000 | [diff] [blame] | 60 | struct qcom_reset_map { |
| 61 | unsigned int reg; |
| 62 | u8 bit; |
| 63 | }; |
| 64 | |
Volodymyr Babchuk | aae4649 | 2024-03-11 21:33:45 +0000 | [diff] [blame] | 65 | struct qcom_power_map { |
| 66 | unsigned int reg; |
| 67 | }; |
| 68 | |
Caleb Connolly | 10a0abb | 2023-11-07 12:41:03 +0000 | [diff] [blame] | 69 | struct clk; |
| 70 | |
Konrad Dybcio | 6c0b844 | 2023-11-07 12:41:01 +0000 | [diff] [blame] | 71 | struct msm_clk_data { |
Volodymyr Babchuk | aae4649 | 2024-03-11 21:33:45 +0000 | [diff] [blame] | 72 | const struct qcom_power_map *power_domains; |
| 73 | unsigned long num_power_domains; |
Konrad Dybcio | 6c0b844 | 2023-11-07 12:41:01 +0000 | [diff] [blame] | 74 | const struct qcom_reset_map *resets; |
| 75 | unsigned long num_resets; |
Caleb Connolly | 7a63294 | 2023-11-07 12:41:02 +0000 | [diff] [blame] | 76 | const struct gate_clk *clks; |
| 77 | unsigned long num_clks; |
Caleb Connolly | 10a0abb | 2023-11-07 12:41:03 +0000 | [diff] [blame] | 78 | |
| 79 | int (*enable)(struct clk *clk); |
| 80 | unsigned long (*set_rate)(struct clk *clk, unsigned long rate); |
Konrad Dybcio | 6c0b844 | 2023-11-07 12:41:01 +0000 | [diff] [blame] | 81 | }; |
| 82 | |
Jorge Ramirez-Ortiz | 92c1eff | 2018-01-10 11:33:49 +0100 | [diff] [blame] | 83 | struct msm_clk_priv { |
Konrad Dybcio | 6c0b844 | 2023-11-07 12:41:01 +0000 | [diff] [blame] | 84 | phys_addr_t base; |
| 85 | struct msm_clk_data *data; |
Jorge Ramirez-Ortiz | 92c1eff | 2018-01-10 11:33:49 +0100 | [diff] [blame] | 86 | }; |
| 87 | |
Konrad Dybcio | 6c0b844 | 2023-11-07 12:41:01 +0000 | [diff] [blame] | 88 | int qcom_cc_bind(struct udevice *parent); |
Ramon Fried | ae29977 | 2018-05-16 12:13:39 +0300 | [diff] [blame] | 89 | void clk_enable_gpll0(phys_addr_t base, const struct pll_vote_clk *gpll0); |
Jorge Ramirez-Ortiz | 92c1eff | 2018-01-10 11:33:49 +0100 | [diff] [blame] | 90 | void clk_bcr_update(phys_addr_t apps_cmd_rgcr); |
| 91 | void clk_enable_cbc(phys_addr_t cbcr); |
Ramon Fried | ae29977 | 2018-05-16 12:13:39 +0300 | [diff] [blame] | 92 | void clk_enable_vote_clk(phys_addr_t base, const struct vote_clk *vclk); |
Caleb Connolly | 397c84f | 2023-11-07 12:41:05 +0000 | [diff] [blame] | 93 | const struct freq_tbl *qcom_find_freq(const struct freq_tbl *f, uint rate); |
Caleb Connolly | cbdad44 | 2024-04-03 14:07:40 +0200 | [diff] [blame] | 94 | void clk_rcg_set_rate_mnd(phys_addr_t base, uint32_t cmd_rcgr, |
Caleb Connolly | fbacc67 | 2023-11-07 12:41:04 +0000 | [diff] [blame] | 95 | int div, int m, int n, int source, u8 mnd_width); |
Caleb Connolly | cbdad44 | 2024-04-03 14:07:40 +0200 | [diff] [blame] | 96 | void clk_rcg_set_rate(phys_addr_t base, uint32_t cmd_rcgr, int div, |
Sumit Garg | a3e804d | 2023-02-01 19:28:57 +0530 | [diff] [blame] | 97 | int source); |
Jorge Ramirez-Ortiz | 92c1eff | 2018-01-10 11:33:49 +0100 | [diff] [blame] | 98 | |
Caleb Connolly | 7a63294 | 2023-11-07 12:41:02 +0000 | [diff] [blame] | 99 | static inline void qcom_gate_clk_en(const struct msm_clk_priv *priv, unsigned long id) |
| 100 | { |
| 101 | u32 val; |
| 102 | if (id >= priv->data->num_clks || priv->data->clks[id].reg == 0) |
| 103 | return; |
| 104 | |
| 105 | val = readl(priv->base + priv->data->clks[id].reg); |
| 106 | writel(val | priv->data->clks[id].en_val, priv->base + priv->data->clks[id].reg); |
| 107 | } |
| 108 | |
Jorge Ramirez-Ortiz | 92c1eff | 2018-01-10 11:33:49 +0100 | [diff] [blame] | 109 | #endif |