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Ian Campbelld8e69e02014-10-24 21:20:44 +01001if ARCH_SUNXI
2
Hans de Goedef07872b2015-04-06 20:33:34 +02003# Note only one of these may be selected at a time! But hidden choices are
4# not supported by Kconfig
5config SUNXI_GEN_SUN4I
6 bool
7 ---help---
8 Select this for sunxi SoCs which have resets and clocks set up
9 as the original A10 (mach-sun4i).
10
11config SUNXI_GEN_SUN6I
12 bool
13 ---help---
14 Select this for sunxi SoCs which have sun6i like periphery, like
15 separate ahb reset control registers, custom pmic bus, new style
16 watchdog, etc.
17
18
Ian Campbelld8e69e02014-10-24 21:20:44 +010019choice
20 prompt "Sunxi SoC Variant"
Joe Hershbergerf0699602015-05-12 14:46:23 -050021 optional
Ian Campbelld8e69e02014-10-24 21:20:44 +010022
Ian Campbell4a24a1c2014-10-24 21:20:45 +010023config MACH_SUN4I
Ian Campbelld8e69e02014-10-24 21:20:44 +010024 bool "sun4i (Allwinner A10)"
25 select CPU_V7
Hans de Goedef07872b2015-04-06 20:33:34 +020026 select SUNXI_GEN_SUN4I
Ian Campbelld8e69e02014-10-24 21:20:44 +010027 select SUPPORT_SPL
28
Ian Campbell4a24a1c2014-10-24 21:20:45 +010029config MACH_SUN5I
Ian Campbelld8e69e02014-10-24 21:20:44 +010030 bool "sun5i (Allwinner A13)"
31 select CPU_V7
Hans de Goedef07872b2015-04-06 20:33:34 +020032 select SUNXI_GEN_SUN4I
Ian Campbelld8e69e02014-10-24 21:20:44 +010033 select SUPPORT_SPL
34
Ian Campbell4a24a1c2014-10-24 21:20:45 +010035config MACH_SUN6I
Ian Campbelld8e69e02014-10-24 21:20:44 +010036 bool "sun6i (Allwinner A31)"
37 select CPU_V7
Hans de Goedef07872b2015-04-06 20:33:34 +020038 select SUNXI_GEN_SUN6I
Hans de Goedea5403b92014-10-25 20:18:10 +020039 select SUPPORT_SPL
Ian Campbelld8e69e02014-10-24 21:20:44 +010040
Ian Campbell4a24a1c2014-10-24 21:20:45 +010041config MACH_SUN7I
Ian Campbelld8e69e02014-10-24 21:20:44 +010042 bool "sun7i (Allwinner A20)"
43 select CPU_V7
Hans de Goede85437352014-11-14 09:34:30 +010044 select CPU_V7_HAS_NONSEC
45 select CPU_V7_HAS_VIRT
Hans de Goedef07872b2015-04-06 20:33:34 +020046 select SUNXI_GEN_SUN4I
Ian Campbelld8e69e02014-10-24 21:20:44 +010047 select SUPPORT_SPL
Hans de Goedea5636382014-10-24 20:12:04 +020048 select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
Ian Campbelld8e69e02014-10-24 21:20:44 +010049
Hans de Goedef055ed62015-04-06 20:55:39 +020050config MACH_SUN8I_A23
Ian Campbelld8e69e02014-10-24 21:20:44 +010051 bool "sun8i (Allwinner A23)"
52 select CPU_V7
Hans de Goedef07872b2015-04-06 20:33:34 +020053 select SUNXI_GEN_SUN6I
Hans de Goede966d2392014-12-07 14:34:27 +010054 select SUPPORT_SPL
Ian Campbelld8e69e02014-10-24 21:20:44 +010055
Vishnu Patekar3702f142015-03-01 23:47:48 +053056config MACH_SUN8I_A33
57 bool "sun8i (Allwinner A33)"
58 select CPU_V7
59 select SUNXI_GEN_SUN6I
60 select SUPPORT_SPL
61
Hans de Goede7bfe2bb2015-01-13 19:25:06 +010062config MACH_SUN9I
63 bool "sun9i (Allwinner A80)"
64 select CPU_V7
65 select SUNXI_GEN_SUN6I
66
Ian Campbelld8e69e02014-10-24 21:20:44 +010067endchoice
Maxime Ripard2c519412014-10-03 20:16:29 +080068
Hans de Goedef055ed62015-04-06 20:55:39 +020069# The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33"
70config MACH_SUN8I
71 bool
72 default y if MACH_SUN8I_A23 || MACH_SUN8I_A33
73
74
Hans de Goede3aeaa282014-11-15 19:46:39 +010075config DRAM_CLK
Hans de Goede59d9fc72015-01-17 14:24:55 +010076 int "sunxi dram clock speed"
77 default 312 if MACH_SUN6I || MACH_SUN8I
78 default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
Hans de Goede3aeaa282014-11-15 19:46:39 +010079 ---help---
80 Set the dram clock speed, valid range 240 - 480, must be a multiple
Hans de Goede06ddc452015-01-25 11:29:27 +010081 of 24.
Hans de Goede3aeaa282014-11-15 19:46:39 +010082
Siarhei Siamashka47359bb2015-02-01 00:27:06 +020083if MACH_SUN5I || MACH_SUN7I
84config DRAM_MBUS_CLK
85 int "sunxi mbus clock speed"
86 default 300
87 ---help---
88 Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
89
90endif
91
Hans de Goede3aeaa282014-11-15 19:46:39 +010092config DRAM_ZQ
Hans de Goede59d9fc72015-01-17 14:24:55 +010093 int "sunxi dram zq value"
94 default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
95 default 127 if MACH_SUN7I
Hans de Goede3aeaa282014-11-15 19:46:39 +010096 ---help---
Hans de Goede06ddc452015-01-25 11:29:27 +010097 Set the dram zq value.
Hans de Goede3aeaa282014-11-15 19:46:39 +010098
Hans de Goedeffdc05c2015-05-13 15:00:46 +020099config DRAM_ODT_EN
100 bool "sunxi dram odt enable"
101 default n if !MACH_SUN8I_A23
102 default y if MACH_SUN8I_A23
103 ---help---
104 Select this to enable dram odt (on die termination).
105
Hans de Goede59d9fc72015-01-17 14:24:55 +0100106if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
107config DRAM_EMR1
108 int "sunxi dram emr1 value"
109 default 0 if MACH_SUN4I
110 default 4 if MACH_SUN5I || MACH_SUN7I
111 ---help---
Hans de Goede06ddc452015-01-25 11:29:27 +0100112 Set the dram controller emr1 value.
Siarhei Siamashka9900db12015-02-01 00:27:05 +0200113
Siarhei Siamashka47359bb2015-02-01 00:27:06 +0200114config DRAM_TPR3
115 hex "sunxi dram tpr3 value"
116 default 0
117 ---help---
118 Set the dram controller tpr3 parameter. This parameter configures
119 the delay on the command lane and also phase shifts, which are
120 applied for sampling incoming read data. The default value 0
121 means that no phase/delay adjustments are necessary. Properly
122 configuring this parameter increases reliability at high DRAM
123 clock speeds.
124
125config DRAM_DQS_GATING_DELAY
126 hex "sunxi dram dqs_gating_delay value"
127 default 0
128 ---help---
129 Set the dram controller dqs_gating_delay parmeter. Each byte
130 encodes the DQS gating delay for each byte lane. The delay
131 granularity is 1/4 cycle. For example, the value 0x05060606
132 means that the delay is 5 quarter-cycles for one lane (1.25
133 cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
134 The default value 0 means autodetection. The results of hardware
135 autodetection are not very reliable and depend on the chip
136 temperature (sometimes producing different results on cold start
137 and warm reboot). But the accuracy of hardware autodetection
138 is usually good enough, unless running at really high DRAM
139 clocks speeds (up to 600MHz). If unsure, keep as 0.
140
Siarhei Siamashka9900db12015-02-01 00:27:05 +0200141choice
142 prompt "sunxi dram timings"
143 default DRAM_TIMINGS_VENDOR_MAGIC
144 ---help---
145 Select the timings of the DDR3 chips.
146
147config DRAM_TIMINGS_VENDOR_MAGIC
148 bool "Magic vendor timings from Android"
149 ---help---
150 The same DRAM timings as in the Allwinner boot0 bootloader.
151
152config DRAM_TIMINGS_DDR3_1066F_1333H
153 bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
154 ---help---
155 Use the timings of the standard JEDEC DDR3-1066F speed bin for
156 DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
157 for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips
158 used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
159 or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
160 that down binning to DDR3-1066F is supported (because DDR3-1066F
161 uses a bit faster timings than DDR3-1333H).
162
163config DRAM_TIMINGS_DDR3_800E_1066G_1333J
164 bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
165 ---help---
166 Use the timings of the slowest possible JEDEC speed bin for the
167 selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
168 DDR3-800E, DDR3-1066G or DDR3-1333J.
169
170endchoice
171
Hans de Goede3aeaa282014-11-15 19:46:39 +0100172endif
173
Hans de Goedeffdc05c2015-05-13 15:00:46 +0200174if MACH_SUN8I_A23
175config DRAM_ODT_CORRECTION
176 int "sunxi dram odt correction value"
177 default 0
178 ---help---
179 Set the dram odt correction value (range -255 - 255). In allwinner
180 fex files, this option is found in bits 8-15 of the u32 odt_en variable
181 in the [dram] section. When bit 31 of the odt_en variable is set
182 then the correction is negative. Usually the value for this is 0.
183endif
184
Iain Paton630df142015-03-28 10:26:38 +0000185config SYS_CLK_FREQ
186 default 912000000 if MACH_SUN7I
187 default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
188
Maxime Ripard2c519412014-10-03 20:16:29 +0800189config SYS_CONFIG_NAME
Ian Campbell4a24a1c2014-10-24 21:20:45 +0100190 default "sun4i" if MACH_SUN4I
191 default "sun5i" if MACH_SUN5I
192 default "sun6i" if MACH_SUN6I
193 default "sun7i" if MACH_SUN7I
194 default "sun8i" if MACH_SUN8I
Hans de Goede7bfe2bb2015-01-13 19:25:06 +0100195 default "sun9i" if MACH_SUN9I
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900196
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900197config SYS_BOARD
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900198 default "sunxi"
199
200config SYS_SOC
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900201 default "sunxi"
202
Siarhei Siamashka121161f2014-12-25 02:34:47 +0200203config UART0_PORT_F
204 bool "UART0 on MicroSD breakout board"
Siarhei Siamashka121161f2014-12-25 02:34:47 +0200205 default n
206 ---help---
207 Repurpose the SD card slot for getting access to the UART0 serial
208 console. Primarily useful only for low level u-boot debugging on
209 tablets, where normal UART0 is difficult to access and requires
210 device disassembly and/or soldering. As the SD card can't be used
211 at the same time, the system can be only booted in the FEL mode.
212 Only enable this if you really know what you are doing.
213
Hans de Goede05e5bcb2014-10-22 14:56:36 +0200214config OLD_SUNXI_KERNEL_COMPAT
215 boolean "Enable workarounds for booting old kernels"
216 default n
217 ---help---
218 Set this to enable various workarounds for old kernels, this results in
219 sub-optimal settings for newer kernels, only enable if needed.
220
Hans de Goede7412ef82014-10-02 20:29:26 +0200221config MMC0_CD_PIN
222 string "Card detect pin for mmc0"
223 default ""
224 ---help---
225 Set the card detect pin for mmc0, leave empty to not use cd. This
226 takes a string in the format understood by sunxi_name_to_gpio, e.g.
227 PH1 for pin 1 of port H.
228
229config MMC1_CD_PIN
230 string "Card detect pin for mmc1"
231 default ""
232 ---help---
233 See MMC0_CD_PIN help text.
234
235config MMC2_CD_PIN
236 string "Card detect pin for mmc2"
237 default ""
238 ---help---
239 See MMC0_CD_PIN help text.
240
241config MMC3_CD_PIN
242 string "Card detect pin for mmc3"
243 default ""
244 ---help---
245 See MMC0_CD_PIN help text.
246
Paul Kocialkowskid390d8c2015-03-22 18:12:23 +0100247config MMC1_PINS
248 string "Pins for mmc1"
249 default ""
250 ---help---
251 Set the pins used for mmc1, when applicable. This takes a string in the
252 format understood by sunxi_name_to_gpio_bank, e.g. PH for port H.
253
254config MMC2_PINS
255 string "Pins for mmc2"
256 default ""
257 ---help---
258 See MMC1_PINS help text.
259
260config MMC3_PINS
261 string "Pins for mmc3"
262 default ""
263 ---help---
264 See MMC1_PINS help text.
265
Hans de Goedeaf593e42014-10-02 20:43:50 +0200266config MMC_SUNXI_SLOT_EXTRA
267 int "mmc extra slot number"
268 default -1
269 ---help---
270 sunxi builds always enable mmc0, some boards also have a second sdcard
271 slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
272 support for this.
273
Daniel Kochmańskidbbfdc12015-05-26 17:00:42 +0200274config SPL_NAND_SUPPORT
275 bool "SPL/NAND mode support"
276 depends on SPL
277 default n
278 ---help---
279 This enables support for booting from NAND internal
280 memory. U-Boot SPL doesn't detect where is it load from,
281 therefore this option is needed to properly load image from
282 flash. Option also disables MMC functionality on U-Boot due to
283 initialization errors encountered, when both controllers are
284 enabled.
285
Hans de Goedee7b852a2015-01-07 15:26:06 +0100286config USB0_VBUS_PIN
287 string "Vbus enable pin for usb0 (otg)"
288 default ""
289 ---help---
290 Set the Vbus enable pin for usb0 (otg). This takes a string in the
291 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
292
Hans de Goedeeaa0d702015-02-16 22:13:43 +0100293config USB0_VBUS_DET
294 string "Vbus detect pin for usb0 (otg)"
Hans de Goedeeaa0d702015-02-16 22:13:43 +0100295 default ""
296 ---help---
297 Set the Vbus detect pin for usb0 (otg). This takes a string in the
298 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
299
Hans de Goedeaf4273b2014-11-07 16:09:00 +0100300config USB1_VBUS_PIN
301 string "Vbus enable pin for usb1 (ehci0)"
302 default "PH6" if MACH_SUN4I || MACH_SUN7I
Hans de Goedeb5ab8ce2014-11-07 14:51:12 +0100303 default "PH27" if MACH_SUN6I
Hans de Goedeaf4273b2014-11-07 16:09:00 +0100304 ---help---
305 Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes
306 a string in the format understood by sunxi_name_to_gpio, e.g.
307 PH1 for pin 1 of port H.
308
309config USB2_VBUS_PIN
310 string "Vbus enable pin for usb2 (ehci1)"
311 default "PH3" if MACH_SUN4I || MACH_SUN7I
Hans de Goedeb5ab8ce2014-11-07 14:51:12 +0100312 default "PH24" if MACH_SUN6I
Hans de Goedeaf4273b2014-11-07 16:09:00 +0100313 ---help---
314 See USB1_VBUS_PIN help text.
315
Paul Kocialkowski0a3ec0a2015-04-10 23:09:52 +0200316config I2C0_ENABLE
317 bool "Enable I2C/TWI controller 0"
318 default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
319 default n if MACH_SUN6I || MACH_SUN8I
320 ---help---
321 This allows enabling I2C/TWI controller 0 by muxing its pins, enabling
322 its clock and setting up the bus. This is especially useful on devices
323 with slaves connected to the bus or with pins exposed through e.g. an
324 expansion port/header.
325
326config I2C1_ENABLE
327 bool "Enable I2C/TWI controller 1"
328 default n
329 ---help---
330 See I2C0_ENABLE help text.
331
332config I2C2_ENABLE
333 bool "Enable I2C/TWI controller 2"
334 default n
335 ---help---
336 See I2C0_ENABLE help text.
337
338if MACH_SUN6I || MACH_SUN7I
339config I2C3_ENABLE
340 bool "Enable I2C/TWI controller 3"
341 default n
342 ---help---
343 See I2C0_ENABLE help text.
344endif
345
346if MACH_SUN7I
347config I2C4_ENABLE
348 bool "Enable I2C/TWI controller 4"
349 default n
350 ---help---
351 See I2C0_ENABLE help text.
352endif
353
Hans de Goede3ae1d132015-04-25 17:25:14 +0200354config AXP_GPIO
355 boolean "Enable support for gpio-s on axp PMICs"
356 default n
357 ---help---
358 Say Y here to enable support for the gpio pins of the axp PMIC ICs.
359
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200360config VIDEO
Hans de Goede7e68a1b2014-12-21 16:28:32 +0100361 boolean "Enable graphical uboot console on HDMI, LCD or VGA"
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200362 default y
363 ---help---
Hans de Goede7e68a1b2014-12-21 16:28:32 +0100364 Say Y here to add support for using a cfb console on the HDMI, LCD
365 or VGA output found on most sunxi devices. See doc/README.video for
366 info on how to select the video output and mode.
367
Hans de Goedee9544592014-12-23 23:04:35 +0100368config VIDEO_HDMI
369 boolean "HDMI output support"
370 depends on VIDEO && !MACH_SUN8I
371 default y
372 ---help---
373 Say Y here to add support for outputting video over HDMI.
374
Hans de Goede260f5202014-12-25 13:58:06 +0100375config VIDEO_VGA
376 boolean "VGA output support"
377 depends on VIDEO && (MACH_SUN4I || MACH_SUN7I)
378 default n
379 ---help---
380 Say Y here to add support for outputting video over VGA.
381
Hans de Goedeac1633c2014-12-24 12:17:07 +0100382config VIDEO_VGA_VIA_LCD
383 boolean "VGA via LCD controller support"
Chen-Yu Tsai39ca4c12015-01-12 18:02:10 +0800384 depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I)
Hans de Goedeac1633c2014-12-24 12:17:07 +0100385 default n
386 ---help---
387 Say Y here to add support for external DACs connected to the parallel
388 LCD interface driving a VGA connector, such as found on the
389 Olimex A13 boards.
390
Hans de Goede18366f72015-01-25 15:33:07 +0100391config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
392 boolean "Force sync active high for VGA via LCD controller support"
393 depends on VIDEO_VGA_VIA_LCD
394 default n
395 ---help---
396 Say Y here if you've a board which uses opendrain drivers for the vga
397 hsync and vsync signals. Opendrain drivers cannot generate steep enough
398 positive edges for a stable video output, so on boards with opendrain
399 drivers the sync signals must always be active high.
400
Chen-Yu Tsai9ed19522015-01-12 18:02:11 +0800401config VIDEO_VGA_EXTERNAL_DAC_EN
402 string "LCD panel power enable pin"
403 depends on VIDEO_VGA_VIA_LCD
404 default ""
405 ---help---
406 Set the enable pin for the external VGA DAC. This takes a string in the
407 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
408
Hans de Goede7e68a1b2014-12-21 16:28:32 +0100409config VIDEO_LCD_MODE
410 string "LCD panel timing details"
411 depends on VIDEO
412 default ""
413 ---help---
414 LCD panel timing details string, leave empty if there is no LCD panel.
415 This is in drivers/video/videomodes.c: video_get_params() format, e.g.
416 x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0
417
Hans de Goede481b6642015-01-13 13:21:46 +0100418config VIDEO_LCD_DCLK_PHASE
419 int "LCD panel display clock phase"
420 depends on VIDEO
421 default 1
422 ---help---
423 Select LCD panel display clock phase shift, range 0-3.
424
Hans de Goede7e68a1b2014-12-21 16:28:32 +0100425config VIDEO_LCD_POWER
426 string "LCD panel power enable pin"
427 depends on VIDEO
428 default ""
429 ---help---
430 Set the power enable pin for the LCD panel. This takes a string in the
431 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
432
Hans de Goedece9e3322015-02-16 17:26:41 +0100433config VIDEO_LCD_RESET
434 string "LCD panel reset pin"
435 depends on VIDEO
436 default ""
437 ---help---
438 Set the reset pin for the LCD panel. This takes a string in the format
439 understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
440
Hans de Goede7e68a1b2014-12-21 16:28:32 +0100441config VIDEO_LCD_BL_EN
442 string "LCD panel backlight enable pin"
443 depends on VIDEO
444 default ""
445 ---help---
446 Set the backlight enable pin for the LCD panel. This takes a string in the
447 the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
448 port H.
449
450config VIDEO_LCD_BL_PWM
451 string "LCD panel backlight pwm pin"
452 depends on VIDEO
453 default ""
454 ---help---
455 Set the backlight pwm pin for the LCD panel. This takes a string in the
456 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200457
Hans de Goede2d5d3022015-01-22 21:02:42 +0100458config VIDEO_LCD_BL_PWM_ACTIVE_LOW
459 bool "LCD panel backlight pwm is inverted"
460 depends on VIDEO
461 default y
462 ---help---
463 Set this if the backlight pwm output is active low.
464
Hans de Goedea5b4cfe2015-02-16 17:23:25 +0100465config VIDEO_LCD_PANEL_I2C
466 bool "LCD panel needs to be configured via i2c"
467 depends on VIDEO
Hans de Goede6de9f762015-03-07 12:00:02 +0100468 default n
Hans de Goedea5b4cfe2015-02-16 17:23:25 +0100469 ---help---
470 Say y here if the LCD panel needs to be configured via i2c. This
471 will add a bitbang i2c controller using gpios to talk to the LCD.
472
473config VIDEO_LCD_PANEL_I2C_SDA
474 string "LCD panel i2c interface SDA pin"
475 depends on VIDEO_LCD_PANEL_I2C
476 default "PG12"
477 ---help---
478 Set the SDA pin for the LCD i2c interface. This takes a string in the
479 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
480
481config VIDEO_LCD_PANEL_I2C_SCL
482 string "LCD panel i2c interface SCL pin"
483 depends on VIDEO_LCD_PANEL_I2C
484 default "PG10"
485 ---help---
486 Set the SCL pin for the LCD i2c interface. This takes a string in the
487 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
488
Hans de Goede797a0f52015-01-01 22:04:34 +0100489
490# Note only one of these may be selected at a time! But hidden choices are
491# not supported by Kconfig
492config VIDEO_LCD_IF_PARALLEL
493 bool
494
495config VIDEO_LCD_IF_LVDS
496 bool
497
498
499choice
500 prompt "LCD panel support"
501 depends on VIDEO
502 ---help---
503 Select which type of LCD panel to support.
504
505config VIDEO_LCD_PANEL_PARALLEL
506 bool "Generic parallel interface LCD panel"
507 select VIDEO_LCD_IF_PARALLEL
508
509config VIDEO_LCD_PANEL_LVDS
510 bool "Generic lvds interface LCD panel"
511 select VIDEO_LCD_IF_LVDS
512
Siarhei Siamashkac02f0522015-01-19 05:23:33 +0200513config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828
514 bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip"
515 select VIDEO_LCD_SSD2828
516 select VIDEO_LCD_IF_PARALLEL
517 ---help---
518 7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
519
Hans de Goede743fb9552015-01-20 09:23:36 +0100520config VIDEO_LCD_PANEL_HITACHI_TX18D42VM
521 bool "Hitachi tx18d42vm LCD panel"
522 select VIDEO_LCD_HITACHI_TX18D42VM
523 select VIDEO_LCD_IF_LVDS
524 ---help---
525 7.85" 1024x768 Hitachi tx18d42vm LCD panel support
526
Hans de Goede613dade2015-02-16 17:49:47 +0100527config VIDEO_LCD_TL059WV5C0
528 bool "tl059wv5c0 LCD panel"
529 select VIDEO_LCD_PANEL_I2C
530 select VIDEO_LCD_IF_PARALLEL
531 ---help---
532 6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and
533 Aigo M60/M608/M606 tablets.
534
Hans de Goede797a0f52015-01-01 22:04:34 +0100535endchoice
536
537
Hans de Goedef494cad2015-01-11 17:17:00 +0100538config USB_MUSB_SUNXI
539 bool "Enable sunxi OTG / DRC USB controller in host mode"
540 default n
541 ---help---
542 Say y here to enable support for the sunxi OTG / DRC USB controller
543 used on almost all sunxi boards. Note currently u-boot can only have
544 one usb host controller enabled at a time, so enabling this on boards
545 which also use the ehci host controller will result in build errors.
546
Hans de Goede16030822014-09-18 21:03:34 +0200547config USB_KEYBOARD
548 boolean "Enable USB keyboard support"
549 default y
550 ---help---
551 Say Y here to add support for using a USB keyboard (typically used
Hans de Goede7e68a1b2014-12-21 16:28:32 +0100552 in combination with a graphical console).
Hans de Goede16030822014-09-18 21:03:34 +0200553
Hans de Goedebf880fe2015-01-25 12:10:48 +0100554config GMAC_TX_DELAY
555 int "GMAC Transmit Clock Delay Chain"
556 default 0
557 ---help---
558 Set the GMAC Transmit Clock Delay Chain value.
559
Hans de Goede7976b282015-05-05 12:49:36 +0200560config SYS_MALLOC_CLEAR_ON_INIT
561 default n
562
Hans de Goede03914882015-04-15 20:46:48 +0200563config NET
564 default y
565
566config NETDEVICES
567 default y
568
569config DM_ETH
570 default y
571
572config DM_SERIAL
573 default y
574
Hans de Goede4dba1082015-05-10 14:10:26 +0200575config DM_USB
576 default y if !USB_MUSB_SUNXI
577
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900578endif