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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2001
3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00006 */
7
8/*
9 * This provides a bit-banged interface to the ethernet MII management
10 * channel.
11 */
12
13#include <common.h>
Simon Glassdbad3462015-04-05 16:07:39 -060014#include <dm.h>
wdenkc6097192002-11-03 00:24:07 +000015#include <miiphy.h>
Andy Flemingaecf6fc2011-04-08 02:10:27 -050016#include <phy.h>
wdenkc6097192002-11-03 00:24:07 +000017
Marian Balakowiczaab8c492005-10-28 22:30:33 +020018#include <asm/types.h>
19#include <linux/list.h>
20#include <malloc.h>
21#include <net.h>
22
23/* local debug macro */
Marian Balakowiczaab8c492005-10-28 22:30:33 +020024#undef MII_DEBUG
25
26#undef debug
27#ifdef MII_DEBUG
Andy Flemingaea0c3e2011-04-07 14:38:35 -050028#define debug(fmt, args...) printf(fmt, ##args)
Marian Balakowiczaab8c492005-10-28 22:30:33 +020029#else
Andy Flemingaea0c3e2011-04-07 14:38:35 -050030#define debug(fmt, args...)
Marian Balakowiczaab8c492005-10-28 22:30:33 +020031#endif /* MII_DEBUG */
32
Marian Balakowiczaab8c492005-10-28 22:30:33 +020033static struct list_head mii_devs;
34static struct mii_dev *current_mii;
35
Mike Frysinger24a90082010-07-27 18:35:09 -040036/*
37 * Lookup the mii_dev struct by the registered device name.
38 */
Andy Flemingaecf6fc2011-04-08 02:10:27 -050039struct mii_dev *miiphy_get_dev_by_name(const char *devname)
Mike Frysinger24a90082010-07-27 18:35:09 -040040{
41 struct list_head *entry;
42 struct mii_dev *dev;
43
44 if (!devname) {
45 printf("NULL device name!\n");
46 return NULL;
47 }
48
49 list_for_each(entry, &mii_devs) {
50 dev = list_entry(entry, struct mii_dev, link);
51 if (strcmp(dev->name, devname) == 0)
52 return dev;
53 }
54
Mike Frysinger24a90082010-07-27 18:35:09 -040055 return NULL;
56}
57
Marian Balakowiczaab8c492005-10-28 22:30:33 +020058/*****************************************************************************
59 *
Marian Balakowiczcbdd1c82005-11-30 18:06:04 +010060 * Initialize global data. Need to be called before any other miiphy routine.
61 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -040062void miiphy_init(void)
Marian Balakowiczcbdd1c82005-11-30 18:06:04 +010063{
Andy Flemingaea0c3e2011-04-07 14:38:35 -050064 INIT_LIST_HEAD(&mii_devs);
Larry Johnson81b974b2007-10-31 11:21:29 -050065 current_mii = NULL;
Marian Balakowiczcbdd1c82005-11-30 18:06:04 +010066}
67
Andy Flemingaecf6fc2011-04-08 02:10:27 -050068struct mii_dev *mdio_alloc(void)
69{
70 struct mii_dev *bus;
71
72 bus = malloc(sizeof(*bus));
73 if (!bus)
74 return bus;
75
76 memset(bus, 0, sizeof(*bus));
77
78 /* initalize mii_dev struct fields */
79 INIT_LIST_HEAD(&bus->link);
80
81 return bus;
82}
83
Bin Menga961e1f2015-10-07 21:32:37 -070084void mdio_free(struct mii_dev *bus)
85{
86 free(bus);
87}
88
Andy Flemingaecf6fc2011-04-08 02:10:27 -050089int mdio_register(struct mii_dev *bus)
90{
Peng Fancd41c212015-11-24 17:03:47 +080091 if (!bus || !bus->read || !bus->write)
Andy Flemingaecf6fc2011-04-08 02:10:27 -050092 return -1;
93
94 /* check if we have unique name */
95 if (miiphy_get_dev_by_name(bus->name)) {
96 printf("mdio_register: non unique device name '%s'\n",
97 bus->name);
98 return -1;
99 }
100
101 /* add it to the list */
102 list_add_tail(&bus->link, &mii_devs);
103
104 if (!current_mii)
105 current_mii = bus;
106
107 return 0;
108}
109
Bin Menga961e1f2015-10-07 21:32:37 -0700110int mdio_unregister(struct mii_dev *bus)
111{
112 if (!bus)
113 return 0;
114
115 /* delete it from the list */
116 list_del(&bus->link);
117
118 if (current_mii == bus)
119 current_mii = NULL;
120
121 return 0;
122}
123
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500124void mdio_list_devices(void)
125{
126 struct list_head *entry;
127
128 list_for_each(entry, &mii_devs) {
129 int i;
130 struct mii_dev *bus = list_entry(entry, struct mii_dev, link);
131
132 printf("%s:\n", bus->name);
133
134 for (i = 0; i < PHY_MAX_ADDR; i++) {
135 struct phy_device *phydev = bus->phymap[i];
136
137 if (phydev) {
Michal Simekfca1e842016-11-16 08:41:01 +0100138 printf("%x - %s", i, phydev->drv->name);
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500139
140 if (phydev->dev)
141 printf(" <--> %s\n", phydev->dev->name);
142 else
143 printf("\n");
144 }
145 }
146 }
147}
148
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400149int miiphy_set_current_dev(const char *devname)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200150{
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200151 struct mii_dev *dev;
152
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500153 dev = miiphy_get_dev_by_name(devname);
Mike Frysinger24a90082010-07-27 18:35:09 -0400154 if (dev) {
155 current_mii = dev;
156 return 0;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200157 }
158
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500159 printf("No such device: %s\n", devname);
160
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200161 return 1;
162}
163
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500164struct mii_dev *mdio_get_current_dev(void)
165{
166 return current_mii;
167}
168
169struct phy_device *mdio_phydev_for_ethname(const char *ethname)
170{
171 struct list_head *entry;
172 struct mii_dev *bus;
173
174 list_for_each(entry, &mii_devs) {
175 int i;
176 bus = list_entry(entry, struct mii_dev, link);
177
178 for (i = 0; i < PHY_MAX_ADDR; i++) {
179 if (!bus->phymap[i] || !bus->phymap[i]->dev)
180 continue;
181
182 if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
183 return bus->phymap[i];
184 }
185 }
186
187 printf("%s is not a known ethernet\n", ethname);
188 return NULL;
189}
190
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400191const char *miiphy_get_current_dev(void)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200192{
193 if (current_mii)
194 return current_mii->name;
195
196 return NULL;
197}
198
Mike Frysingerbd17e7a2010-07-27 18:35:10 -0400199static struct mii_dev *miiphy_get_active_dev(const char *devname)
200{
201 /* If the current mii is the one we want, return it */
202 if (current_mii)
203 if (strcmp(current_mii->name, devname) == 0)
204 return current_mii;
205
206 /* Otherwise, set the active one to the one we want */
207 if (miiphy_set_current_dev(devname))
208 return NULL;
209 else
210 return current_mii;
211}
212
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200213/*****************************************************************************
214 *
215 * Read to variable <value> from the PHY attached to device <devname>,
216 * use PHY address <addr> and register <reg>.
217 *
Andy Fleming896a7172011-10-31 09:46:13 -0500218 * This API is deprecated. Use phy_read on a phy_device found via phy_connect
219 *
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200220 * Returns:
221 * 0 on success
222 */
Wolfgang Denk934fcb62011-12-07 08:35:14 +0100223int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson81b974b2007-10-31 11:21:29 -0500224 unsigned short *value)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200225{
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500226 struct mii_dev *bus;
Anatolij Gustschin1bbce3a2011-04-30 02:17:44 +0000227 int ret;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200228
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500229 bus = miiphy_get_active_dev(devname);
Anatolij Gustschin1bbce3a2011-04-30 02:17:44 +0000230 if (!bus)
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500231 return 1;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200232
Anatolij Gustschin1bbce3a2011-04-30 02:17:44 +0000233 ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
234 if (ret < 0)
235 return 1;
236
237 *value = (unsigned short)ret;
238 return 0;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200239}
240
241/*****************************************************************************
242 *
243 * Write <value> to the PHY attached to device <devname>,
244 * use PHY address <addr> and register <reg>.
245 *
Andy Fleming896a7172011-10-31 09:46:13 -0500246 * This API is deprecated. Use phy_write on a phy_device found by phy_connect
247 *
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200248 * Returns:
249 * 0 on success
250 */
Wolfgang Denk934fcb62011-12-07 08:35:14 +0100251int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson81b974b2007-10-31 11:21:29 -0500252 unsigned short value)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200253{
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500254 struct mii_dev *bus;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200255
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500256 bus = miiphy_get_active_dev(devname);
257 if (bus)
258 return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200259
Mike Frysinger24a90082010-07-27 18:35:09 -0400260 return 1;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200261}
262
263/*****************************************************************************
264 *
265 * Print out list of registered MII capable devices.
266 */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500267void miiphy_listdev(void)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200268{
269 struct list_head *entry;
270 struct mii_dev *dev;
271
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500272 puts("MII devices: ");
273 list_for_each(entry, &mii_devs) {
274 dev = list_entry(entry, struct mii_dev, link);
275 printf("'%s' ", dev->name);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200276 }
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500277 puts("\n");
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200278
279 if (current_mii)
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500280 printf("Current device: '%s'\n", current_mii->name);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200281}
282
wdenkc6097192002-11-03 00:24:07 +0000283/*****************************************************************************
284 *
285 * Read the OUI, manufacture's model number, and revision number.
286 *
287 * OUI: 22 bits (unsigned int)
288 * Model: 6 bits (unsigned char)
289 * Revision: 4 bits (unsigned char)
290 *
Andy Fleming896a7172011-10-31 09:46:13 -0500291 * This API is deprecated.
292 *
wdenkc6097192002-11-03 00:24:07 +0000293 * Returns:
294 * 0 on success
295 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400296int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
wdenkc6097192002-11-03 00:24:07 +0000297 unsigned char *model, unsigned char *rev)
298{
299 unsigned int reg = 0;
wdenkf4cec3f2003-12-06 23:20:41 +0000300 unsigned short tmp;
wdenkc6097192002-11-03 00:24:07 +0000301
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500302 if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
303 debug("PHY ID register 2 read failed\n");
304 return -1;
wdenkc6097192002-11-03 00:24:07 +0000305 }
wdenkf4cec3f2003-12-06 23:20:41 +0000306 reg = tmp;
wdenkc6097192002-11-03 00:24:07 +0000307
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500308 debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);
Shinya Kuribayashi49e42af2008-01-19 10:25:59 +0900309
wdenkc6097192002-11-03 00:24:07 +0000310 if (reg == 0xFFFF) {
311 /* No physical device present at this address */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500312 return -1;
wdenkc6097192002-11-03 00:24:07 +0000313 }
314
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500315 if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
316 debug("PHY ID register 1 read failed\n");
317 return -1;
wdenkc6097192002-11-03 00:24:07 +0000318 }
wdenkf4cec3f2003-12-06 23:20:41 +0000319 reg |= tmp << 16;
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500320 debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
Shinya Kuribayashi49e42af2008-01-19 10:25:59 +0900321
Larry Johnson81b974b2007-10-31 11:21:29 -0500322 *oui = (reg >> 10);
323 *model = (unsigned char)((reg >> 4) & 0x0000003F);
324 *rev = (unsigned char)(reg & 0x0000000F);
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500325 return 0;
wdenkc6097192002-11-03 00:24:07 +0000326}
327
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500328#ifndef CONFIG_PHYLIB
wdenkc6097192002-11-03 00:24:07 +0000329/*****************************************************************************
330 *
331 * Reset the PHY.
Andy Fleming896a7172011-10-31 09:46:13 -0500332 *
333 * This API is deprecated. Use PHYLIB.
334 *
wdenkc6097192002-11-03 00:24:07 +0000335 * Returns:
336 * 0 on success
337 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400338int miiphy_reset(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000339{
340 unsigned short reg;
Stefan Roese2e536362010-02-02 13:43:48 +0100341 int timeout = 500;
wdenkc6097192002-11-03 00:24:07 +0000342
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500343 if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
344 debug("PHY status read failed\n");
345 return -1;
Wolfgang Denk8ff63c22005-08-12 23:15:53 +0200346 }
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500347 if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) {
348 debug("PHY reset failed\n");
349 return -1;
wdenkc6097192002-11-03 00:24:07 +0000350 }
wdenk2cefd152004-02-08 22:55:38 +0000351#ifdef CONFIG_PHY_RESET_DELAY
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500352 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
wdenk2cefd152004-02-08 22:55:38 +0000353#endif
wdenkc6097192002-11-03 00:24:07 +0000354 /*
355 * Poll the control register for the reset bit to go to 0 (it is
356 * auto-clearing). This should happen within 0.5 seconds per the
357 * IEEE spec.
358 */
wdenkc6097192002-11-03 00:24:07 +0000359 reg = 0x8000;
Stefan Roese2e536362010-02-02 13:43:48 +0100360 while (((reg & 0x8000) != 0) && timeout--) {
Mike Frysingerd63ee712010-12-23 15:40:12 -0500361 if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
Stefan Roese2e536362010-02-02 13:43:48 +0100362 debug("PHY status read failed\n");
363 return -1;
wdenkc6097192002-11-03 00:24:07 +0000364 }
Stefan Roese2e536362010-02-02 13:43:48 +0100365 udelay(1000);
wdenkc6097192002-11-03 00:24:07 +0000366 }
367 if ((reg & 0x8000) == 0) {
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500368 return 0;
wdenkc6097192002-11-03 00:24:07 +0000369 } else {
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500370 puts("PHY reset timed out\n");
371 return -1;
wdenkc6097192002-11-03 00:24:07 +0000372 }
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500373 return 0;
wdenkc6097192002-11-03 00:24:07 +0000374}
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500375#endif /* !PHYLIB */
wdenkc6097192002-11-03 00:24:07 +0000376
wdenkc6097192002-11-03 00:24:07 +0000377/*****************************************************************************
378 *
Larry Johnson966a80b2007-11-01 08:46:50 -0500379 * Determine the ethernet speed (10/100/1000). Return 10 on error.
wdenkc6097192002-11-03 00:24:07 +0000380 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400381int miiphy_speed(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000382{
Dongpo Lice290242016-08-22 21:03:29 +0800383 u16 bmcr, anlpar, adv;
wdenkc6097192002-11-03 00:24:07 +0000384
wdenkeec9a3d2004-03-23 23:20:24 +0000385#if defined(CONFIG_PHY_GIGE)
Larry Johnson966a80b2007-11-01 08:46:50 -0500386 u16 btsr;
387
388 /*
389 * Check for 1000BASE-X. If it is supported, then assume that the speed
390 * is 1000.
391 */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500392 if (miiphy_is_1000base_x(devname, addr))
Larry Johnson966a80b2007-11-01 08:46:50 -0500393 return _1000BASET;
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500394
Larry Johnson966a80b2007-11-01 08:46:50 -0500395 /*
396 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
397 */
398 /* Check for 1000BASE-T. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500399 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
400 printf("PHY 1000BT status");
Larry Johnson966a80b2007-11-01 08:46:50 -0500401 goto miiphy_read_failed;
402 }
403 if (btsr != 0xFFFF &&
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500404 (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)))
Larry Johnson966a80b2007-11-01 08:46:50 -0500405 return _1000BASET;
wdenkeec9a3d2004-03-23 23:20:24 +0000406#endif /* CONFIG_PHY_GIGE */
wdenked2ac4b2004-03-14 18:23:55 +0000407
wdenke3a06802004-06-06 23:13:55 +0000408 /* Check Basic Management Control Register first. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500409 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
410 printf("PHY speed");
Larry Johnson966a80b2007-11-01 08:46:50 -0500411 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000412 }
wdenke3a06802004-06-06 23:13:55 +0000413 /* Check if auto-negotiation is on. */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500414 if (bmcr & BMCR_ANENABLE) {
wdenke3a06802004-06-06 23:13:55 +0000415 /* Get auto-negotiation results. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500416 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
417 printf("PHY AN speed");
Larry Johnson966a80b2007-11-01 08:46:50 -0500418 goto miiphy_read_failed;
wdenke3a06802004-06-06 23:13:55 +0000419 }
Dongpo Lice290242016-08-22 21:03:29 +0800420
421 if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
422 puts("PHY AN adv speed");
423 goto miiphy_read_failed;
424 }
425 return ((anlpar & adv) & LPA_100) ? _100BASET : _10BASET;
wdenke3a06802004-06-06 23:13:55 +0000426 }
427 /* Get speed from basic control settings. */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500428 return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;
wdenke3a06802004-06-06 23:13:55 +0000429
Michael Zaidman6dbca5f2010-02-28 16:28:25 +0200430miiphy_read_failed:
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500431 printf(" read failed, assuming 10BASE-T\n");
Larry Johnson966a80b2007-11-01 08:46:50 -0500432 return _10BASET;
wdenkc6097192002-11-03 00:24:07 +0000433}
434
wdenkc6097192002-11-03 00:24:07 +0000435/*****************************************************************************
436 *
Larry Johnson966a80b2007-11-01 08:46:50 -0500437 * Determine full/half duplex. Return half on error.
wdenkc6097192002-11-03 00:24:07 +0000438 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400439int miiphy_duplex(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000440{
Dongpo Lice290242016-08-22 21:03:29 +0800441 u16 bmcr, anlpar, adv;
wdenkc6097192002-11-03 00:24:07 +0000442
wdenkeec9a3d2004-03-23 23:20:24 +0000443#if defined(CONFIG_PHY_GIGE)
Larry Johnson966a80b2007-11-01 08:46:50 -0500444 u16 btsr;
445
446 /* Check for 1000BASE-X. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500447 if (miiphy_is_1000base_x(devname, addr)) {
Larry Johnson966a80b2007-11-01 08:46:50 -0500448 /* 1000BASE-X */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500449 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
450 printf("1000BASE-X PHY AN duplex");
Larry Johnson966a80b2007-11-01 08:46:50 -0500451 goto miiphy_read_failed;
wdenked2ac4b2004-03-14 18:23:55 +0000452 }
453 }
Larry Johnson966a80b2007-11-01 08:46:50 -0500454 /*
455 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
456 */
457 /* Check for 1000BASE-T. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500458 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
459 printf("PHY 1000BT status");
Larry Johnson966a80b2007-11-01 08:46:50 -0500460 goto miiphy_read_failed;
461 }
462 if (btsr != 0xFFFF) {
463 if (btsr & PHY_1000BTSR_1000FD) {
464 return FULL;
465 } else if (btsr & PHY_1000BTSR_1000HD) {
466 return HALF;
467 }
468 }
wdenkeec9a3d2004-03-23 23:20:24 +0000469#endif /* CONFIG_PHY_GIGE */
wdenked2ac4b2004-03-14 18:23:55 +0000470
wdenke3a06802004-06-06 23:13:55 +0000471 /* Check Basic Management Control Register first. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500472 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
473 puts("PHY duplex");
Larry Johnson966a80b2007-11-01 08:46:50 -0500474 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000475 }
wdenke3a06802004-06-06 23:13:55 +0000476 /* Check if auto-negotiation is on. */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500477 if (bmcr & BMCR_ANENABLE) {
wdenke3a06802004-06-06 23:13:55 +0000478 /* Get auto-negotiation results. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500479 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
480 puts("PHY AN duplex");
Larry Johnson966a80b2007-11-01 08:46:50 -0500481 goto miiphy_read_failed;
wdenke3a06802004-06-06 23:13:55 +0000482 }
Dongpo Lice290242016-08-22 21:03:29 +0800483
484 if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
485 puts("PHY AN adv duplex");
486 goto miiphy_read_failed;
487 }
488 return ((anlpar & adv) & (LPA_10FULL | LPA_100FULL)) ?
Larry Johnson966a80b2007-11-01 08:46:50 -0500489 FULL : HALF;
wdenke3a06802004-06-06 23:13:55 +0000490 }
491 /* Get speed from basic control settings. */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500492 return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;
Larry Johnson966a80b2007-11-01 08:46:50 -0500493
Michael Zaidman6dbca5f2010-02-28 16:28:25 +0200494miiphy_read_failed:
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500495 printf(" read failed, assuming half duplex\n");
Larry Johnson966a80b2007-11-01 08:46:50 -0500496 return HALF;
497}
wdenke3a06802004-06-06 23:13:55 +0000498
Larry Johnson966a80b2007-11-01 08:46:50 -0500499/*****************************************************************************
500 *
501 * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
502 * 1000BASE-T, or on error.
503 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400504int miiphy_is_1000base_x(const char *devname, unsigned char addr)
Larry Johnson966a80b2007-11-01 08:46:50 -0500505{
506#if defined(CONFIG_PHY_GIGE)
507 u16 exsr;
508
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500509 if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
510 printf("PHY extended status read failed, assuming no "
Larry Johnson966a80b2007-11-01 08:46:50 -0500511 "1000BASE-X\n");
512 return 0;
513 }
Mike Frysingerd63ee712010-12-23 15:40:12 -0500514 return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH));
Larry Johnson966a80b2007-11-01 08:46:50 -0500515#else
516 return 0;
517#endif
wdenkc6097192002-11-03 00:24:07 +0000518}
519
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200520#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
wdenk49c3f672003-10-08 22:33:00 +0000521/*****************************************************************************
522 *
523 * Determine link status
524 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400525int miiphy_link(const char *devname, unsigned char addr)
wdenk49c3f672003-10-08 22:33:00 +0000526{
527 unsigned short reg;
528
wdenk145d2c12004-04-15 21:48:45 +0000529 /* dummy read; needed to latch some phys */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500530 (void)miiphy_read(devname, addr, MII_BMSR, &reg);
531 if (miiphy_read(devname, addr, MII_BMSR, &reg)) {
532 puts("MII_BMSR read failed, assuming no link\n");
533 return 0;
wdenk49c3f672003-10-08 22:33:00 +0000534 }
535
536 /* Determine if a link is active */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500537 if ((reg & BMSR_LSTATUS) != 0) {
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500538 return 1;
wdenk49c3f672003-10-08 22:33:00 +0000539 } else {
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500540 return 0;
wdenk49c3f672003-10-08 22:33:00 +0000541 }
542}
543#endif