Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 1 | /* |
Patrice Chotard | 789ee0e | 2017-10-23 09:53:58 +0200 | [diff] [blame] | 2 | * Copyright (C) 2016, STMicroelectronics - All Rights Reserved |
| 3 | * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 4 | * |
| 5 | * SPDX-License-Identifier: GPL-2.0+ |
| 6 | */ |
| 7 | |
| 8 | #ifndef __CONFIG_H |
| 9 | #define __CONFIG_H |
| 10 | |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 11 | #define CONFIG_SYS_FLASH_BASE 0x08000000 |
| 12 | #define CONFIG_SYS_INIT_SP_ADDR 0x20050000 |
Vikas Manocha | 50218ae | 2017-05-28 12:55:10 -0700 | [diff] [blame] | 13 | |
| 14 | #ifdef CONFIG_SUPPORT_SPL |
Vikas Manocha | f0e32c0 | 2017-05-28 12:55:14 -0700 | [diff] [blame] | 15 | #define CONFIG_SYS_TEXT_BASE 0x08008000 |
| 16 | #define CONFIG_SYS_LOAD_ADDR 0x08008000 |
Vikas Manocha | 50218ae | 2017-05-28 12:55:10 -0700 | [diff] [blame] | 17 | #else |
| 18 | #define CONFIG_SYS_TEXT_BASE CONFIG_SYS_FLASH_BASE |
Vikas Manocha | f0e32c0 | 2017-05-28 12:55:14 -0700 | [diff] [blame] | 19 | #define CONFIG_SYS_LOAD_ADDR 0xC0400000 |
| 20 | #define CONFIG_LOADADDR 0xC0400000 |
Vikas Manocha | 50218ae | 2017-05-28 12:55:10 -0700 | [diff] [blame] | 21 | #endif |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 22 | |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 23 | /* |
| 24 | * Configuration of the external SDRAM memory |
| 25 | */ |
| 26 | #define CONFIG_NR_DRAM_BANKS 1 |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 27 | |
Vikas Manocha | 4940802 | 2016-03-09 15:18:14 -0800 | [diff] [blame] | 28 | #define CONFIG_SYS_MAX_FLASH_SECT 8 |
| 29 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 30 | |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 31 | #define CONFIG_ENV_SIZE (8 << 10) |
| 32 | |
Vikas Manocha | 4940802 | 2016-03-09 15:18:14 -0800 | [diff] [blame] | 33 | #define CONFIG_STM32_FLASH |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 34 | |
Michael Kurz | 812962b | 2017-01-22 16:04:27 +0100 | [diff] [blame] | 35 | #define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8) |
| 36 | #define CONFIG_DW_ALTDESCRIPTOR |
| 37 | #define CONFIG_MII |
Michael Kurz | 2c5a22f | 2017-01-22 16:04:29 +0100 | [diff] [blame] | 38 | #define CONFIG_PHY_SMSC |
Michael Kurz | 812962b | 2017-01-22 16:04:27 +0100 | [diff] [blame] | 39 | |
Toshifumi NISHINAGA | 65bfb9c | 2016-07-08 01:02:24 +0900 | [diff] [blame] | 40 | #define CONFIG_STM32_HSE_HZ 25000000 |
| 41 | #define CONFIG_SYS_CLK_FREQ 200000000 /* 200 MHz */ |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 42 | #define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ |
| 43 | |
| 44 | #define CONFIG_CMDLINE_TAG |
| 45 | #define CONFIG_SETUP_MEMORY_TAGS |
| 46 | #define CONFIG_INITRD_TAG |
| 47 | #define CONFIG_REVISION_TAG |
| 48 | |
| 49 | #define CONFIG_SYS_CBSIZE 1024 |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 50 | |
Michael Kurz | 812962b | 2017-01-22 16:04:27 +0100 | [diff] [blame] | 51 | #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 52 | |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 53 | #define CONFIG_BOOTCOMMAND \ |
| 54 | "run bootcmd_romfs" |
| 55 | |
| 56 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 57 | "bootargs_romfs=uclinux.physaddr=0x08180000 root=/dev/mtdblock0\0" \ |
| 58 | "bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \ |
| 59 | "bootm 0x08044000 - 0x08042000\0" |
| 60 | |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 61 | |
| 62 | /* |
| 63 | * Command line configuration. |
| 64 | */ |
| 65 | #define CONFIG_SYS_LONGHELP |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 66 | #define CONFIG_AUTO_COMPLETE |
| 67 | #define CONFIG_CMDLINE_EDITING |
Vikas Manocha | 1a1e275 | 2017-03-27 13:02:45 -0700 | [diff] [blame] | 68 | #define CONFIG_CMD_CACHE |
Vikas Manocha | 9c7573e | 2017-04-10 15:03:00 -0700 | [diff] [blame] | 69 | #define CONFIG_BOARD_LATE_INIT |
Vikas Manocha | d7a80fc | 2017-04-10 15:03:02 -0700 | [diff] [blame] | 70 | #define CONFIG_DISPLAY_BOARDINFO |
Vikas Manocha | 50218ae | 2017-05-28 12:55:10 -0700 | [diff] [blame] | 71 | |
| 72 | /* For SPL */ |
| 73 | #ifdef CONFIG_SUPPORT_SPL |
| 74 | #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR |
| 75 | #define CONFIG_SPL_FRAMEWORK |
| 76 | #define CONFIG_SPL_BOARD_INIT |
| 77 | #define CONFIG_SPL_TEXT_BASE CONFIG_SYS_FLASH_BASE |
| 78 | #define CONFIG_SYS_MONITOR_LEN (512 * 1024) |
| 79 | #define CONFIG_SYS_SPL_LEN 0x00008000 |
Vikas Manocha | f0e32c0 | 2017-05-28 12:55:14 -0700 | [diff] [blame] | 80 | #define CONFIG_SYS_UBOOT_START 0x080083FD |
Vikas Manocha | 50218ae | 2017-05-28 12:55:10 -0700 | [diff] [blame] | 81 | #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \ |
| 82 | CONFIG_SYS_SPL_LEN) |
Vikas Manocha | b785bb4 | 2017-05-28 12:55:13 -0700 | [diff] [blame] | 83 | |
Vikas Manocha | b785bb4 | 2017-05-28 12:55:13 -0700 | [diff] [blame] | 84 | /* DT blob (fdt) address */ |
Vikas Manocha | b785bb4 | 2017-05-28 12:55:13 -0700 | [diff] [blame] | 85 | #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ |
| 86 | 0x1C0000) |
Vikas Manocha | 50218ae | 2017-05-28 12:55:10 -0700 | [diff] [blame] | 87 | #endif |
| 88 | /* For SPL ends */ |
| 89 | |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 90 | #endif /* __CONFIG_H */ |