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Vikas Manocha1b51c932016-02-11 15:47:20 -08001/*
2 * (C) Copyright 2016
3 * Vikas Manocha, <vikas.manocha@st.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
Vikas Manocha1b51c932016-02-11 15:47:20 -080011#define CONFIG_SYS_FLASH_BASE 0x08000000
12#define CONFIG_SYS_INIT_SP_ADDR 0x20050000
Vikas Manocha50218ae2017-05-28 12:55:10 -070013
14#ifdef CONFIG_SUPPORT_SPL
Vikas Manochaf0e32c02017-05-28 12:55:14 -070015#define CONFIG_SYS_TEXT_BASE 0x08008000
16#define CONFIG_SYS_LOAD_ADDR 0x08008000
Vikas Manocha50218ae2017-05-28 12:55:10 -070017#else
18#define CONFIG_SYS_TEXT_BASE CONFIG_SYS_FLASH_BASE
Vikas Manochaf0e32c02017-05-28 12:55:14 -070019#define CONFIG_SYS_LOAD_ADDR 0xC0400000
20#define CONFIG_LOADADDR 0xC0400000
Vikas Manocha50218ae2017-05-28 12:55:10 -070021#endif
Vikas Manocha1b51c932016-02-11 15:47:20 -080022
Vikas Manocha1b51c932016-02-11 15:47:20 -080023/*
24 * Configuration of the external SDRAM memory
25 */
26#define CONFIG_NR_DRAM_BANKS 1
Vikas Manocha1b51c932016-02-11 15:47:20 -080027
Vikas Manocha49408022016-03-09 15:18:14 -080028#define CONFIG_SYS_MAX_FLASH_SECT 8
29#define CONFIG_SYS_MAX_FLASH_BANKS 1
Vikas Manocha1b51c932016-02-11 15:47:20 -080030
Vikas Manocha1b51c932016-02-11 15:47:20 -080031#define CONFIG_ENV_IS_NOWHERE
Vikas Manocha1b51c932016-02-11 15:47:20 -080032#define CONFIG_ENV_SIZE (8 << 10)
33
Vikas Manocha49408022016-03-09 15:18:14 -080034#define CONFIG_STM32_FLASH
Vikas Manocha1b51c932016-02-11 15:47:20 -080035#define CONFIG_STM32X7_SERIAL
36
Michael Kurz812962b2017-01-22 16:04:27 +010037#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8)
38#define CONFIG_DW_ALTDESCRIPTOR
39#define CONFIG_MII
Michael Kurz2c5a22f2017-01-22 16:04:29 +010040#define CONFIG_PHY_SMSC
Michael Kurz812962b2017-01-22 16:04:27 +010041
Toshifumi NISHINAGA65bfb9c2016-07-08 01:02:24 +090042#define CONFIG_STM32_HSE_HZ 25000000
43#define CONFIG_SYS_CLK_FREQ 200000000 /* 200 MHz */
Vikas Manocha1b51c932016-02-11 15:47:20 -080044#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */
45
46#define CONFIG_CMDLINE_TAG
47#define CONFIG_SETUP_MEMORY_TAGS
48#define CONFIG_INITRD_TAG
49#define CONFIG_REVISION_TAG
50
51#define CONFIG_SYS_CBSIZE 1024
52#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
53 + sizeof(CONFIG_SYS_PROMPT) + 16)
54
55#define CONFIG_SYS_MAXARGS 16
Michael Kurz812962b2017-01-22 16:04:27 +010056#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
Vikas Manocha1b51c932016-02-11 15:47:20 -080057
Vikas Manocha1b51c932016-02-11 15:47:20 -080058#define CONFIG_BOOTARGS \
59 "console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
60#define CONFIG_BOOTCOMMAND \
61 "run bootcmd_romfs"
62
63#define CONFIG_EXTRA_ENV_SETTINGS \
64 "bootargs_romfs=uclinux.physaddr=0x08180000 root=/dev/mtdblock0\0" \
65 "bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \
66 "bootm 0x08044000 - 0x08042000\0"
67
Vikas Manocha1b51c932016-02-11 15:47:20 -080068
69/*
70 * Command line configuration.
71 */
72#define CONFIG_SYS_LONGHELP
Vikas Manocha1b51c932016-02-11 15:47:20 -080073#define CONFIG_AUTO_COMPLETE
74#define CONFIG_CMDLINE_EDITING
Vikas Manocha1a1e2752017-03-27 13:02:45 -070075#define CONFIG_CMD_CACHE
Vikas Manocha9c7573e2017-04-10 15:03:00 -070076#define CONFIG_BOARD_LATE_INIT
Vikas Manochad7a80fc2017-04-10 15:03:02 -070077#define CONFIG_DISPLAY_BOARDINFO
Vikas Manocha50218ae2017-05-28 12:55:10 -070078
79/* For SPL */
80#ifdef CONFIG_SUPPORT_SPL
81#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
82#define CONFIG_SPL_FRAMEWORK
83#define CONFIG_SPL_BOARD_INIT
84#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_FLASH_BASE
85#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
86#define CONFIG_SYS_SPL_LEN 0x00008000
Vikas Manochaf0e32c02017-05-28 12:55:14 -070087#define CONFIG_SYS_UBOOT_START 0x080083FD
Vikas Manocha50218ae2017-05-28 12:55:10 -070088#define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \
89 CONFIG_SYS_SPL_LEN)
Vikas Manochab785bb42017-05-28 12:55:13 -070090
Vikas Manochab785bb42017-05-28 12:55:13 -070091/* DT blob (fdt) address */
Vikas Manochab785bb42017-05-28 12:55:13 -070092#define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
93 0x1C0000)
Vikas Manocha50218ae2017-05-28 12:55:10 -070094#endif
95/* For SPL ends */
96
Vikas Manocha1b51c932016-02-11 15:47:20 -080097#endif /* __CONFIG_H */