blob: 48ac4413e026c2a8bff90818c37dea54ee22cfb0 [file] [log] [blame]
Vikas Manocha1b51c932016-02-11 15:47:20 -08001/*
2 * (C) Copyright 2016
3 * Vikas Manocha, <vikas.manocha@st.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
Vikas Manocha1b51c932016-02-11 15:47:20 -080011#define CONFIG_SYS_FLASH_BASE 0x08000000
12#define CONFIG_SYS_INIT_SP_ADDR 0x20050000
13#define CONFIG_SYS_TEXT_BASE 0x08000000
14
Vikas Manocha1b51c932016-02-11 15:47:20 -080015/*
16 * Configuration of the external SDRAM memory
17 */
18#define CONFIG_NR_DRAM_BANKS 1
Toshifumi NISHINAGA18bd7632016-07-08 01:02:25 +090019#define CONFIG_SYS_RAM_SIZE (8 * 1024 * 1024)
Vikas Manocha1b51c932016-02-11 15:47:20 -080020#define CONFIG_SYS_RAM_CS 1
21#define CONFIG_SYS_RAM_FREQ_DIV 2
Toshifumi NISHINAGA18bd7632016-07-08 01:02:25 +090022#define CONFIG_SYS_RAM_BASE 0xC0000000
Vikas Manocha1b51c932016-02-11 15:47:20 -080023#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE
Toshifumi NISHINAGA18bd7632016-07-08 01:02:25 +090024#define CONFIG_SYS_LOAD_ADDR 0xC0400000
25#define CONFIG_LOADADDR 0xC0400000
Vikas Manocha1b51c932016-02-11 15:47:20 -080026
Vikas Manocha49408022016-03-09 15:18:14 -080027#define CONFIG_SYS_MAX_FLASH_SECT 8
28#define CONFIG_SYS_MAX_FLASH_BANKS 1
Vikas Manocha1b51c932016-02-11 15:47:20 -080029
Vikas Manocha1b51c932016-02-11 15:47:20 -080030#define CONFIG_ENV_IS_NOWHERE
Vikas Manocha1b51c932016-02-11 15:47:20 -080031#define CONFIG_ENV_SIZE (8 << 10)
32
Vikas Manocha49408022016-03-09 15:18:14 -080033#define CONFIG_STM32_FLASH
Vikas Manocha1b51c932016-02-11 15:47:20 -080034#define CONFIG_STM32X7_SERIAL
35
Michael Kurz812962b2017-01-22 16:04:27 +010036#define CONFIG_DESIGNWARE_ETH
37#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8)
38#define CONFIG_DW_ALTDESCRIPTOR
39#define CONFIG_MII
Michael Kurz2c5a22f2017-01-22 16:04:29 +010040#define CONFIG_PHY_SMSC
Michael Kurz812962b2017-01-22 16:04:27 +010041
Toshifumi NISHINAGA65bfb9c2016-07-08 01:02:24 +090042#define CONFIG_STM32_HSE_HZ 25000000
43#define CONFIG_SYS_CLK_FREQ 200000000 /* 200 MHz */
Vikas Manocha1b51c932016-02-11 15:47:20 -080044#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */
45
46#define CONFIG_CMDLINE_TAG
47#define CONFIG_SETUP_MEMORY_TAGS
48#define CONFIG_INITRD_TAG
49#define CONFIG_REVISION_TAG
50
51#define CONFIG_SYS_CBSIZE 1024
52#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
53 + sizeof(CONFIG_SYS_PROMPT) + 16)
54
55#define CONFIG_SYS_MAXARGS 16
Michael Kurz812962b2017-01-22 16:04:27 +010056#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
Vikas Manocha1b51c932016-02-11 15:47:20 -080057
Vikas Manocha1b51c932016-02-11 15:47:20 -080058#define CONFIG_BOOTARGS \
59 "console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
60#define CONFIG_BOOTCOMMAND \
61 "run bootcmd_romfs"
62
63#define CONFIG_EXTRA_ENV_SETTINGS \
64 "bootargs_romfs=uclinux.physaddr=0x08180000 root=/dev/mtdblock0\0" \
65 "bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \
66 "bootm 0x08044000 - 0x08042000\0"
67
Vikas Manocha1b51c932016-02-11 15:47:20 -080068
69/*
70 * Command line configuration.
71 */
72#define CONFIG_SYS_LONGHELP
Vikas Manocha1b51c932016-02-11 15:47:20 -080073#define CONFIG_AUTO_COMPLETE
74#define CONFIG_CMDLINE_EDITING
75
76#define CONFIG_CMD_MEM
Vikas Manocha1a1e2752017-03-27 13:02:45 -070077#define CONFIG_CMD_CACHE
Vikas Manocha9c7573e2017-04-10 15:03:00 -070078#define CONFIG_BOARD_LATE_INIT
Vikas Manocha1b51c932016-02-11 15:47:20 -080079#endif /* __CONFIG_H */