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git01.mediatek.com / filogic / uboot / efdf340f159ea26ee930a08761da9144679fc765 / . / arch / arm / mach-uniphier / clk / clk-ph1-pro4.c
blob: 3df017edd27638ac2853f447f96273306a2931d4 [file] [log] [blame]
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]1/*
Masahiro Yamada663a23f2015-05-29 17:30:00 +0900[diff] [blame]2 * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
Masahiro Yamada663a23f2015-05-29 17:30:00 +0900[diff] [blame]7#include <linux/io.h>
Masahiro Yamadaefdf3402016-01-09 01:51:13 +0900[diff] [blame^]8
9#include "../init.h"
10#include "../sc-regs.h"
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]11
Masahiro Yamada75f16f82015-09-22 00:27:39 +0900[diff] [blame]12void ph1_pro4_clk_init(void)
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]13{
14 u32 tmp;
15
16 /* deassert reset */
17 tmp = readl(SC_RSTCTRL);
Masahiro Yamada046d8fd2015-02-27 02:26:58 +0900[diff] [blame]18#ifdef CONFIG_USB_XHCI_UNIPHIER
19 tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_USB3C0 |
20 SC_RSTCTRL_NRST_GIO;
21#endif
Masahiro Yamadac04368f2015-02-27 02:26:51 +0900[diff] [blame]22#ifdef CONFIG_UNIPHIER_ETH
23 tmp |= SC_RSTCTRL_NRST_ETHER;
24#endif
Masahiro Yamada36563e62015-02-27 02:26:53 +0900[diff] [blame]25#ifdef CONFIG_USB_EHCI_UNIPHIER
26 tmp |= SC_RSTCTRL_NRST_STDMAC;
27#endif
Masahiro Yamadac04368f2015-02-27 02:26:51 +0900[diff] [blame]28#ifdef CONFIG_NAND_DENALI
29 tmp |= SC_RSTCTRL_NRST_NAND;
30#endif
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]31 writel(tmp, SC_RSTCTRL);
32 readl(SC_RSTCTRL); /* dummy read */
33
Masahiro Yamada046d8fd2015-02-27 02:26:58 +0900[diff] [blame]34#ifdef CONFIG_USB_XHCI_UNIPHIER
35 tmp = readl(SC_RSTCTRL2);
36 tmp |= SC_RSTCTRL2_NRST_USB3B1 | SC_RSTCTRL2_NRST_USB3C1;
37 writel(tmp, SC_RSTCTRL2);
38 readl(SC_RSTCTRL2); /* dummy read */
39#endif
40
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]41 /* privide clocks */
42 tmp = readl(SC_CLKCTRL);
Masahiro Yamada046d8fd2015-02-27 02:26:58 +0900[diff] [blame]43#ifdef CONFIG_USB_XHCI_UNIPHIER
44 tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
45 SC_CLKCTRL_CEN_GIO;
46#endif
Masahiro Yamadac04368f2015-02-27 02:26:51 +0900[diff] [blame]47#ifdef CONFIG_UNIPHIER_ETH
48 tmp |= SC_CLKCTRL_CEN_ETHER;
49#endif
50#ifdef CONFIG_USB_EHCI_UNIPHIER
Masahiro Yamada36563e62015-02-27 02:26:53 +0900[diff] [blame]51 tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
Masahiro Yamadac04368f2015-02-27 02:26:51 +0900[diff] [blame]52#endif
53#ifdef CONFIG_NAND_DENALI
54 tmp |= SC_CLKCTRL_CEN_NAND;
55#endif
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]56 writel(tmp, SC_CLKCTRL);
57 readl(SC_CLKCTRL); /* dummy read */
58}