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git01.mediatek.com / filogic / uboot / 75f16f8c90067adb3087306ecbc9539df8cd906d / . / arch / arm / mach-uniphier / clk / clk-ph1-pro4.c
blob: 2e1b20a423c2d8da556729ecbaccf57b1e3a422d [file] [log] [blame]
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]1/*
Masahiro Yamada663a23f2015-05-29 17:30:00 +0900[diff] [blame]2 * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
Masahiro Yamada663a23f2015-05-29 17:30:00 +0900[diff] [blame]7#include <linux/io.h>
Masahiro Yamada75f16f82015-09-22 00:27:39 +0900[diff] [blame^]8#include <mach/init.h>
Masahiro Yamada95387e22015-02-27 02:26:44 +0900[diff] [blame]9#include <mach/sc-regs.h>
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]10
Masahiro Yamada75f16f82015-09-22 00:27:39 +0900[diff] [blame^]11void ph1_pro4_clk_init(void)
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]12{
13 u32 tmp;
14
15 /* deassert reset */
16 tmp = readl(SC_RSTCTRL);
Masahiro Yamada046d8fd2015-02-27 02:26:58 +0900[diff] [blame]17#ifdef CONFIG_USB_XHCI_UNIPHIER
18 tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_USB3C0 |
19 SC_RSTCTRL_NRST_GIO;
20#endif
Masahiro Yamadac04368f2015-02-27 02:26:51 +0900[diff] [blame]21#ifdef CONFIG_UNIPHIER_ETH
22 tmp |= SC_RSTCTRL_NRST_ETHER;
23#endif
Masahiro Yamada36563e62015-02-27 02:26:53 +0900[diff] [blame]24#ifdef CONFIG_USB_EHCI_UNIPHIER
25 tmp |= SC_RSTCTRL_NRST_STDMAC;
26#endif
Masahiro Yamadac04368f2015-02-27 02:26:51 +0900[diff] [blame]27#ifdef CONFIG_NAND_DENALI
28 tmp |= SC_RSTCTRL_NRST_NAND;
29#endif
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]30 writel(tmp, SC_RSTCTRL);
31 readl(SC_RSTCTRL); /* dummy read */
32
Masahiro Yamada046d8fd2015-02-27 02:26:58 +0900[diff] [blame]33#ifdef CONFIG_USB_XHCI_UNIPHIER
34 tmp = readl(SC_RSTCTRL2);
35 tmp |= SC_RSTCTRL2_NRST_USB3B1 | SC_RSTCTRL2_NRST_USB3C1;
36 writel(tmp, SC_RSTCTRL2);
37 readl(SC_RSTCTRL2); /* dummy read */
38#endif
39
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]40 /* privide clocks */
41 tmp = readl(SC_CLKCTRL);
Masahiro Yamada046d8fd2015-02-27 02:26:58 +0900[diff] [blame]42#ifdef CONFIG_USB_XHCI_UNIPHIER
43 tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
44 SC_CLKCTRL_CEN_GIO;
45#endif
Masahiro Yamadac04368f2015-02-27 02:26:51 +0900[diff] [blame]46#ifdef CONFIG_UNIPHIER_ETH
47 tmp |= SC_CLKCTRL_CEN_ETHER;
48#endif
49#ifdef CONFIG_USB_EHCI_UNIPHIER
Masahiro Yamada36563e62015-02-27 02:26:53 +0900[diff] [blame]50 tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
Masahiro Yamadac04368f2015-02-27 02:26:51 +0900[diff] [blame]51#endif
52#ifdef CONFIG_NAND_DENALI
53 tmp |= SC_CLKCTRL_CEN_NAND;
54#endif
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]55 writel(tmp, SC_CLKCTRL);
56 readl(SC_CLKCTRL); /* dummy read */
57}