blob: f5fc418ef033e065a365e31a4c36c82ead7f3a91 [file] [log] [blame]
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +09001/*
Masahiro Yamadac04368f2015-02-27 02:26:51 +09002 * Copyright (C) 2011-2015 Panasonic Corporation
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +09003 * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +09008#include <asm/io.h>
Masahiro Yamada95387e22015-02-27 02:26:44 +09009#include <mach/sc-regs.h>
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +090010
11void clkrst_init(void)
12{
13 u32 tmp;
14
15 /* deassert reset */
16 tmp = readl(SC_RSTCTRL);
Masahiro Yamadac04368f2015-02-27 02:26:51 +090017#ifdef CONFIG_UNIPHIER_ETH
18 tmp |= SC_RSTCTRL_NRST_ETHER;
19#endif
20#ifdef CONFIG_NAND_DENALI
21 tmp |= SC_RSTCTRL_NRST_NAND;
22#endif
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +090023 writel(tmp, SC_RSTCTRL);
24 readl(SC_RSTCTRL); /* dummy read */
25
26 /* privide clocks */
27 tmp = readl(SC_CLKCTRL);
Masahiro Yamadac04368f2015-02-27 02:26:51 +090028#ifdef CONFIG_UNIPHIER_ETH
29 tmp |= SC_CLKCTRL_CEN_ETHER;
30#endif
31#ifdef CONFIG_USB_EHCI_UNIPHIER
32 tmp |= SC_CLKCTRL_CEN_MIO;
33#endif
34#ifdef CONFIG_NAND_DENALI
35 tmp |= SC_CLKCTRL_CEN_NAND;
36#endif
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +090037 writel(tmp, SC_CLKCTRL);
38 readl(SC_CLKCTRL); /* dummy read */
39}