blob: dac346334d8100f46b90e18eb82a6b74eff8b100 [file] [log] [blame]
wdenk4a5c8a72003-03-06 00:02:04 +00001/*
2 * (C) Copyright 2000
3 * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
4 *
5 * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
6 * Marius Groeger <mgroeger@sysgo.de>
7 *
8 * (C) Copyright 2003 Pengutronix e.K.
9 * Robert Schwebel <r.schwebel@pengutronix.de>
10 *
Lei Wena41374b42011-04-13 23:48:31 +053011 * (C) Copyright 2011 Marvell Inc.
12 * Lei Wen <leiwen@marvell.com>
13 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +020014 * SPDX-License-Identifier: GPL-2.0+
wdenk4a5c8a72003-03-06 00:02:04 +000015 *
16 * Back ported to the 8xx platform (from the 8260 platform) by
17 * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
18 */
19
wdenk4a5c8a72003-03-06 00:02:04 +000020#include <common.h>
Marek Vasut2db1e962010-09-09 09:50:39 +020021#include <asm/io.h>
wdenk4a5c8a72003-03-06 00:02:04 +000022
23#ifdef CONFIG_HARD_I2C
wdenk4a5c8a72003-03-06 00:02:04 +000024#include <i2c.h>
Lei Wena41374b42011-04-13 23:48:31 +053025#include "mv_i2c.h"
wdenk4a5c8a72003-03-06 00:02:04 +000026
27#ifdef DEBUG_I2C
28#define PRINTD(x) printf x
29#else
30#define PRINTD(x)
31#endif
32
wdenk4a5c8a72003-03-06 00:02:04 +000033/* All transfers are described by this data structure */
34struct i2c_msg {
35 u8 condition;
wdenk57b2d802003-06-27 21:31:46 +000036 u8 acknack;
37 u8 direction;
wdenk4a5c8a72003-03-06 00:02:04 +000038 u8 data;
39};
40
Lei Wena41374b42011-04-13 23:48:31 +053041struct mv_i2c {
42 u32 ibmr;
43 u32 pad0;
44 u32 idbr;
45 u32 pad1;
46 u32 icr;
47 u32 pad2;
48 u32 isr;
49 u32 pad3;
50 u32 isar;
51};
52
Lei Wenf3841252011-04-13 23:48:39 +053053static struct mv_i2c *base;
Lei Wenaeb952a2011-09-30 05:44:12 +000054static void i2c_board_init(struct mv_i2c *base)
55{
56#ifdef CONFIG_SYS_I2C_INIT_BOARD
57 u32 icr;
58 /*
59 * call board specific i2c bus reset routine before accessing the
60 * environment, which might be in a chip on that bus. For details
61 * about this problem see doc/I2C_Edge_Conditions.
62 *
63 * disable I2C controller first, otherwhise it thinks we want to
64 * talk to the slave port...
65 */
66 icr = readl(&base->icr);
67 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr);
68
69 i2c_init_board();
70
71 writel(icr, &base->icr);
72#endif
73}
74
Lei Wenf3841252011-04-13 23:48:39 +053075#ifdef CONFIG_I2C_MULTI_BUS
76static u32 i2c_regs[CONFIG_MV_I2C_NUM] = CONFIG_MV_I2C_REG;
77static unsigned int bus_initialized[CONFIG_MV_I2C_NUM];
78static unsigned int current_bus;
79
80int i2c_set_bus_num(unsigned int bus)
81{
82 if ((bus < 0) || (bus >= CONFIG_MV_I2C_NUM)) {
83 printf("Bad bus: %d\n", bus);
84 return -1;
85 }
86
87 base = (struct mv_i2c *)i2c_regs[bus];
88 current_bus = bus;
89
90 if (!bus_initialized[current_bus]) {
Lei Wenaeb952a2011-09-30 05:44:12 +000091 i2c_board_init(base);
Lei Wenf3841252011-04-13 23:48:39 +053092 bus_initialized[current_bus] = 1;
93 }
94
95 return 0;
96}
97
98unsigned int i2c_get_bus_num(void)
99{
100 return current_bus;
101}
102#endif
Lei Wena41374b42011-04-13 23:48:31 +0530103
Lei Wend3ae17b2011-04-13 23:48:16 +0530104/*
Lei Wena41374b42011-04-13 23:48:31 +0530105 * i2c_reset: - reset the host controller
wdenk4a5c8a72003-03-06 00:02:04 +0000106 *
107 */
Lei Wend3ae17b2011-04-13 23:48:16 +0530108static void i2c_reset(void)
wdenk4a5c8a72003-03-06 00:02:04 +0000109{
Lei Wena41374b42011-04-13 23:48:31 +0530110 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */
111 writel(readl(&base->icr) | ICR_UR, &base->icr); /* reset the unit */
wdenk57b2d802003-06-27 21:31:46 +0000112 udelay(100);
Lei Wena41374b42011-04-13 23:48:31 +0530113 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */
114
115 i2c_clk_enable();
116
117 writel(CONFIG_SYS_I2C_SLAVE, &base->isar); /* set our slave address */
118 writel(I2C_ICR_INIT, &base->icr); /* set control reg values */
119 writel(I2C_ISR_INIT, &base->isr); /* set clear interrupt bits */
120 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */
wdenk57b2d802003-06-27 21:31:46 +0000121 udelay(100);
wdenk4a5c8a72003-03-06 00:02:04 +0000122}
123
Lei Wend3ae17b2011-04-13 23:48:16 +0530124/*
wdenk57b2d802003-06-27 21:31:46 +0000125 * i2c_isr_set_cleared: - wait until certain bits of the I2C status register
wdenk4a5c8a72003-03-06 00:02:04 +0000126 * are set and cleared
127 *
Markus Klotzbuecher7cf18be2006-03-24 12:23:27 +0100128 * @return: 1 in case of success, 0 means timeout (no match within 10 ms).
wdenk4a5c8a72003-03-06 00:02:04 +0000129 */
Lei Wend3ae17b2011-04-13 23:48:16 +0530130static int i2c_isr_set_cleared(unsigned long set_mask,
131 unsigned long cleared_mask)
wdenk4a5c8a72003-03-06 00:02:04 +0000132{
Lei Wena41374b42011-04-13 23:48:31 +0530133 int timeout = 1000, isr;
wdenk4a5c8a72003-03-06 00:02:04 +0000134
Lei Wena41374b42011-04-13 23:48:31 +0530135 do {
136 isr = readl(&base->isr);
Lei Wend3ae17b2011-04-13 23:48:16 +0530137 udelay(10);
138 if (timeout-- < 0)
139 return 0;
Lei Wena41374b42011-04-13 23:48:31 +0530140 } while (((isr & set_mask) != set_mask)
141 || ((isr & cleared_mask) != 0));
wdenk4a5c8a72003-03-06 00:02:04 +0000142
wdenk57b2d802003-06-27 21:31:46 +0000143 return 1;
wdenk4a5c8a72003-03-06 00:02:04 +0000144}
145
Lei Wend3ae17b2011-04-13 23:48:16 +0530146/*
wdenk4a5c8a72003-03-06 00:02:04 +0000147 * i2c_transfer: - Transfer one byte over the i2c bus
148 *
wdenk57b2d802003-06-27 21:31:46 +0000149 * This function can tranfer a byte over the i2c bus in both directions.
150 * It is used by the public API functions.
wdenk4a5c8a72003-03-06 00:02:04 +0000151 *
152 * @return: 0: transfer successful
153 * -1: message is empty
154 * -2: transmit timeout
155 * -3: ACK missing
156 * -4: receive timeout
157 * -5: illegal parameters
158 * -6: bus is busy and couldn't be aquired
wdenk57b2d802003-06-27 21:31:46 +0000159 */
wdenk4a5c8a72003-03-06 00:02:04 +0000160int i2c_transfer(struct i2c_msg *msg)
161{
162 int ret;
163
wdenk57b2d802003-06-27 21:31:46 +0000164 if (!msg)
wdenk4a5c8a72003-03-06 00:02:04 +0000165 goto transfer_error_msg_empty;
166
Lei Wend3ae17b2011-04-13 23:48:16 +0530167 switch (msg->direction) {
wdenk4a5c8a72003-03-06 00:02:04 +0000168 case I2C_WRITE:
wdenk4a5c8a72003-03-06 00:02:04 +0000169 /* check if bus is not busy */
Lei Wend3ae17b2011-04-13 23:48:16 +0530170 if (!i2c_isr_set_cleared(0, ISR_IBB))
wdenk4a5c8a72003-03-06 00:02:04 +0000171 goto transfer_error_bus_busy;
172
173 /* start transmission */
Lei Wena41374b42011-04-13 23:48:31 +0530174 writel(readl(&base->icr) & ~ICR_START, &base->icr);
175 writel(readl(&base->icr) & ~ICR_STOP, &base->icr);
176 writel(msg->data, &base->idbr);
Marek Vasut2db1e962010-09-09 09:50:39 +0200177 if (msg->condition == I2C_COND_START)
Lei Wena41374b42011-04-13 23:48:31 +0530178 writel(readl(&base->icr) | ICR_START, &base->icr);
Marek Vasut2db1e962010-09-09 09:50:39 +0200179 if (msg->condition == I2C_COND_STOP)
Lei Wena41374b42011-04-13 23:48:31 +0530180 writel(readl(&base->icr) | ICR_STOP, &base->icr);
Marek Vasut2db1e962010-09-09 09:50:39 +0200181 if (msg->acknack == I2C_ACKNAK_SENDNAK)
Lei Wena41374b42011-04-13 23:48:31 +0530182 writel(readl(&base->icr) | ICR_ACKNAK, &base->icr);
Marek Vasut2db1e962010-09-09 09:50:39 +0200183 if (msg->acknack == I2C_ACKNAK_SENDACK)
Lei Wena41374b42011-04-13 23:48:31 +0530184 writel(readl(&base->icr) & ~ICR_ACKNAK, &base->icr);
185 writel(readl(&base->icr) & ~ICR_ALDIE, &base->icr);
186 writel(readl(&base->icr) | ICR_TB, &base->icr);
wdenk4a5c8a72003-03-06 00:02:04 +0000187
188 /* transmit register empty? */
Lei Wend3ae17b2011-04-13 23:48:16 +0530189 if (!i2c_isr_set_cleared(ISR_ITE, 0))
wdenk4a5c8a72003-03-06 00:02:04 +0000190 goto transfer_error_transmit_timeout;
191
192 /* clear 'transmit empty' state */
Lei Wena41374b42011-04-13 23:48:31 +0530193 writel(readl(&base->isr) | ISR_ITE, &base->isr);
wdenk4a5c8a72003-03-06 00:02:04 +0000194
195 /* wait for ACK from slave */
196 if (msg->acknack == I2C_ACKNAK_WAITACK)
Lei Wend3ae17b2011-04-13 23:48:16 +0530197 if (!i2c_isr_set_cleared(0, ISR_ACKNAK))
wdenk4a5c8a72003-03-06 00:02:04 +0000198 goto transfer_error_ack_missing;
199 break;
200
201 case I2C_READ:
202
203 /* check if bus is not busy */
Lei Wend3ae17b2011-04-13 23:48:16 +0530204 if (!i2c_isr_set_cleared(0, ISR_IBB))
wdenk4a5c8a72003-03-06 00:02:04 +0000205 goto transfer_error_bus_busy;
206
207 /* start receive */
Lei Wena41374b42011-04-13 23:48:31 +0530208 writel(readl(&base->icr) & ~ICR_START, &base->icr);
209 writel(readl(&base->icr) & ~ICR_STOP, &base->icr);
Marek Vasut2db1e962010-09-09 09:50:39 +0200210 if (msg->condition == I2C_COND_START)
Lei Wena41374b42011-04-13 23:48:31 +0530211 writel(readl(&base->icr) | ICR_START, &base->icr);
Marek Vasut2db1e962010-09-09 09:50:39 +0200212 if (msg->condition == I2C_COND_STOP)
Lei Wena41374b42011-04-13 23:48:31 +0530213 writel(readl(&base->icr) | ICR_STOP, &base->icr);
Marek Vasut2db1e962010-09-09 09:50:39 +0200214 if (msg->acknack == I2C_ACKNAK_SENDNAK)
Lei Wena41374b42011-04-13 23:48:31 +0530215 writel(readl(&base->icr) | ICR_ACKNAK, &base->icr);
Marek Vasut2db1e962010-09-09 09:50:39 +0200216 if (msg->acknack == I2C_ACKNAK_SENDACK)
Lei Wena41374b42011-04-13 23:48:31 +0530217 writel(readl(&base->icr) & ~ICR_ACKNAK, &base->icr);
218 writel(readl(&base->icr) & ~ICR_ALDIE, &base->icr);
219 writel(readl(&base->icr) | ICR_TB, &base->icr);
wdenk4a5c8a72003-03-06 00:02:04 +0000220
221 /* receive register full? */
Lei Wend3ae17b2011-04-13 23:48:16 +0530222 if (!i2c_isr_set_cleared(ISR_IRF, 0))
wdenk57b2d802003-06-27 21:31:46 +0000223 goto transfer_error_receive_timeout;
wdenk4a5c8a72003-03-06 00:02:04 +0000224
Lei Wena41374b42011-04-13 23:48:31 +0530225 msg->data = readl(&base->idbr);
wdenk4a5c8a72003-03-06 00:02:04 +0000226
227 /* clear 'receive empty' state */
Lei Wena41374b42011-04-13 23:48:31 +0530228 writel(readl(&base->isr) | ISR_IRF, &base->isr);
wdenk4a5c8a72003-03-06 00:02:04 +0000229 break;
wdenk4a5c8a72003-03-06 00:02:04 +0000230 default:
wdenk4a5c8a72003-03-06 00:02:04 +0000231 goto transfer_error_illegal_param;
wdenk4a5c8a72003-03-06 00:02:04 +0000232 }
233
wdenk57b2d802003-06-27 21:31:46 +0000234 return 0;
wdenk4a5c8a72003-03-06 00:02:04 +0000235
wdenk57b2d802003-06-27 21:31:46 +0000236transfer_error_msg_empty:
wdenk4a5c8a72003-03-06 00:02:04 +0000237 PRINTD(("i2c_transfer: error: 'msg' is empty\n"));
238 ret = -1; goto i2c_transfer_finish;
239
240transfer_error_transmit_timeout:
241 PRINTD(("i2c_transfer: error: transmit timeout\n"));
242 ret = -2; goto i2c_transfer_finish;
243
244transfer_error_ack_missing:
245 PRINTD(("i2c_transfer: error: ACK missing\n"));
246 ret = -3; goto i2c_transfer_finish;
247
248transfer_error_receive_timeout:
249 PRINTD(("i2c_transfer: error: receive timeout\n"));
250 ret = -4; goto i2c_transfer_finish;
251
252transfer_error_illegal_param:
253 PRINTD(("i2c_transfer: error: illegal parameters\n"));
254 ret = -5; goto i2c_transfer_finish;
255
256transfer_error_bus_busy:
257 PRINTD(("i2c_transfer: error: bus is busy\n"));
258 ret = -6; goto i2c_transfer_finish;
259
260i2c_transfer_finish:
Lei Wen8d370f72011-09-30 05:43:48 +0000261 PRINTD(("i2c_transfer: ISR: 0x%04x\n", readl(&base->isr)));
wdenk4a5c8a72003-03-06 00:02:04 +0000262 i2c_reset();
263 return ret;
wdenk4a5c8a72003-03-06 00:02:04 +0000264}
265
266/* ------------------------------------------------------------------------ */
267/* API Functions */
268/* ------------------------------------------------------------------------ */
wdenk4a5c8a72003-03-06 00:02:04 +0000269void i2c_init(int speed, int slaveaddr)
270{
Lei Wenf3841252011-04-13 23:48:39 +0530271#ifdef CONFIG_I2C_MULTI_BUS
Lei Wenaeb952a2011-09-30 05:44:12 +0000272 current_bus = 0;
Lei Wenf3841252011-04-13 23:48:39 +0530273 base = (struct mv_i2c *)i2c_regs[current_bus];
274#else
275 base = (struct mv_i2c *)CONFIG_MV_I2C_REG;
276#endif
277
Lei Wenaeb952a2011-09-30 05:44:12 +0000278 i2c_board_init(base);
wdenk4a5c8a72003-03-06 00:02:04 +0000279}
280
Lei Wend3ae17b2011-04-13 23:48:16 +0530281/*
wdenk4a5c8a72003-03-06 00:02:04 +0000282 * i2c_probe: - Test if a chip answers for a given i2c address
283 *
wdenk57b2d802003-06-27 21:31:46 +0000284 * @chip: address of the chip which is searched for
Wolfgang Denka1be4762008-05-20 16:00:29 +0200285 * @return: 0 if a chip was found, -1 otherwhise
wdenk4a5c8a72003-03-06 00:02:04 +0000286 */
wdenk4a5c8a72003-03-06 00:02:04 +0000287int i2c_probe(uchar chip)
288{
289 struct i2c_msg msg;
290
291 i2c_reset();
292
293 msg.condition = I2C_COND_START;
294 msg.acknack = I2C_ACKNAK_WAITACK;
295 msg.direction = I2C_WRITE;
296 msg.data = (chip << 1) + 1;
Lei Wend3ae17b2011-04-13 23:48:16 +0530297 if (i2c_transfer(&msg))
298 return -1;
wdenk4a5c8a72003-03-06 00:02:04 +0000299
300 msg.condition = I2C_COND_STOP;
301 msg.acknack = I2C_ACKNAK_SENDNAK;
302 msg.direction = I2C_READ;
303 msg.data = 0x00;
Lei Wend3ae17b2011-04-13 23:48:16 +0530304 if (i2c_transfer(&msg))
305 return -1;
wdenk4a5c8a72003-03-06 00:02:04 +0000306
307 return 0;
308}
309
Lei Wend3ae17b2011-04-13 23:48:16 +0530310/*
wdenk4a5c8a72003-03-06 00:02:04 +0000311 * i2c_read: - Read multiple bytes from an i2c device
312 *
313 * The higher level routines take into account that this function is only
wdenk57b2d802003-06-27 21:31:46 +0000314 * called with len < page length of the device (see configuration file)
wdenk4a5c8a72003-03-06 00:02:04 +0000315 *
316 * @chip: address of the chip which is to be read
317 * @addr: i2c data address within the chip
318 * @alen: length of the i2c data address (1..2 bytes)
319 * @buffer: where to write the data
320 * @len: how much byte do we want to read
321 * @return: 0 in case of success
322 */
wdenk4a5c8a72003-03-06 00:02:04 +0000323int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
324{
325 struct i2c_msg msg;
326 u8 addr_bytes[3]; /* lowest...highest byte of data address */
wdenk4a5c8a72003-03-06 00:02:04 +0000327
Lei Wend3ae17b2011-04-13 23:48:16 +0530328 PRINTD(("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, "
329 "len=0x%02x)\n", chip, addr, alen, len));
wdenk4a5c8a72003-03-06 00:02:04 +0000330
331 i2c_reset();
332
333 /* dummy chip address write */
334 PRINTD(("i2c_read: dummy chip address write\n"));
335 msg.condition = I2C_COND_START;
336 msg.acknack = I2C_ACKNAK_WAITACK;
337 msg.direction = I2C_WRITE;
Lei Wend3ae17b2011-04-13 23:48:16 +0530338 msg.data = (chip << 1);
339 msg.data &= 0xFE;
340 if (i2c_transfer(&msg))
341 return -1;
wdenk57b2d802003-06-27 21:31:46 +0000342
wdenk4a5c8a72003-03-06 00:02:04 +0000343 /*
wdenk57b2d802003-06-27 21:31:46 +0000344 * send memory address bytes;
345 * alen defines how much bytes we have to send.
wdenk4a5c8a72003-03-06 00:02:04 +0000346 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200347 /*addr &= ((1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)-1); */
wdenk4a5c8a72003-03-06 00:02:04 +0000348 addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF);
349 addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF);
350 addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);
351
352 while (--alen >= 0) {
Lei Wend3ae17b2011-04-13 23:48:16 +0530353 PRINTD(("i2c_read: send memory word address byte %1d\n", alen));
wdenk4a5c8a72003-03-06 00:02:04 +0000354 msg.condition = I2C_COND_NORMAL;
355 msg.acknack = I2C_ACKNAK_WAITACK;
356 msg.direction = I2C_WRITE;
357 msg.data = addr_bytes[alen];
Lei Wend3ae17b2011-04-13 23:48:16 +0530358 if (i2c_transfer(&msg))
359 return -1;
wdenk4a5c8a72003-03-06 00:02:04 +0000360 }
wdenk57b2d802003-06-27 21:31:46 +0000361
wdenk4a5c8a72003-03-06 00:02:04 +0000362 /* start read sequence */
363 PRINTD(("i2c_read: start read sequence\n"));
364 msg.condition = I2C_COND_START;
365 msg.acknack = I2C_ACKNAK_WAITACK;
366 msg.direction = I2C_WRITE;
367 msg.data = (chip << 1);
368 msg.data |= 0x01;
Lei Wend3ae17b2011-04-13 23:48:16 +0530369 if (i2c_transfer(&msg))
370 return -1;
wdenk4a5c8a72003-03-06 00:02:04 +0000371
372 /* read bytes; send NACK at last byte */
373 while (len--) {
Lei Wend3ae17b2011-04-13 23:48:16 +0530374 if (len == 0) {
wdenk4a5c8a72003-03-06 00:02:04 +0000375 msg.condition = I2C_COND_STOP;
376 msg.acknack = I2C_ACKNAK_SENDNAK;
377 } else {
378 msg.condition = I2C_COND_NORMAL;
379 msg.acknack = I2C_ACKNAK_SENDACK;
380 }
381
382 msg.direction = I2C_READ;
383 msg.data = 0x00;
Lei Wend3ae17b2011-04-13 23:48:16 +0530384 if (i2c_transfer(&msg))
385 return -1;
wdenk4a5c8a72003-03-06 00:02:04 +0000386
Markus Klotzbuecher7cf18be2006-03-24 12:23:27 +0100387 *buffer = msg.data;
Lei Wend3ae17b2011-04-13 23:48:16 +0530388 PRINTD(("i2c_read: reading byte (0x%08x)=0x%02x\n",
389 (unsigned int)buffer, *buffer));
Markus Klotzbuecher7cf18be2006-03-24 12:23:27 +0100390 buffer++;
wdenk4a5c8a72003-03-06 00:02:04 +0000391 }
392
393 i2c_reset();
394
395 return 0;
396}
397
Lei Wend3ae17b2011-04-13 23:48:16 +0530398/*
wdenk4a5c8a72003-03-06 00:02:04 +0000399 * i2c_write: - Write multiple bytes to an i2c device
400 *
401 * The higher level routines take into account that this function is only
wdenk57b2d802003-06-27 21:31:46 +0000402 * called with len < page length of the device (see configuration file)
wdenk4a5c8a72003-03-06 00:02:04 +0000403 *
404 * @chip: address of the chip which is to be written
405 * @addr: i2c data address within the chip
406 * @alen: length of the i2c data address (1..2 bytes)
wdenk57b2d802003-06-27 21:31:46 +0000407 * @buffer: where to find the data to be written
wdenk4a5c8a72003-03-06 00:02:04 +0000408 * @len: how much byte do we want to read
409 * @return: 0 in case of success
410 */
wdenk4a5c8a72003-03-06 00:02:04 +0000411int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
412{
413 struct i2c_msg msg;
414 u8 addr_bytes[3]; /* lowest...highest byte of data address */
415
Lei Wend3ae17b2011-04-13 23:48:16 +0530416 PRINTD(("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, "
417 "len=0x%02x)\n", chip, addr, alen, len));
wdenk4a5c8a72003-03-06 00:02:04 +0000418
419 i2c_reset();
420
421 /* chip address write */
422 PRINTD(("i2c_write: chip address write\n"));
423 msg.condition = I2C_COND_START;
424 msg.acknack = I2C_ACKNAK_WAITACK;
425 msg.direction = I2C_WRITE;
Lei Wend3ae17b2011-04-13 23:48:16 +0530426 msg.data = (chip << 1);
427 msg.data &= 0xFE;
428 if (i2c_transfer(&msg))
429 return -1;
wdenk57b2d802003-06-27 21:31:46 +0000430
wdenk4a5c8a72003-03-06 00:02:04 +0000431 /*
wdenk57b2d802003-06-27 21:31:46 +0000432 * send memory address bytes;
433 * alen defines how much bytes we have to send.
wdenk4a5c8a72003-03-06 00:02:04 +0000434 */
435 addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF);
436 addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF);
437 addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);
438
439 while (--alen >= 0) {
wdenk4a5c8a72003-03-06 00:02:04 +0000440 PRINTD(("i2c_write: send memory word address\n"));
441 msg.condition = I2C_COND_NORMAL;
442 msg.acknack = I2C_ACKNAK_WAITACK;
443 msg.direction = I2C_WRITE;
444 msg.data = addr_bytes[alen];
Lei Wend3ae17b2011-04-13 23:48:16 +0530445 if (i2c_transfer(&msg))
446 return -1;
wdenk4a5c8a72003-03-06 00:02:04 +0000447 }
wdenk57b2d802003-06-27 21:31:46 +0000448
wdenk4a5c8a72003-03-06 00:02:04 +0000449 /* write bytes; send NACK at last byte */
450 while (len--) {
Lei Wend3ae17b2011-04-13 23:48:16 +0530451 PRINTD(("i2c_write: writing byte (0x%08x)=0x%02x\n",
452 (unsigned int)buffer, *buffer));
wdenk4a5c8a72003-03-06 00:02:04 +0000453
Lei Wend3ae17b2011-04-13 23:48:16 +0530454 if (len == 0)
wdenk4a5c8a72003-03-06 00:02:04 +0000455 msg.condition = I2C_COND_STOP;
456 else
457 msg.condition = I2C_COND_NORMAL;
458
459 msg.acknack = I2C_ACKNAK_WAITACK;
460 msg.direction = I2C_WRITE;
461 msg.data = *(buffer++);
wdenk57b2d802003-06-27 21:31:46 +0000462
Lei Wend3ae17b2011-04-13 23:48:16 +0530463 if (i2c_transfer(&msg))
464 return -1;
wdenk4a5c8a72003-03-06 00:02:04 +0000465 }
466
467 i2c_reset();
468
469 return 0;
wdenk4a5c8a72003-03-06 00:02:04 +0000470}
wdenk4a5c8a72003-03-06 00:02:04 +0000471#endif /* CONFIG_HARD_I2C */