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wdenk4a5c8a72003-03-06 00:02:04 +00001/*
2 * (C) Copyright 2000
3 * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
4 *
5 * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
6 * Marius Groeger <mgroeger@sysgo.de>
7 *
8 * (C) Copyright 2003 Pengutronix e.K.
9 * Robert Schwebel <r.schwebel@pengutronix.de>
10 *
11 * See file CREDITS for list of people who contributed to this
12 * project.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * MA 02111-1307 USA
28 *
29 * Back ported to the 8xx platform (from the 8260 platform) by
30 * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
31 */
32
33/* FIXME: this file is PXA255 specific! What about other XScales? */
34
35#include <common.h>
36
37#ifdef CONFIG_HARD_I2C
38
wdenk57b2d802003-06-27 21:31:46 +000039/*
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020040 * - CONFIG_SYS_I2C_SPEED
wdenk57b2d802003-06-27 21:31:46 +000041 * - I2C_PXA_SLAVE_ADDR
wdenk4a5c8a72003-03-06 00:02:04 +000042 */
43
wdenkcc1e2562003-03-06 13:39:27 +000044#include <asm/arch/hardware.h>
wdenk4a5c8a72003-03-06 00:02:04 +000045#include <asm/arch/pxa-regs.h>
46#include <i2c.h>
47
Wolfgang Denka1be4762008-05-20 16:00:29 +020048/*#define DEBUG_I2C 1 /###* activate local debugging output */
wdenk4a5c8a72003-03-06 00:02:04 +000049#define I2C_PXA_SLAVE_ADDR 0x1 /* slave pxa unit address */
Markus Klotzbuecher7cf18be2006-03-24 12:23:27 +010050
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020051#if (CONFIG_SYS_I2C_SPEED == 400000)
Markus Klotzbuecher7cf18be2006-03-24 12:23:27 +010052#define I2C_ICR_INIT (ICR_FM | ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
53#else
54#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
55#endif
56
wdenk4a5c8a72003-03-06 00:02:04 +000057#define I2C_ISR_INIT 0x7FF
58
59#ifdef DEBUG_I2C
60#define PRINTD(x) printf x
61#else
62#define PRINTD(x)
63#endif
64
65
66/* Shall the current transfer have a start/stop condition? */
67#define I2C_COND_NORMAL 0
68#define I2C_COND_START 1
69#define I2C_COND_STOP 2
70
71/* Shall the current transfer be ack/nacked or being waited for it? */
wdenk57b2d802003-06-27 21:31:46 +000072#define I2C_ACKNAK_WAITACK 1
wdenk4a5c8a72003-03-06 00:02:04 +000073#define I2C_ACKNAK_SENDACK 2
74#define I2C_ACKNAK_SENDNAK 4
75
76/* Specify who shall transfer the data (master or slave) */
77#define I2C_READ 0
78#define I2C_WRITE 1
79
80/* All transfers are described by this data structure */
81struct i2c_msg {
82 u8 condition;
wdenk57b2d802003-06-27 21:31:46 +000083 u8 acknack;
84 u8 direction;
wdenk4a5c8a72003-03-06 00:02:04 +000085 u8 data;
86};
87
88
89/**
wdenk57b2d802003-06-27 21:31:46 +000090 * i2c_pxa_reset: - reset the host controller
wdenk4a5c8a72003-03-06 00:02:04 +000091 *
92 */
93
94static void i2c_reset( void )
95{
96 ICR &= ~ICR_IUE; /* disable unit */
wdenk57b2d802003-06-27 21:31:46 +000097 ICR |= ICR_UR; /* reset the unit */
98 udelay(100);
99 ICR &= ~ICR_IUE; /* disable unit */
Markus Klotzbuecher7cf18be2006-03-24 12:23:27 +0100100#ifdef CONFIG_CPU_MONAHANS
101 CKENB |= (CKENB_4_I2C); /* | CKENB_1_PWM1 | CKENB_0_PWM0); */
102#else /* CONFIG_CPU_MONAHANS */
wdenk57b2d802003-06-27 21:31:46 +0000103 CKEN |= CKEN14_I2C; /* set the global I2C clock on */
Markus Klotzbuecher7cf18be2006-03-24 12:23:27 +0100104#endif
wdenk57b2d802003-06-27 21:31:46 +0000105 ISAR = I2C_PXA_SLAVE_ADDR; /* set our slave address */
106 ICR = I2C_ICR_INIT; /* set control register values */
107 ISR = I2C_ISR_INIT; /* set clear interrupt bits */
108 ICR |= ICR_IUE; /* enable unit */
109 udelay(100);
wdenk4a5c8a72003-03-06 00:02:04 +0000110}
111
112
113/**
wdenk57b2d802003-06-27 21:31:46 +0000114 * i2c_isr_set_cleared: - wait until certain bits of the I2C status register
wdenk4a5c8a72003-03-06 00:02:04 +0000115 * are set and cleared
116 *
Markus Klotzbuecher7cf18be2006-03-24 12:23:27 +0100117 * @return: 1 in case of success, 0 means timeout (no match within 10 ms).
wdenk4a5c8a72003-03-06 00:02:04 +0000118 */
wdenk4a5c8a72003-03-06 00:02:04 +0000119static int i2c_isr_set_cleared( unsigned long set_mask, unsigned long cleared_mask )
120{
121 int timeout = 10000;
122
123 while( ((ISR & set_mask)!=set_mask) || ((ISR & cleared_mask)!=0) ){
124 udelay( 10 );
125 if( timeout-- < 0 ) return 0;
126 }
127
wdenk57b2d802003-06-27 21:31:46 +0000128 return 1;
wdenk4a5c8a72003-03-06 00:02:04 +0000129}
130
131
132/**
133 * i2c_transfer: - Transfer one byte over the i2c bus
134 *
wdenk57b2d802003-06-27 21:31:46 +0000135 * This function can tranfer a byte over the i2c bus in both directions.
136 * It is used by the public API functions.
wdenk4a5c8a72003-03-06 00:02:04 +0000137 *
138 * @return: 0: transfer successful
139 * -1: message is empty
140 * -2: transmit timeout
141 * -3: ACK missing
142 * -4: receive timeout
143 * -5: illegal parameters
144 * -6: bus is busy and couldn't be aquired
wdenk57b2d802003-06-27 21:31:46 +0000145 */
wdenk4a5c8a72003-03-06 00:02:04 +0000146int i2c_transfer(struct i2c_msg *msg)
147{
148 int ret;
149
wdenk57b2d802003-06-27 21:31:46 +0000150 if (!msg)
wdenk4a5c8a72003-03-06 00:02:04 +0000151 goto transfer_error_msg_empty;
152
153 switch(msg->direction) {
154
155 case I2C_WRITE:
156
157 /* check if bus is not busy */
158 if (!i2c_isr_set_cleared(0,ISR_IBB))
159 goto transfer_error_bus_busy;
160
161 /* start transmission */
162 ICR &= ~ICR_START;
163 ICR &= ~ICR_STOP;
164 IDBR = msg->data;
165 if (msg->condition == I2C_COND_START) ICR |= ICR_START;
wdenk57b2d802003-06-27 21:31:46 +0000166 if (msg->condition == I2C_COND_STOP) ICR |= ICR_STOP;
wdenk4a5c8a72003-03-06 00:02:04 +0000167 if (msg->acknack == I2C_ACKNAK_SENDNAK) ICR |= ICR_ACKNAK;
168 if (msg->acknack == I2C_ACKNAK_SENDACK) ICR &= ~ICR_ACKNAK;
169 ICR &= ~ICR_ALDIE;
wdenk57b2d802003-06-27 21:31:46 +0000170 ICR |= ICR_TB;
wdenk4a5c8a72003-03-06 00:02:04 +0000171
172 /* transmit register empty? */
wdenk57b2d802003-06-27 21:31:46 +0000173 if (!i2c_isr_set_cleared(ISR_ITE,0))
wdenk4a5c8a72003-03-06 00:02:04 +0000174 goto transfer_error_transmit_timeout;
175
176 /* clear 'transmit empty' state */
177 ISR |= ISR_ITE;
178
179 /* wait for ACK from slave */
180 if (msg->acknack == I2C_ACKNAK_WAITACK)
wdenk57b2d802003-06-27 21:31:46 +0000181 if (!i2c_isr_set_cleared(0,ISR_ACKNAK))
wdenk4a5c8a72003-03-06 00:02:04 +0000182 goto transfer_error_ack_missing;
183 break;
184
185 case I2C_READ:
186
187 /* check if bus is not busy */
188 if (!i2c_isr_set_cleared(0,ISR_IBB))
189 goto transfer_error_bus_busy;
190
191 /* start receive */
192 ICR &= ~ICR_START;
193 ICR &= ~ICR_STOP;
Wolfgang Denka1be4762008-05-20 16:00:29 +0200194 if (msg->condition == I2C_COND_START) ICR |= ICR_START;
195 if (msg->condition == I2C_COND_STOP) ICR |= ICR_STOP;
wdenk4a5c8a72003-03-06 00:02:04 +0000196 if (msg->acknack == I2C_ACKNAK_SENDNAK) ICR |= ICR_ACKNAK;
197 if (msg->acknack == I2C_ACKNAK_SENDACK) ICR &= ~ICR_ACKNAK;
198 ICR &= ~ICR_ALDIE;
199 ICR |= ICR_TB;
200
201 /* receive register full? */
wdenk57b2d802003-06-27 21:31:46 +0000202 if (!i2c_isr_set_cleared(ISR_IRF,0))
203 goto transfer_error_receive_timeout;
wdenk4a5c8a72003-03-06 00:02:04 +0000204
205 msg->data = IDBR;
206
207 /* clear 'receive empty' state */
208 ISR |= ISR_IRF;
209
210 break;
211
212 default:
213
214 goto transfer_error_illegal_param;
215
216 }
217
wdenk57b2d802003-06-27 21:31:46 +0000218 return 0;
wdenk4a5c8a72003-03-06 00:02:04 +0000219
wdenk57b2d802003-06-27 21:31:46 +0000220transfer_error_msg_empty:
wdenk4a5c8a72003-03-06 00:02:04 +0000221 PRINTD(("i2c_transfer: error: 'msg' is empty\n"));
222 ret = -1; goto i2c_transfer_finish;
223
224transfer_error_transmit_timeout:
225 PRINTD(("i2c_transfer: error: transmit timeout\n"));
226 ret = -2; goto i2c_transfer_finish;
227
228transfer_error_ack_missing:
229 PRINTD(("i2c_transfer: error: ACK missing\n"));
230 ret = -3; goto i2c_transfer_finish;
231
232transfer_error_receive_timeout:
233 PRINTD(("i2c_transfer: error: receive timeout\n"));
234 ret = -4; goto i2c_transfer_finish;
235
236transfer_error_illegal_param:
237 PRINTD(("i2c_transfer: error: illegal parameters\n"));
238 ret = -5; goto i2c_transfer_finish;
239
240transfer_error_bus_busy:
241 PRINTD(("i2c_transfer: error: bus is busy\n"));
242 ret = -6; goto i2c_transfer_finish;
243
244i2c_transfer_finish:
245 PRINTD(("i2c_transfer: ISR: 0x%04x\n",ISR));
246 i2c_reset();
247 return ret;
248
249}
250
251/* ------------------------------------------------------------------------ */
252/* API Functions */
253/* ------------------------------------------------------------------------ */
254
255void i2c_init(int speed, int slaveaddr)
256{
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200257#ifdef CONFIG_SYS_I2C_INIT_BOARD
wdenkcc1e2562003-03-06 13:39:27 +0000258 /* call board specific i2c bus reset routine before accessing the */
259 /* environment, which might be in a chip on that bus. For details */
260 /* about this problem see doc/I2C_Edge_Conditions. */
261 i2c_init_board();
262#endif
wdenk4a5c8a72003-03-06 00:02:04 +0000263}
264
265
266/**
267 * i2c_probe: - Test if a chip answers for a given i2c address
268 *
wdenk57b2d802003-06-27 21:31:46 +0000269 * @chip: address of the chip which is searched for
Wolfgang Denka1be4762008-05-20 16:00:29 +0200270 * @return: 0 if a chip was found, -1 otherwhise
wdenk4a5c8a72003-03-06 00:02:04 +0000271 */
272
273int i2c_probe(uchar chip)
274{
275 struct i2c_msg msg;
276
277 i2c_reset();
278
279 msg.condition = I2C_COND_START;
280 msg.acknack = I2C_ACKNAK_WAITACK;
281 msg.direction = I2C_WRITE;
282 msg.data = (chip << 1) + 1;
283 if (i2c_transfer(&msg)) return -1;
284
285 msg.condition = I2C_COND_STOP;
286 msg.acknack = I2C_ACKNAK_SENDNAK;
287 msg.direction = I2C_READ;
288 msg.data = 0x00;
289 if (i2c_transfer(&msg)) return -1;
290
291 return 0;
292}
293
294
295/**
296 * i2c_read: - Read multiple bytes from an i2c device
297 *
298 * The higher level routines take into account that this function is only
wdenk57b2d802003-06-27 21:31:46 +0000299 * called with len < page length of the device (see configuration file)
wdenk4a5c8a72003-03-06 00:02:04 +0000300 *
301 * @chip: address of the chip which is to be read
302 * @addr: i2c data address within the chip
303 * @alen: length of the i2c data address (1..2 bytes)
304 * @buffer: where to write the data
305 * @len: how much byte do we want to read
306 * @return: 0 in case of success
307 */
308
309int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
310{
311 struct i2c_msg msg;
312 u8 addr_bytes[3]; /* lowest...highest byte of data address */
313 int ret;
314
315 PRINTD(("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, len=0x%02x)\n",chip,addr,alen,len));
316
317 i2c_reset();
318
319 /* dummy chip address write */
320 PRINTD(("i2c_read: dummy chip address write\n"));
321 msg.condition = I2C_COND_START;
322 msg.acknack = I2C_ACKNAK_WAITACK;
323 msg.direction = I2C_WRITE;
324 msg.data = (chip << 1);
325 msg.data &= 0xFE;
326 if ((ret=i2c_transfer(&msg))) return -1;
wdenk57b2d802003-06-27 21:31:46 +0000327
wdenk4a5c8a72003-03-06 00:02:04 +0000328 /*
wdenk57b2d802003-06-27 21:31:46 +0000329 * send memory address bytes;
330 * alen defines how much bytes we have to send.
wdenk4a5c8a72003-03-06 00:02:04 +0000331 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200332 /*addr &= ((1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)-1); */
wdenk4a5c8a72003-03-06 00:02:04 +0000333 addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF);
334 addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF);
335 addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);
336
337 while (--alen >= 0) {
338
339 PRINTD(("i2c_read: send memory word address byte %1d\n",alen));
340 msg.condition = I2C_COND_NORMAL;
341 msg.acknack = I2C_ACKNAK_WAITACK;
342 msg.direction = I2C_WRITE;
343 msg.data = addr_bytes[alen];
344 if ((ret=i2c_transfer(&msg))) return -1;
345 }
wdenk57b2d802003-06-27 21:31:46 +0000346
wdenk4a5c8a72003-03-06 00:02:04 +0000347
348 /* start read sequence */
349 PRINTD(("i2c_read: start read sequence\n"));
350 msg.condition = I2C_COND_START;
351 msg.acknack = I2C_ACKNAK_WAITACK;
352 msg.direction = I2C_WRITE;
353 msg.data = (chip << 1);
354 msg.data |= 0x01;
355 if ((ret=i2c_transfer(&msg))) return -1;
356
357 /* read bytes; send NACK at last byte */
358 while (len--) {
359
wdenk57b2d802003-06-27 21:31:46 +0000360 if (len==0) {
wdenk4a5c8a72003-03-06 00:02:04 +0000361 msg.condition = I2C_COND_STOP;
362 msg.acknack = I2C_ACKNAK_SENDNAK;
363 } else {
364 msg.condition = I2C_COND_NORMAL;
365 msg.acknack = I2C_ACKNAK_SENDACK;
366 }
367
368 msg.direction = I2C_READ;
369 msg.data = 0x00;
370 if ((ret=i2c_transfer(&msg))) return -1;
371
Markus Klotzbuecher7cf18be2006-03-24 12:23:27 +0100372 *buffer = msg.data;
wdenk4a5c8a72003-03-06 00:02:04 +0000373 PRINTD(("i2c_read: reading byte (0x%08x)=0x%02x\n",(unsigned int)buffer,*buffer));
Markus Klotzbuecher7cf18be2006-03-24 12:23:27 +0100374 buffer++;
wdenk4a5c8a72003-03-06 00:02:04 +0000375
376 }
377
378 i2c_reset();
379
380 return 0;
381}
382
383
384/**
385 * i2c_write: - Write multiple bytes to an i2c device
386 *
387 * The higher level routines take into account that this function is only
wdenk57b2d802003-06-27 21:31:46 +0000388 * called with len < page length of the device (see configuration file)
wdenk4a5c8a72003-03-06 00:02:04 +0000389 *
390 * @chip: address of the chip which is to be written
391 * @addr: i2c data address within the chip
392 * @alen: length of the i2c data address (1..2 bytes)
wdenk57b2d802003-06-27 21:31:46 +0000393 * @buffer: where to find the data to be written
wdenk4a5c8a72003-03-06 00:02:04 +0000394 * @len: how much byte do we want to read
395 * @return: 0 in case of success
396 */
397
398int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
399{
400 struct i2c_msg msg;
401 u8 addr_bytes[3]; /* lowest...highest byte of data address */
402
403 PRINTD(("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, len=0x%02x)\n",chip,addr,alen,len));
404
405 i2c_reset();
406
407 /* chip address write */
408 PRINTD(("i2c_write: chip address write\n"));
409 msg.condition = I2C_COND_START;
410 msg.acknack = I2C_ACKNAK_WAITACK;
411 msg.direction = I2C_WRITE;
412 msg.data = (chip << 1);
413 msg.data &= 0xFE;
414 if (i2c_transfer(&msg)) return -1;
wdenk57b2d802003-06-27 21:31:46 +0000415
wdenk4a5c8a72003-03-06 00:02:04 +0000416 /*
wdenk57b2d802003-06-27 21:31:46 +0000417 * send memory address bytes;
418 * alen defines how much bytes we have to send.
wdenk4a5c8a72003-03-06 00:02:04 +0000419 */
420 addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF);
421 addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF);
422 addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);
423
424 while (--alen >= 0) {
425
426 PRINTD(("i2c_write: send memory word address\n"));
427 msg.condition = I2C_COND_NORMAL;
428 msg.acknack = I2C_ACKNAK_WAITACK;
429 msg.direction = I2C_WRITE;
430 msg.data = addr_bytes[alen];
431 if (i2c_transfer(&msg)) return -1;
432 }
wdenk57b2d802003-06-27 21:31:46 +0000433
wdenk4a5c8a72003-03-06 00:02:04 +0000434 /* write bytes; send NACK at last byte */
435 while (len--) {
436
437 PRINTD(("i2c_write: writing byte (0x%08x)=0x%02x\n",(unsigned int)buffer,*buffer));
438
wdenk57b2d802003-06-27 21:31:46 +0000439 if (len==0)
wdenk4a5c8a72003-03-06 00:02:04 +0000440 msg.condition = I2C_COND_STOP;
441 else
442 msg.condition = I2C_COND_NORMAL;
443
444 msg.acknack = I2C_ACKNAK_WAITACK;
445 msg.direction = I2C_WRITE;
446 msg.data = *(buffer++);
wdenk57b2d802003-06-27 21:31:46 +0000447
wdenk4a5c8a72003-03-06 00:02:04 +0000448 if (i2c_transfer(&msg)) return -1;
449
450 }
451
452 i2c_reset();
453
454 return 0;
455
456}
457
458uchar i2c_reg_read (uchar chip, uchar reg)
459{
Wolfgang Denka923f112007-11-18 17:11:09 +0100460 uchar buf;
wdenkc12081a2004-03-23 20:18:25 +0000461
wdenk4a5c8a72003-03-06 00:02:04 +0000462 PRINTD(("i2c_reg_read(chip=0x%02x, reg=0x%02x)\n",chip,reg));
wdenkc12081a2004-03-23 20:18:25 +0000463 i2c_read(chip, reg, 1, &buf, 1);
464 return (buf);
wdenk4a5c8a72003-03-06 00:02:04 +0000465}
466
467void i2c_reg_write(uchar chip, uchar reg, uchar val)
468{
469 PRINTD(("i2c_reg_write(chip=0x%02x, reg=0x%02x, val=0x%02x)\n",chip,reg,val));
wdenkc12081a2004-03-23 20:18:25 +0000470 i2c_write(chip, reg, 1, &val, 1);
wdenk4a5c8a72003-03-06 00:02:04 +0000471}
472
473#endif /* CONFIG_HARD_I2C */