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Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -04001/*
Enric Balletbò i Serra19f9df82012-03-05 11:32:16 +00002 * Common configuration settings for IGEP technology based boards
3 *
4 * (C) Copyright 2012
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -04005 * ISEE 2007 SL, <www.iseebcn.com>
6 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +02007 * SPDX-License-Identifier: GPL-2.0+
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -04008 */
9
Enric Balletbò i Serra19f9df82012-03-05 11:32:16 +000010#ifndef __IGEP00X0_H
11#define __IGEP00X0_H
12
Enric Balletbò i Serraed116482013-12-06 21:30:24 +010013#ifdef CONFIG_BOOT_NAND
14#define CONFIG_NAND
15#endif
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040016
Enric Balletbò i Serraed116482013-12-06 21:30:24 +010017#define CONFIG_NR_DRAM_BANKS 2
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040018
Enric Balletbò i Serraed116482013-12-06 21:30:24 +010019#include <configs/ti_omap3_common.h>
Enric Balletbo i Serra74fea922013-02-07 00:40:05 +000020#include <asm/mach-types.h>
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040021
22/*
23 * Display CPU and Board information
24 */
25#define CONFIG_DISPLAY_CPUINFO 1
26#define CONFIG_DISPLAY_BOARDINFO 1
27
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040028#define CONFIG_MISC_INIT_R
29
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040030#define CONFIG_REVISION_TAG 1
31
Enric Balletbo i Serra3bb41cc2015-02-24 19:27:15 +010032/* Status LED available for IGEP0020 and IGEP0030 but not IGEP0032 */
33#if (CONFIG_MACH_TYPE != MACH_TYPE_IGEP0032)
Enric Balletbo i Serraa66c8872015-01-28 15:01:32 +010034#define CONFIG_STATUS_LED
35#define CONFIG_BOARD_SPECIFIC_LED
36#define CONFIG_GPIO_LED
37#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020)
38#define RED_LED_GPIO 27
Enric Balletbo i Serra3bb41cc2015-02-24 19:27:15 +010039#elif (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
Enric Balletbo i Serraa66c8872015-01-28 15:01:32 +010040#define RED_LED_GPIO 16
Enric Balletbo i Serra3bb41cc2015-02-24 19:27:15 +010041#else
42#error "status LED not defined for this machine."
Enric Balletbo i Serra02043a72013-02-07 00:40:06 +000043#endif
Enric Balletbo i Serraa66c8872015-01-28 15:01:32 +010044#define RED_LED_DEV 0
45#define STATUS_LED_BIT RED_LED_GPIO
46#define STATUS_LED_STATE STATUS_LED_ON
47#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
48#define STATUS_LED_BOOT RED_LED_DEV
Enric Balletbo i Serra3bb41cc2015-02-24 19:27:15 +010049#endif
Javier Martinez Canillasd549ace2012-12-27 03:36:01 +000050
Enric Balletbo i Serra12fcb8c2014-01-25 22:52:22 +010051/* GPIO banks */
52#define CONFIG_OMAP3_GPIO_3 /* GPIO64 .. 95 is in GPIO bank 3 */
53#define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO bank 5 */
54#define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */
55
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040056/* USB */
57#define CONFIG_MUSB_UDC 1
58#define CONFIG_USB_OMAP3 1
59#define CONFIG_TWL4030_USB 1
60
61/* USB device configuration */
62#define CONFIG_USB_DEVICE 1
63#define CONFIG_USB_TTY 1
64#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
65
66/* Change these to suit your needs */
67#define CONFIG_USBD_VENDORID 0x0451
68#define CONFIG_USBD_PRODUCTID 0x5678
69#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
70#define CONFIG_USBD_PRODUCT_NAME "IGEP"
71
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040072#define CONFIG_CMD_CACHE
Javier Martinez Canillas758b7c62012-07-28 01:19:32 +000073#ifdef CONFIG_BOOT_ONENAND
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040074#define CONFIG_CMD_ONENAND /* ONENAND support */
Javier Martinez Canillas758b7c62012-07-28 01:19:32 +000075#endif
Enric Balletbo i Serra02043a72013-02-07 00:40:06 +000076#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
77 (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0032)
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040078#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
Javier Martinez Canillase9b14522012-12-27 01:35:56 +000079#endif
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040080#define CONFIG_CMD_DHCP
81#define CONFIG_CMD_PING
82#define CONFIG_CMD_NFS /* NFS support */
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040083
Enric Balletbò i Serraed116482013-12-06 21:30:24 +010084/*#undef CONFIG_ENV_IS_NOWHERE*/
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040085
86#define CONFIG_EXTRA_ENV_SETTINGS \
Enric Balletbo i Serra4adf8012011-04-19 09:16:36 -040087 "usbtty=cdc_acm\0" \
88 "loadaddr=0x82000000\0" \
Javier Martinez Canillas7a0155e2013-08-07 17:53:19 +020089 "dtbaddr=0x81600000\0" \
90 "bootdir=/boot\0" \
91 "bootfile=zImage\0" \
Enric Balletbo i Serra4adf8012011-04-19 09:16:36 -040092 "usbtty=cdc_acm\0" \
Javier Martinez Canillasdf32d2c2012-06-29 02:45:40 +000093 "console=ttyO2,115200n8\0" \
Enric Balletbo i Serra52ac7ac2012-04-25 02:34:31 +000094 "mpurate=auto\0" \
Enric Balletbo i Serra4adf8012011-04-19 09:16:36 -040095 "vram=12M\0" \
96 "dvimode=1024x768MR-16@60\0" \
97 "defaultdisplay=dvi\0" \
98 "mmcdev=0\0" \
99 "mmcroot=/dev/mmcblk0p2 rw\0" \
Javier Martinez Canillasc5d6fb22012-06-29 02:45:41 +0000100 "mmcrootfstype=ext4 rootwait\0" \
Enric Balletbo i Serra4adf8012011-04-19 09:16:36 -0400101 "nandroot=/dev/mtdblock4 rw\0" \
102 "nandrootfstype=jffs2\0" \
103 "mmcargs=setenv bootargs console=${console} " \
104 "mpurate=${mpurate} " \
105 "vram=${vram} " \
106 "omapfb.mode=dvi:${dvimode} " \
107 "omapfb.debug=y " \
108 "omapdss.def_disp=${defaultdisplay} " \
109 "root=${mmcroot} " \
110 "rootfstype=${mmcrootfstype}\0" \
111 "nandargs=setenv bootargs console=${console} " \
112 "mpurate=${mpurate} " \
113 "vram=${vram} " \
114 "omapfb.mode=dvi:${dvimode} " \
115 "omapfb.debug=y " \
116 "omapdss.def_disp=${defaultdisplay} " \
117 "root=${nandroot} " \
118 "rootfstype=${nandrootfstype}\0" \
Enric Balletbo i Serracffccee2013-08-07 17:53:18 +0200119 "loadbootenv=load mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
Enric Balletbo i Serrad7cba702012-04-25 02:33:50 +0000120 "importbootenv=echo Importing environment from mmc ...; " \
121 "env import -t $loadaddr $filesize\0" \
Javier Martinez Canillas7a0155e2013-08-07 17:53:19 +0200122 "loadzimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}\0" \
123 "loadfdt=load mmc ${mmcdev}:2 ${dtbaddr} ${bootdir}/${dtbfile}\0" \
Enric Balletbo i Serra4adf8012011-04-19 09:16:36 -0400124 "mmcboot=echo Booting from mmc ...; " \
125 "run mmcargs; " \
Enric Balletbo i Serracffccee2013-08-07 17:53:18 +0200126 "bootz ${loadaddr}\0" \
Javier Martinez Canillas7a0155e2013-08-07 17:53:19 +0200127 "mmcbootfdt=echo Booting with DT from mmc ...; " \
128 "bootz ${loadaddr} - ${dtbaddr}\0" \
Enric Balletbo i Serra4adf8012011-04-19 09:16:36 -0400129 "nandboot=echo Booting from onenand ...; " \
130 "run nandargs; " \
131 "onenand read ${loadaddr} 280000 400000; " \
Enric Balletbo i Serracffccee2013-08-07 17:53:18 +0200132 "bootz ${loadaddr}\0" \
Enric Balletbo i Serra4adf8012011-04-19 09:16:36 -0400133
134#define CONFIG_BOOTCOMMAND \
Andrew Bradforde1c7c8a2012-10-01 05:06:52 +0000135 "mmc dev ${mmcdev}; if mmc rescan; then " \
Enric Balletbo i Serrad7cba702012-04-25 02:33:50 +0000136 "echo SD/MMC found on device ${mmcdev};" \
137 "if run loadbootenv; then " \
138 "run importbootenv;" \
139 "fi;" \
140 "if test -n $uenvcmd; then " \
141 "echo Running uenvcmd ...;" \
142 "run uenvcmd;" \
143 "fi;" \
Enric Balletbo i Serracffccee2013-08-07 17:53:18 +0200144 "if run loadzimage; then " \
Javier Martinez Canillas7a0155e2013-08-07 17:53:19 +0200145 "if test -n $dtbfile; then " \
146 "if run loadfdt; then " \
147 "run mmcbootfdt;" \
148 "fi;" \
149 "fi;" \
Enric Balletbo i Serrad7cba702012-04-25 02:33:50 +0000150 "run mmcboot;" \
151 "fi;" \
152 "fi;" \
153 "run nandboot;" \
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -0400154
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -0400155/*
156 * FLASH and environment organization
157 */
158
Javier Martinez Canillas758b7c62012-07-28 01:19:32 +0000159#ifdef CONFIG_BOOT_ONENAND
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -0400160#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
161
162#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
163
164#define CONFIG_ENV_IS_IN_ONENAND 1
165#define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */
166#define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET
Javier Martinez Canillas758b7c62012-07-28 01:19:32 +0000167#endif
168
Enric Balletbò i Serraed116482013-12-06 21:30:24 +0100169#ifdef CONFIG_NAND
Javier Martinez Canillas758b7c62012-07-28 01:19:32 +0000170#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */
171#define CONFIG_ENV_IS_IN_NAND 1
172#define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */
173#define CONFIG_ENV_ADDR NAND_ENV_OFFSET
Javier Martinez Canillas758b7c62012-07-28 01:19:32 +0000174#endif
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -0400175
176/*
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -0400177 * SMSC911x Ethernet
178 */
179#if defined(CONFIG_CMD_NET)
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -0400180#define CONFIG_SMC911X
181#define CONFIG_SMC911X_32_BIT
182#define CONFIG_SMC911X_BASE 0x2C000000
183#endif /* (CONFIG_CMD_NET) */
184
Enric Balletbò i Serraed116482013-12-06 21:30:24 +0100185/* OneNAND boot config */
Javier Martinez Canillas361fc832012-07-28 01:19:34 +0000186#ifdef CONFIG_BOOT_ONENAND
187#define CONFIG_SPL_ONENAND_SUPPORT
Javier Martinez Canillas361fc832012-07-28 01:19:34 +0000188#define CONFIG_SYS_ONENAND_U_BOOT_OFFS 0x80000
189#define CONFIG_SYS_ONENAND_PAGE_SIZE 2048
190#define CONFIG_SPL_ONENAND_LOAD_ADDR 0x80000
191#define CONFIG_SPL_ONENAND_LOAD_SIZE \
192 (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR)
193
194#endif
195
Javier Martinez Canillas361fc832012-07-28 01:19:34 +0000196/* NAND boot config */
Enric Balletbò i Serraed116482013-12-06 21:30:24 +0100197#ifdef CONFIG_NAND
pekon gupta6250faf2014-05-06 00:46:19 +0530198#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
Javier Martinez Canillas361fc832012-07-28 01:19:34 +0000199#define CONFIG_SYS_NAND_5_ADDR_CYCLE
200#define CONFIG_SYS_NAND_PAGE_COUNT 64
201#define CONFIG_SYS_NAND_PAGE_SIZE 2048
202#define CONFIG_SYS_NAND_OOBSIZE 64
203#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
204#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
205#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
206 10, 11, 12, 13}
207#define CONFIG_SYS_NAND_ECCSIZE 512
208#define CONFIG_SYS_NAND_ECCBYTES 3
pekon gupta3ef49732013-11-18 19:03:01 +0530209#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
pekon gupta7909b6d2014-07-18 17:59:42 +0530210#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
211/* NAND: SPL falcon mode configs */
212#ifdef CONFIG_SPL_OS_BOOT
213#define CONFIG_CMD_SPL_NAND_OFS 0x240000
214#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
215#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
216#endif
Javier Martinez Canillas361fc832012-07-28 01:19:34 +0000217#endif
218
Enric Balletbò i Serra19f9df82012-03-05 11:32:16 +0000219#endif /* __IGEP00X0_H */