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Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -04001/*
Enric Balletbò i Serra19f9df82012-03-05 11:32:16 +00002 * Common configuration settings for IGEP technology based boards
3 *
4 * (C) Copyright 2012
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -04005 * ISEE 2007 SL, <www.iseebcn.com>
6 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +02007 * SPDX-License-Identifier: GPL-2.0+
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -04008 */
9
Enric Balletbò i Serra19f9df82012-03-05 11:32:16 +000010#ifndef __IGEP00X0_H
11#define __IGEP00X0_H
12
Enric Balletbò i Serraed116482013-12-06 21:30:24 +010013#ifdef CONFIG_BOOT_NAND
14#define CONFIG_NAND
15#endif
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040016
Enric Balletbò i Serraed116482013-12-06 21:30:24 +010017#define CONFIG_NR_DRAM_BANKS 2
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040018
Enric Balletbò i Serraed116482013-12-06 21:30:24 +010019#include <configs/ti_omap3_common.h>
Enric Balletbo i Serra74fea922013-02-07 00:40:05 +000020#include <asm/mach-types.h>
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040021
22/*
23 * Display CPU and Board information
24 */
25#define CONFIG_DISPLAY_CPUINFO 1
26#define CONFIG_DISPLAY_BOARDINFO 1
27
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040028#define CONFIG_MISC_INIT_R
29
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040030#define CONFIG_REVISION_TAG 1
31
Javier Martinez Canillas8a110b82013-08-11 18:20:00 +020032#define CONFIG_SUPPORT_RAW_INITRD
Grant Likely100b8492011-03-28 09:59:07 +000033
Javier Martinez Canillasd549ace2012-12-27 03:36:01 +000034/* define to enable boot progress via leds */
Enric Balletbo i Serra02043a72013-02-07 00:40:06 +000035#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
36 (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
Javier Martinez Canillasd549ace2012-12-27 03:36:01 +000037#define CONFIG_SHOW_BOOT_PROGRESS
Enric Balletbo i Serra02043a72013-02-07 00:40:06 +000038#endif
Javier Martinez Canillasd549ace2012-12-27 03:36:01 +000039
Enric Balletbo i Serra12fcb8c2014-01-25 22:52:22 +010040/* GPIO banks */
41#define CONFIG_OMAP3_GPIO_3 /* GPIO64 .. 95 is in GPIO bank 3 */
42#define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO bank 5 */
43#define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */
44
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040045/* USB */
46#define CONFIG_MUSB_UDC 1
47#define CONFIG_USB_OMAP3 1
48#define CONFIG_TWL4030_USB 1
49
50/* USB device configuration */
51#define CONFIG_USB_DEVICE 1
52#define CONFIG_USB_TTY 1
53#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
54
55/* Change these to suit your needs */
56#define CONFIG_USBD_VENDORID 0x0451
57#define CONFIG_USBD_PRODUCTID 0x5678
58#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
59#define CONFIG_USBD_PRODUCT_NAME "IGEP"
60
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040061#define CONFIG_CMD_CACHE
Javier Martinez Canillas758b7c62012-07-28 01:19:32 +000062#ifdef CONFIG_BOOT_ONENAND
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040063#define CONFIG_CMD_ONENAND /* ONENAND support */
Javier Martinez Canillas758b7c62012-07-28 01:19:32 +000064#endif
Enric Balletbo i Serra02043a72013-02-07 00:40:06 +000065#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
66 (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0032)
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040067#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
Javier Martinez Canillase9b14522012-12-27 01:35:56 +000068#endif
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040069#define CONFIG_CMD_DHCP
70#define CONFIG_CMD_PING
71#define CONFIG_CMD_NFS /* NFS support */
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040072
Enric Balletbò i Serraed116482013-12-06 21:30:24 +010073/*#undef CONFIG_ENV_IS_NOWHERE*/
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040074
75#define CONFIG_EXTRA_ENV_SETTINGS \
Enric Balletbo i Serra4adf8012011-04-19 09:16:36 -040076 "usbtty=cdc_acm\0" \
77 "loadaddr=0x82000000\0" \
Javier Martinez Canillas7a0155e2013-08-07 17:53:19 +020078 "dtbaddr=0x81600000\0" \
79 "bootdir=/boot\0" \
80 "bootfile=zImage\0" \
Enric Balletbo i Serra4adf8012011-04-19 09:16:36 -040081 "usbtty=cdc_acm\0" \
Javier Martinez Canillasdf32d2c2012-06-29 02:45:40 +000082 "console=ttyO2,115200n8\0" \
Enric Balletbo i Serra52ac7ac2012-04-25 02:34:31 +000083 "mpurate=auto\0" \
Enric Balletbo i Serra4adf8012011-04-19 09:16:36 -040084 "vram=12M\0" \
85 "dvimode=1024x768MR-16@60\0" \
86 "defaultdisplay=dvi\0" \
87 "mmcdev=0\0" \
88 "mmcroot=/dev/mmcblk0p2 rw\0" \
Javier Martinez Canillasc5d6fb22012-06-29 02:45:41 +000089 "mmcrootfstype=ext4 rootwait\0" \
Enric Balletbo i Serra4adf8012011-04-19 09:16:36 -040090 "nandroot=/dev/mtdblock4 rw\0" \
91 "nandrootfstype=jffs2\0" \
92 "mmcargs=setenv bootargs console=${console} " \
93 "mpurate=${mpurate} " \
94 "vram=${vram} " \
95 "omapfb.mode=dvi:${dvimode} " \
96 "omapfb.debug=y " \
97 "omapdss.def_disp=${defaultdisplay} " \
98 "root=${mmcroot} " \
99 "rootfstype=${mmcrootfstype}\0" \
100 "nandargs=setenv bootargs console=${console} " \
101 "mpurate=${mpurate} " \
102 "vram=${vram} " \
103 "omapfb.mode=dvi:${dvimode} " \
104 "omapfb.debug=y " \
105 "omapdss.def_disp=${defaultdisplay} " \
106 "root=${nandroot} " \
107 "rootfstype=${nandrootfstype}\0" \
Enric Balletbo i Serracffccee2013-08-07 17:53:18 +0200108 "loadbootenv=load mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
Enric Balletbo i Serrad7cba702012-04-25 02:33:50 +0000109 "importbootenv=echo Importing environment from mmc ...; " \
110 "env import -t $loadaddr $filesize\0" \
Javier Martinez Canillas7a0155e2013-08-07 17:53:19 +0200111 "loadzimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}\0" \
112 "loadfdt=load mmc ${mmcdev}:2 ${dtbaddr} ${bootdir}/${dtbfile}\0" \
Enric Balletbo i Serra4adf8012011-04-19 09:16:36 -0400113 "mmcboot=echo Booting from mmc ...; " \
114 "run mmcargs; " \
Enric Balletbo i Serracffccee2013-08-07 17:53:18 +0200115 "bootz ${loadaddr}\0" \
Javier Martinez Canillas7a0155e2013-08-07 17:53:19 +0200116 "mmcbootfdt=echo Booting with DT from mmc ...; " \
117 "bootz ${loadaddr} - ${dtbaddr}\0" \
Enric Balletbo i Serra4adf8012011-04-19 09:16:36 -0400118 "nandboot=echo Booting from onenand ...; " \
119 "run nandargs; " \
120 "onenand read ${loadaddr} 280000 400000; " \
Enric Balletbo i Serracffccee2013-08-07 17:53:18 +0200121 "bootz ${loadaddr}\0" \
Enric Balletbo i Serra4adf8012011-04-19 09:16:36 -0400122
123#define CONFIG_BOOTCOMMAND \
Andrew Bradforde1c7c8a2012-10-01 05:06:52 +0000124 "mmc dev ${mmcdev}; if mmc rescan; then " \
Enric Balletbo i Serrad7cba702012-04-25 02:33:50 +0000125 "echo SD/MMC found on device ${mmcdev};" \
126 "if run loadbootenv; then " \
127 "run importbootenv;" \
128 "fi;" \
129 "if test -n $uenvcmd; then " \
130 "echo Running uenvcmd ...;" \
131 "run uenvcmd;" \
132 "fi;" \
Enric Balletbo i Serracffccee2013-08-07 17:53:18 +0200133 "if run loadzimage; then " \
Javier Martinez Canillas7a0155e2013-08-07 17:53:19 +0200134 "if test -n $dtbfile; then " \
135 "if run loadfdt; then " \
136 "run mmcbootfdt;" \
137 "fi;" \
138 "fi;" \
Enric Balletbo i Serrad7cba702012-04-25 02:33:50 +0000139 "run mmcboot;" \
140 "fi;" \
141 "fi;" \
142 "run nandboot;" \
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -0400143
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -0400144/*
145 * FLASH and environment organization
146 */
147
Javier Martinez Canillas758b7c62012-07-28 01:19:32 +0000148#ifdef CONFIG_BOOT_ONENAND
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -0400149#define PISMO1_ONEN_SIZE GPMC_SIZE_128M /* Configure the PISMO */
150
151#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
152
153#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
154
155#define CONFIG_ENV_IS_IN_ONENAND 1
156#define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */
157#define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET
Javier Martinez Canillas758b7c62012-07-28 01:19:32 +0000158#endif
159
Enric Balletbò i Serraed116482013-12-06 21:30:24 +0100160#ifdef CONFIG_NAND
Javier Martinez Canillas758b7c62012-07-28 01:19:32 +0000161#define PISMO1_NAND_SIZE GPMC_SIZE_128M /* Configure the PISMO */
Javier Martinez Canillas758b7c62012-07-28 01:19:32 +0000162#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
163#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */
164#define CONFIG_ENV_IS_IN_NAND 1
165#define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */
166#define CONFIG_ENV_ADDR NAND_ENV_OFFSET
Javier Martinez Canillas758b7c62012-07-28 01:19:32 +0000167#endif
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -0400168
169/*
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -0400170 * SMSC911x Ethernet
171 */
172#if defined(CONFIG_CMD_NET)
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -0400173#define CONFIG_SMC911X
174#define CONFIG_SMC911X_32_BIT
175#define CONFIG_SMC911X_BASE 0x2C000000
176#endif /* (CONFIG_CMD_NET) */
177
Enric Balletbò i Serraed116482013-12-06 21:30:24 +0100178/* OneNAND boot config */
Javier Martinez Canillas361fc832012-07-28 01:19:34 +0000179#ifdef CONFIG_BOOT_ONENAND
180#define CONFIG_SPL_ONENAND_SUPPORT
Javier Martinez Canillas361fc832012-07-28 01:19:34 +0000181#define CONFIG_SYS_ONENAND_U_BOOT_OFFS 0x80000
182#define CONFIG_SYS_ONENAND_PAGE_SIZE 2048
183#define CONFIG_SPL_ONENAND_LOAD_ADDR 0x80000
184#define CONFIG_SPL_ONENAND_LOAD_SIZE \
185 (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR)
186
187#endif
188
Javier Martinez Canillas361fc832012-07-28 01:19:34 +0000189/* NAND boot config */
Enric Balletbò i Serraed116482013-12-06 21:30:24 +0100190#ifdef CONFIG_NAND
Javier Martinez Canillas361fc832012-07-28 01:19:34 +0000191#define CONFIG_SYS_NAND_5_ADDR_CYCLE
192#define CONFIG_SYS_NAND_PAGE_COUNT 64
193#define CONFIG_SYS_NAND_PAGE_SIZE 2048
194#define CONFIG_SYS_NAND_OOBSIZE 64
195#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
196#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
197#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
198 10, 11, 12, 13}
199#define CONFIG_SYS_NAND_ECCSIZE 512
200#define CONFIG_SYS_NAND_ECCBYTES 3
pekon gupta3ef49732013-11-18 19:03:01 +0530201#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
Javier Martinez Canillas361fc832012-07-28 01:19:34 +0000202#endif
203
Enric Balletbò i Serra19f9df82012-03-05 11:32:16 +0000204#endif /* __IGEP00X0_H */