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Simon Glass858fed12020-04-08 16:57:36 -06001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Helpers for ACPI table generation
4 *
5 * Based on acpi.c from coreboot
6 *
7 * Copyright 2019 Google LLC
8 *
9 * Copyright (C) 2015, Saket Sinha <saket.sinha89@gmail.com>
10 * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
11 */
12
13#ifndef __ACPI_TABLE_H__
14#define __ACPI_TABLE_H__
15
Simon Glass48ca5782020-09-22 12:45:39 -060016#include <dm/acpi.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060017
Simon Glass858fed12020-04-08 16:57:36 -060018#define RSDP_SIG "RSD PTR " /* RSDP pointer signature */
19#define OEM_ID "U-BOOT" /* U-Boot */
20#define OEM_TABLE_ID "U-BOOTBL" /* U-Boot Table */
21#define ASLC_ID "INTL" /* Intel ASL Compiler */
22
Simon Glass4ffe8b02020-09-22 12:45:09 -060023/* TODO(sjg@chromium.org): Figure out how to get compiler revision */
24#define ASL_REVISION 0
25
Simon Glass858fed12020-04-08 16:57:36 -060026#define ACPI_RSDP_REV_ACPI_1_0 0
27#define ACPI_RSDP_REV_ACPI_2_0 2
28
Simon Glass4969d212020-04-08 16:57:37 -060029#if !defined(__ACPI__)
30
Simon Glassb11c2b32020-09-22 12:45:41 -060031#include <linux/bitops.h>
32
Simon Glass0e113842020-04-26 09:19:47 -060033struct acpi_ctx;
34
Simon Glass858fed12020-04-08 16:57:36 -060035/*
36 * RSDP (Root System Description Pointer)
37 * Note: ACPI 1.0 didn't have length, xsdt_address, and ext_checksum
38 */
39struct acpi_rsdp {
40 char signature[8]; /* RSDP signature */
41 u8 checksum; /* Checksum of the first 20 bytes */
42 char oem_id[6]; /* OEM ID */
43 u8 revision; /* 0 for ACPI 1.0, others 2 */
44 u32 rsdt_address; /* Physical address of RSDT (32 bits) */
45 u32 length; /* Total RSDP length (incl. extended part) */
46 u64 xsdt_address; /* Physical address of XSDT (64 bits) */
47 u8 ext_checksum; /* Checksum of the whole table */
48 u8 reserved[3];
49};
50
51/* Generic ACPI header, provided by (almost) all tables */
52struct __packed acpi_table_header {
Simon Glass48ca5782020-09-22 12:45:39 -060053 char signature[ACPI_NAME_LEN]; /* ACPI signature (4 ASCII chars) */
Simon Glass858fed12020-04-08 16:57:36 -060054 u32 length; /* Table length in bytes (incl. header) */
55 u8 revision; /* Table version (not ACPI version!) */
56 volatile u8 checksum; /* To make sum of entire table == 0 */
57 char oem_id[6]; /* OEM identification */
58 char oem_table_id[8]; /* OEM table identification */
59 u32 oem_revision; /* OEM revision number */
Heinrich Schuchardt10de8a82024-01-21 12:52:48 +010060 char creator_id[4]; /* ASL compiler vendor ID */
61 u32 creator_revision; /* ASL compiler revision number */
Simon Glass858fed12020-04-08 16:57:36 -060062};
63
Heinrich Schuchardtb9291b42024-01-21 14:44:36 +010064/**
65 * struct acpi_gen_regaddr - generic address structure (GAS)
66 */
Simon Glass4ffe8b02020-09-22 12:45:09 -060067struct acpi_gen_regaddr {
Heinrich Schuchardtb9291b42024-01-21 14:44:36 +010068 /**
69 * @space_id: address space ID
70 *
71 * See table "Operation Region Address Space Identifiers" in the ACPI
72 * specification.
73 */
74 u8 space_id;
75 /** @bit_width: size in bits of the register */
76 u8 bit_width;
77 /** @bit_offset: bit offset of the register */
78 u8 bit_offset;
79 /**
80 * @access_size: access size
81 *
82 * * 0 - undefined
83 * * 1 - byte access
84 * * 2 - word (2 bytes) access
85 * * 3 - Dword (4 bytes) access
86 * * 4 - Qword (8 bytes) access
87 *
88 * See ACPI_ACCESS_SIZE_*_ACCESS macros.
89 */
90 u8 access_size;
91 /** @addrl: register address, low 32 bits */
92 u32 addrl;
93 /** @addrh: register address, high 32 bits */
94 u32 addrh;
Simon Glass4ffe8b02020-09-22 12:45:09 -060095};
96
Simon Glass858fed12020-04-08 16:57:36 -060097/* A maximum number of 32 ACPI tables ought to be enough for now */
98#define MAX_ACPI_TABLES 32
99
100/* RSDT (Root System Description Table) */
101struct acpi_rsdt {
102 struct acpi_table_header header;
103 u32 entry[MAX_ACPI_TABLES];
104};
105
106/* XSDT (Extended System Description Table) */
Heinrich Schuchardtbb307a62023-11-21 15:41:27 +0100107struct __packed acpi_xsdt {
Simon Glass858fed12020-04-08 16:57:36 -0600108 struct acpi_table_header header;
109 u64 entry[MAX_ACPI_TABLES];
110};
111
Heinrich Schuchardtb9291b42024-01-21 14:44:36 +0100112/**
113 * struct acpi_hpet: High Precision Event Timers (HETP)
114 *
115 * The structure is defined in the
116 * "IA-PC HPET (High Precision Event Timers) Specification", rev 1.0a, Oct 2004
117 */
118struct acpi_hpet {
119 /** @header: table header */
Simon Glass4ffe8b02020-09-22 12:45:09 -0600120 struct acpi_table_header header;
Heinrich Schuchardtb9291b42024-01-21 14:44:36 +0100121 /** @id hardware ID of Event Timer Block */
Simon Glass4ffe8b02020-09-22 12:45:09 -0600122 u32 id;
Heinrich Schuchardtb9291b42024-01-21 14:44:36 +0100123 /** @addr: address of Event Timer Block */
Simon Glass4ffe8b02020-09-22 12:45:09 -0600124 struct acpi_gen_regaddr addr;
Heinrich Schuchardtb9291b42024-01-21 14:44:36 +0100125 /** @number: HPET sequence number */
Simon Glass4ffe8b02020-09-22 12:45:09 -0600126 u8 number;
Heinrich Schuchardtb9291b42024-01-21 14:44:36 +0100127 /** @min_tick: minimum clock ticks without lost interrupts */
Simon Glass4ffe8b02020-09-22 12:45:09 -0600128 u16 min_tick;
Heinrich Schuchardtb9291b42024-01-21 14:44:36 +0100129 /** @attributes: page protection and OEM atttribute */
Simon Glass4ffe8b02020-09-22 12:45:09 -0600130 u8 attributes;
Heinrich Schuchardtb9291b42024-01-21 14:44:36 +0100131} __packed;
Simon Glass4ffe8b02020-09-22 12:45:09 -0600132
Simon Glass272a7032020-09-22 12:45:32 -0600133struct __packed acpi_tpm2 {
134 struct acpi_table_header header;
135 u16 platform_class;
136 u8 reserved[2];
137 u64 control_area;
138 u32 start_method;
139 u8 msp[12];
140 u32 laml;
141 u64 lasa;
142};
143
Simon Glass28026282020-09-22 12:45:33 -0600144struct __packed acpi_tcpa {
145 struct acpi_table_header header;
146 u16 platform_class;
147 u32 laml;
148 u64 lasa;
149};
150
Simon Glass858fed12020-04-08 16:57:36 -0600151/* FADT Preferred Power Management Profile */
152enum acpi_pm_profile {
153 ACPI_PM_UNSPECIFIED = 0,
154 ACPI_PM_DESKTOP,
155 ACPI_PM_MOBILE,
156 ACPI_PM_WORKSTATION,
157 ACPI_PM_ENTERPRISE_SERVER,
158 ACPI_PM_SOHO_SERVER,
159 ACPI_PM_APPLIANCE_PC,
160 ACPI_PM_PERFORMANCE_SERVER,
161 ACPI_PM_TABLET
162};
163
164/* FADT flags for p_lvl2_lat and p_lvl3_lat */
165#define ACPI_FADT_C2_NOT_SUPPORTED 101
166#define ACPI_FADT_C3_NOT_SUPPORTED 1001
167
168/* FADT Boot Architecture Flags */
169#define ACPI_FADT_LEGACY_FREE 0x00
170#define ACPI_FADT_LEGACY_DEVICES BIT(0)
171#define ACPI_FADT_8042 BIT(1)
172#define ACPI_FADT_VGA_NOT_PRESENT BIT(2)
173#define ACPI_FADT_MSI_NOT_SUPPORTED BIT(3)
174#define ACPI_FADT_NO_PCIE_ASPM_CONTROL BIT(4)
175
176/* FADT Feature Flags */
177#define ACPI_FADT_WBINVD BIT(0)
178#define ACPI_FADT_WBINVD_FLUSH BIT(1)
179#define ACPI_FADT_C1_SUPPORTED BIT(2)
180#define ACPI_FADT_C2_MP_SUPPORTED BIT(3)
181#define ACPI_FADT_POWER_BUTTON BIT(4)
182#define ACPI_FADT_SLEEP_BUTTON BIT(5)
183#define ACPI_FADT_FIXED_RTC BIT(6)
184#define ACPI_FADT_S4_RTC_WAKE BIT(7)
185#define ACPI_FADT_32BIT_TIMER BIT(8)
186#define ACPI_FADT_DOCKING_SUPPORTED BIT(9)
187#define ACPI_FADT_RESET_REGISTER BIT(10)
188#define ACPI_FADT_SEALED_CASE BIT(11)
189#define ACPI_FADT_HEADLESS BIT(12)
190#define ACPI_FADT_SLEEP_TYPE BIT(13)
191#define ACPI_FADT_PCI_EXPRESS_WAKE BIT(14)
192#define ACPI_FADT_PLATFORM_CLOCK BIT(15)
193#define ACPI_FADT_S4_RTC_VALID BIT(16)
194#define ACPI_FADT_REMOTE_POWER_ON BIT(17)
195#define ACPI_FADT_APIC_CLUSTER BIT(18)
196#define ACPI_FADT_APIC_PHYSICAL BIT(19)
197#define ACPI_FADT_HW_REDUCED_ACPI BIT(20)
198#define ACPI_FADT_LOW_PWR_IDLE_S0 BIT(21)
199
Simon Glass3e11c8c2021-12-01 09:03:08 -0700200/* ARM boot flags */
201#define ACPI_ARM_PSCI_COMPLIANT BIT(0)
202
Simon Glass858fed12020-04-08 16:57:36 -0600203enum acpi_address_space_type {
204 ACPI_ADDRESS_SPACE_MEMORY = 0, /* System memory */
205 ACPI_ADDRESS_SPACE_IO, /* System I/O */
206 ACPI_ADDRESS_SPACE_PCI, /* PCI config space */
207 ACPI_ADDRESS_SPACE_EC, /* Embedded controller */
208 ACPI_ADDRESS_SPACE_SMBUS, /* SMBus */
209 ACPI_ADDRESS_SPACE_PCC = 0x0a, /* Platform Comm. Channel */
210 ACPI_ADDRESS_SPACE_FIXED = 0x7f /* Functional fixed hardware */
211};
212
213enum acpi_address_space_size {
214 ACPI_ACCESS_SIZE_UNDEFINED = 0,
215 ACPI_ACCESS_SIZE_BYTE_ACCESS,
216 ACPI_ACCESS_SIZE_WORD_ACCESS,
217 ACPI_ACCESS_SIZE_DWORD_ACCESS,
218 ACPI_ACCESS_SIZE_QWORD_ACCESS
219};
220
Simon Glass858fed12020-04-08 16:57:36 -0600221/* FADT (Fixed ACPI Description Table) */
222struct __packed acpi_fadt {
223 struct acpi_table_header header;
224 u32 firmware_ctrl;
225 u32 dsdt;
226 u8 res1;
227 u8 preferred_pm_profile;
228 u16 sci_int;
229 u32 smi_cmd;
230 u8 acpi_enable;
231 u8 acpi_disable;
232 u8 s4bios_req;
233 u8 pstate_cnt;
234 u32 pm1a_evt_blk;
235 u32 pm1b_evt_blk;
236 u32 pm1a_cnt_blk;
237 u32 pm1b_cnt_blk;
238 u32 pm2_cnt_blk;
239 u32 pm_tmr_blk;
240 u32 gpe0_blk;
241 u32 gpe1_blk;
242 u8 pm1_evt_len;
243 u8 pm1_cnt_len;
244 u8 pm2_cnt_len;
245 u8 pm_tmr_len;
246 u8 gpe0_blk_len;
247 u8 gpe1_blk_len;
248 u8 gpe1_base;
249 u8 cst_cnt;
250 u16 p_lvl2_lat;
251 u16 p_lvl3_lat;
252 u16 flush_size;
253 u16 flush_stride;
254 u8 duty_offset;
255 u8 duty_width;
256 u8 day_alrm;
257 u8 mon_alrm;
258 u8 century;
259 u16 iapc_boot_arch;
260 u8 res2;
261 u32 flags;
262 struct acpi_gen_regaddr reset_reg;
263 u8 reset_value;
264 u16 arm_boot_arch;
265 u8 minor_revision;
Heinrich Schuchardtec958062023-12-16 09:11:57 +0100266 u64 x_firmware_ctrl;
267 u64 x_dsdt;
Simon Glass858fed12020-04-08 16:57:36 -0600268 struct acpi_gen_regaddr x_pm1a_evt_blk;
269 struct acpi_gen_regaddr x_pm1b_evt_blk;
270 struct acpi_gen_regaddr x_pm1a_cnt_blk;
271 struct acpi_gen_regaddr x_pm1b_cnt_blk;
272 struct acpi_gen_regaddr x_pm2_cnt_blk;
273 struct acpi_gen_regaddr x_pm_tmr_blk;
274 struct acpi_gen_regaddr x_gpe0_blk;
275 struct acpi_gen_regaddr x_gpe1_blk;
Simon Glass3e11c8c2021-12-01 09:03:08 -0700276 struct acpi_gen_regaddr sleep_control_reg;
277 struct acpi_gen_regaddr sleep_status_reg;
278 u64 hyp_vendor_id;
Simon Glass858fed12020-04-08 16:57:36 -0600279};
280
Simon Glassb2672ea2020-04-08 16:57:38 -0600281/* FADT TABLE Revision values - note these do not match the ACPI revision */
282#define ACPI_FADT_REV_ACPI_1_0 1
283#define ACPI_FADT_REV_ACPI_2_0 3
284#define ACPI_FADT_REV_ACPI_3_0 4
285#define ACPI_FADT_REV_ACPI_4_0 4
286#define ACPI_FADT_REV_ACPI_5_0 5
287#define ACPI_FADT_REV_ACPI_6_0 6
288
289/* MADT TABLE Revision values - note these do not match the ACPI revision */
290#define ACPI_MADT_REV_ACPI_3_0 2
291#define ACPI_MADT_REV_ACPI_4_0 3
292#define ACPI_MADT_REV_ACPI_5_0 3
Patrick Rudolphf317fce2024-10-23 15:19:52 +0200293#define ACPI_MADT_REV_ACPI_6_2 4
294#define ACPI_MADT_REV_ACPI_6_3 5
Simon Glassb2672ea2020-04-08 16:57:38 -0600295
296#define ACPI_MCFG_REV_ACPI_3_0 1
297
298/* IVRS Revision Field */
299#define IVRS_FORMAT_FIXED 0x01 /* Type 10h & 11h only */
300#define IVRS_FORMAT_MIXED 0x02 /* Type 10h, 11h, & 40h */
301
Simon Glass858fed12020-04-08 16:57:36 -0600302/* FACS flags */
303#define ACPI_FACS_S4BIOS_F BIT(0)
304#define ACPI_FACS_64BIT_WAKE_F BIT(1)
305
306/* FACS (Firmware ACPI Control Structure) */
307struct acpi_facs {
Simon Glass48ca5782020-09-22 12:45:39 -0600308 char signature[ACPI_NAME_LEN]; /* "FACS" */
Simon Glass858fed12020-04-08 16:57:36 -0600309 u32 length; /* Length in bytes (>= 64) */
310 u32 hardware_signature; /* Hardware signature */
311 u32 firmware_waking_vector; /* Firmware waking vector */
312 u32 global_lock; /* Global lock */
313 u32 flags; /* FACS flags */
314 u32 x_firmware_waking_vector_l; /* X FW waking vector, low */
315 u32 x_firmware_waking_vector_h; /* X FW waking vector, high */
316 u8 version; /* Version 2 */
317 u8 res1[3];
318 u32 ospm_flags; /* OSPM enabled flags */
319 u8 res2[24];
320};
321
322/* MADT flags */
323#define ACPI_MADT_PCAT_COMPAT BIT(0)
324
325/* MADT (Multiple APIC Description Table) */
326struct acpi_madt {
327 struct acpi_table_header header;
328 u32 lapic_addr; /* Local APIC address */
329 u32 flags; /* Multiple APIC flags */
330};
331
332/* MADT: APIC Structure Type*/
333enum acpi_apic_types {
334 ACPI_APIC_LAPIC = 0, /* Processor local APIC */
335 ACPI_APIC_IOAPIC, /* I/O APIC */
336 ACPI_APIC_IRQ_SRC_OVERRIDE, /* Interrupt source override */
337 ACPI_APIC_NMI_SRC, /* NMI source */
338 ACPI_APIC_LAPIC_NMI, /* Local APIC NMI */
339 ACPI_APIC_LAPIC_ADDR_OVERRIDE, /* Local APIC address override */
340 ACPI_APIC_IOSAPIC, /* I/O SAPIC */
341 ACPI_APIC_LSAPIC, /* Local SAPIC */
342 ACPI_APIC_PLATFORM_IRQ_SRC, /* Platform interrupt sources */
343 ACPI_APIC_LX2APIC, /* Processor local x2APIC */
344 ACPI_APIC_LX2APIC_NMI, /* Local x2APIC NMI */
Simon Glass3e11c8c2021-12-01 09:03:08 -0700345 ACPI_APIC_GICC, /* Generic Interrupt Ctlr CPU i/f */
Patrick Rudolph7efbdbb2024-10-23 15:19:50 +0200346 ACPI_APIC_GICD, /* Generic Interrupt Ctlr Distributor */
347 ACPI_APIC_MSI_FRAME, /* Generic Interrupt MSI Frame */
348 ACPI_APIC_GICR, /* Generic Interrupt Ctlr Redistributor */
349 ACPI_APIC_ITS, /* Interrupt Translation Service */
Simon Glass858fed12020-04-08 16:57:36 -0600350};
351
352/* MADT: Processor Local APIC Structure */
353
354#define LOCAL_APIC_FLAG_ENABLED BIT(0)
355
356struct acpi_madt_lapic {
357 u8 type; /* Type (0) */
358 u8 length; /* Length in bytes (8) */
359 u8 processor_id; /* ACPI processor ID */
360 u8 apic_id; /* Local APIC ID */
361 u32 flags; /* Local APIC flags */
362};
363
364/* MADT: I/O APIC Structure */
365struct acpi_madt_ioapic {
366 u8 type; /* Type (1) */
367 u8 length; /* Length in bytes (12) */
368 u8 ioapic_id; /* I/O APIC ID */
369 u8 reserved;
370 u32 ioapic_addr; /* I/O APIC address */
371 u32 gsi_base; /* Global system interrupt base */
372};
373
374/* MADT: Interrupt Source Override Structure */
375struct __packed acpi_madt_irqoverride {
376 u8 type; /* Type (2) */
377 u8 length; /* Length in bytes (10) */
378 u8 bus; /* ISA (0) */
379 u8 source; /* Bus-relative int. source (IRQ) */
380 u32 gsirq; /* Global system interrupt */
381 u16 flags; /* MPS INTI flags */
382};
383
384/* MADT: Local APIC NMI Structure */
385struct __packed acpi_madt_lapic_nmi {
386 u8 type; /* Type (4) */
387 u8 length; /* Length in bytes (6) */
388 u8 processor_id; /* ACPI processor ID */
389 u16 flags; /* MPS INTI flags */
390 u8 lint; /* Local APIC LINT# */
391};
392
Patrick Rudolph3fcac5e2024-10-23 15:19:47 +0200393/* flags for acpi_madt_gicc flags word */
Simon Glass3e11c8c2021-12-01 09:03:08 -0700394enum {
Patrick Rudolph3fcac5e2024-10-23 15:19:47 +0200395 ACPI_MADTF_ENABLED = BIT(0),
396 ACPI_MADTF_PERF = BIT(1),
397 ACPI_MADTF_VGIC = BIT(2),
Simon Glass3e11c8c2021-12-01 09:03:08 -0700398};
399
400/**
Patrick Rudolph3fcac5e2024-10-23 15:19:47 +0200401 * struct __packed acpi_madt_gicc - GIC CPU interface (type 0xb)
Simon Glass3e11c8c2021-12-01 09:03:08 -0700402 *
403 * This holds information about the Generic Interrupt Controller (GIC) CPU
404 * interface. See ACPI Spec v6.3 section 5.2.12.14
405 */
Patrick Rudolph3fcac5e2024-10-23 15:19:47 +0200406struct acpi_madt_gicc {
Simon Glass3e11c8c2021-12-01 09:03:08 -0700407 u8 type;
408 u8 length;
409 u16 reserved;
410 u32 cpu_if_num;
411 u32 processor_id;
412 u32 flags;
413 u32 parking_proto;
414 u32 perf_gsiv;
415 u64 parked_addr;
416 u64 phys_base;
417 u64 gicv;
418 u64 gich;
419 u32 vgic_maint_irq;
420 u64 gicr_base;
421 u64 mpidr;
422 u8 efficiency;
423 u8 reserved2;
424 u16 spi_overflow_irq;
Heinrich Schuchardtb9291b42024-01-21 14:44:36 +0100425} __packed;
Simon Glass3e11c8c2021-12-01 09:03:08 -0700426
427/**
Patrick Rudolph3fcac5e2024-10-23 15:19:47 +0200428 * struct __packed acpi_madt_gicc - GIC distributor (type 0xc)
Simon Glass3e11c8c2021-12-01 09:03:08 -0700429 *
430 * This holds information about the Generic Interrupt Controller (GIC)
431 * Distributor interface. See ACPI Spec v6.3 section 5.2.12.15
432 */
Patrick Rudolph3fcac5e2024-10-23 15:19:47 +0200433struct acpi_madt_gicd {
Simon Glass3e11c8c2021-12-01 09:03:08 -0700434 u8 type;
435 u8 length;
436 u16 reserved;
437 u32 gic_id;
438 u64 phys_base;
439 u32 reserved2;
440 u8 gic_version;
441 u8 reserved3[3];
Heinrich Schuchardtb9291b42024-01-21 14:44:36 +0100442} __packed;
Simon Glass3e11c8c2021-12-01 09:03:08 -0700443
Patrick Rudolph7efbdbb2024-10-23 15:19:50 +0200444/**
445 * struct __packed acpi_madt_gicr - GIC Redistributor (type 0xe)
446 *
447 * This holds information about the Generic Interrupt Controller (GIC)
448 * Redistributor interface. See ACPI Spec v6.3 section 5.2.12.17
449 */
450struct acpi_madt_gicr {
451 u8 type;
452 u8 length;
453 u16 reserved;
454 u64 discovery_range_base_address;
455 u32 discovery_range_length;
456} __packed;
457
458/**
459 * struct __packed acpi_madt_its - GIC Interrupt Translation Service (type 0xf)
460 *
461 * This holds information about the Interrupt Translation Service (ITS)
462 * Structure. See ACPI Spec v6.3 section 5.2.12.18
463 */
464struct acpi_madt_its {
465 u8 type;
466 u8 length;
467 u16 reserved;
468 u32 gic_its_id;
469 u64 physical_base_address;
470 u32 reserved2;
471} __packed;
472
Simon Glass858fed12020-04-08 16:57:36 -0600473/* MCFG (PCI Express MMIO config space BAR description table) */
474struct acpi_mcfg {
475 struct acpi_table_header header;
476 u8 reserved[8];
477};
478
479struct acpi_mcfg_mmconfig {
480 u32 base_address_l;
481 u32 base_address_h;
482 u16 pci_segment_group_number;
483 u8 start_bus_number;
484 u8 end_bus_number;
485 u8 reserved[4];
486};
487
488/* PM1_CNT bit defines */
489#define PM1_CNT_SCI_EN BIT(0)
490
491/* ACPI global NVS structure */
492struct acpi_global_nvs;
493
494/* CSRT (Core System Resource Table) */
495struct acpi_csrt {
496 struct acpi_table_header header;
497};
498
Simon Glass3e11c8c2021-12-01 09:03:08 -0700499/**
500 * struct acpi_csrt_group - header for a group within the CSRT
501 *
502 * The CSRT consists of one or more groups and this is the header for each
503 *
504 * See Core System Resources Table (CSRT), March 13, 2017, Microsoft Corporation
505 * for details
506 *
507 * https://uefi.org/sites/default/files/resources/CSRT%20v2.pdf
508 *
509 * @shared_info_length indicates the number of shared-info bytes following this
510 * struct (which may be 0)
511 */
Simon Glass858fed12020-04-08 16:57:36 -0600512struct acpi_csrt_group {
513 u32 length;
514 u32 vendor_id;
515 u32 subvendor_id;
516 u16 device_id;
517 u16 subdevice_id;
518 u16 revision;
519 u16 reserved;
520 u32 shared_info_length;
521};
522
Simon Glass3e11c8c2021-12-01 09:03:08 -0700523/**
524 * struct acpi_csrt_descriptor - describes the information that follows
525 *
526 * See the spec as above for details
527 */
528struct acpi_csrt_descriptor {
529 u32 length;
530 u16 type;
531 u16 subtype;
532 u32 uid;
533};
534
535/**
536 * struct acpi_csrt_shared_info - shared info for Intel tangier
537 *
538 * This provides the shared info for this particular board. Notes that the CSRT
539 * does not describe the format of data, so this format may not be used by any
540 * other board.
541 */
Simon Glass858fed12020-04-08 16:57:36 -0600542struct acpi_csrt_shared_info {
543 u16 major_version;
544 u16 minor_version;
545 u32 mmio_base_low;
546 u32 mmio_base_high;
547 u32 gsi_interrupt;
548 u8 interrupt_polarity;
549 u8 interrupt_mode;
550 u8 num_channels;
551 u8 dma_address_width;
552 u16 base_request_line;
553 u16 num_handshake_signals;
554 u32 max_block_size;
555};
556
Simon Glass87cf8d22020-09-22 12:45:16 -0600557/* Port types for ACPI _UPC object */
558enum acpi_upc_type {
559 UPC_TYPE_A,
560 UPC_TYPE_MINI_AB,
561 UPC_TYPE_EXPRESSCARD,
562 UPC_TYPE_USB3_A,
563 UPC_TYPE_USB3_B,
564 UPC_TYPE_USB3_MICRO_B,
565 UPC_TYPE_USB3_MICRO_AB,
566 UPC_TYPE_USB3_POWER_B,
567 UPC_TYPE_C_USB2_ONLY,
568 UPC_TYPE_C_USB2_SS_SWITCH,
569 UPC_TYPE_C_USB2_SS,
570 UPC_TYPE_PROPRIETARY = 0xff,
571 /*
572 * The following types are not directly defined in the ACPI
573 * spec but are used by coreboot to identify a USB device type.
574 */
575 UPC_TYPE_INTERNAL = 0xff,
576 UPC_TYPE_UNUSED,
577 UPC_TYPE_HUB
578};
579
580enum dev_scope_type {
581 SCOPE_PCI_ENDPOINT = 1,
582 SCOPE_PCI_SUB = 2,
583 SCOPE_IOAPIC = 3,
584 SCOPE_MSI_HPET = 4,
585 SCOPE_ACPI_NAMESPACE_DEVICE = 5
586};
587
588struct __packed dev_scope {
589 u8 type;
590 u8 length;
591 u8 reserved[2];
592 u8 enumeration;
593 u8 start_bus;
594 struct {
595 u8 dev;
596 u8 fn;
597 } __packed path[0];
598};
599
Simon Glasse9629892020-04-08 16:57:39 -0600600enum dmar_type {
601 DMAR_DRHD = 0,
602 DMAR_RMRR = 1,
603 DMAR_ATSR = 2,
604 DMAR_RHSA = 3,
605 DMAR_ANDD = 4
606};
607
608enum {
609 DRHD_INCLUDE_PCI_ALL = BIT(0)
610};
611
612enum dmar_flags {
613 DMAR_INTR_REMAP = BIT(0),
614 DMAR_X2APIC_OPT_OUT = BIT(1),
615 DMAR_CTRL_PLATFORM_OPT_IN_FLAG = BIT(2),
616};
617
618struct dmar_entry {
619 u16 type;
620 u16 length;
621 u8 flags;
622 u8 reserved;
623 u16 segment;
624 u64 bar;
625};
626
627struct dmar_rmrr_entry {
628 u16 type;
629 u16 length;
630 u16 reserved;
631 u16 segment;
632 u64 bar;
633 u64 limit;
634};
635
636/* DMAR (DMA Remapping Reporting Structure) */
637struct __packed acpi_dmar {
638 struct acpi_table_header header;
639 u8 host_address_width;
640 u8 flags;
641 u8 reserved[10];
642 struct dmar_entry structure[0];
643};
644
Simon Glass858fed12020-04-08 16:57:36 -0600645/* DBG2 definitions are partially used for SPCR interface_type */
646
647/* Types for port_type field */
648
649#define ACPI_DBG2_SERIAL_PORT 0x8000
650#define ACPI_DBG2_1394_PORT 0x8001
651#define ACPI_DBG2_USB_PORT 0x8002
652#define ACPI_DBG2_NET_PORT 0x8003
653
654/* Subtypes for port_subtype field */
655
656#define ACPI_DBG2_16550_COMPATIBLE 0x0000
657#define ACPI_DBG2_16550_SUBSET 0x0001
658#define ACPI_DBG2_ARM_PL011 0x0003
659#define ACPI_DBG2_ARM_SBSA_32BIT 0x000D
660#define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E
661#define ACPI_DBG2_ARM_DCC 0x000F
662#define ACPI_DBG2_BCM2835 0x0010
663
664#define ACPI_DBG2_1394_STANDARD 0x0000
665
666#define ACPI_DBG2_USB_XHCI 0x0000
667#define ACPI_DBG2_USB_EHCI 0x0001
668
669#define ACPI_DBG2_UNKNOWN 0x00FF
670
Simon Glass95971892020-09-22 12:45:10 -0600671/* DBG2: Microsoft Debug Port Table 2 header */
672struct __packed acpi_dbg2_header {
673 struct acpi_table_header header;
674 u32 devices_offset;
675 u32 devices_count;
676};
677
678/* DBG2: Microsoft Debug Port Table 2 device entry */
679struct __packed acpi_dbg2_device {
680 u8 revision;
681 u16 length;
682 u8 address_count;
683 u16 namespace_string_length;
684 u16 namespace_string_offset;
685 u16 oem_data_length;
686 u16 oem_data_offset;
687 u16 port_type;
688 u16 port_subtype;
689 u8 reserved[2];
690 u16 base_address_offset;
691 u16 address_size_offset;
692};
693
Simon Glass858fed12020-04-08 16:57:36 -0600694/* SPCR (Serial Port Console Redirection table) */
695struct __packed acpi_spcr {
696 struct acpi_table_header header;
697 u8 interface_type;
698 u8 reserved[3];
699 struct acpi_gen_regaddr serial_port;
700 u8 interrupt_type;
701 u8 pc_interrupt;
702 u32 interrupt; /* Global system interrupt */
703 u8 baud_rate;
704 u8 parity;
705 u8 stop_bits;
706 u8 flow_control;
707 u8 terminal_type;
708 u8 reserved1;
709 u16 pci_device_id; /* Must be 0xffff if not PCI device */
710 u16 pci_vendor_id; /* Must be 0xffff if not PCI device */
711 u8 pci_bus;
712 u8 pci_device;
713 u8 pci_function;
714 u32 pci_flags;
715 u8 pci_segment;
716 u32 reserved2;
717};
718
Simon Glass3e11c8c2021-12-01 09:03:08 -0700719/**
720 * struct acpi_gtdt - Generic Timer Description Table (GTDT)
721 *
722 * See ACPI Spec v6.3 section 5.2.24 for details
723 */
Heinrich Schuchardtb9291b42024-01-21 14:44:36 +0100724struct acpi_gtdt {
Simon Glass3e11c8c2021-12-01 09:03:08 -0700725 struct acpi_table_header header;
726 u64 cnt_ctrl_base;
727 u32 reserved0;
728 u32 sec_el1_gsiv;
729 u32 sec_el1_flags;
730 u32 el1_gsiv;
731 u32 el1_flags;
732 u32 virt_el1_gsiv;
733 u32 virt_el1_flags;
734 u32 el2_gsiv;
735 u32 el2_flags;
736 u64 cnt_read_base;
737 u32 plat_timer_count;
738 u32 plat_timer_offset;
739 u32 virt_el2_gsiv;
740 u32 virt_el2_flags;
Heinrich Schuchardtb9291b42024-01-21 14:44:36 +0100741} __packed;
Simon Glass3e11c8c2021-12-01 09:03:08 -0700742
Patrick Rudolph8ca9f5142024-10-23 15:19:49 +0200743#define GTDT_FLAG_INT_ACTIVE_LOW BIT(1)
744
Simon Glass3e11c8c2021-12-01 09:03:08 -0700745/**
746 * struct acpi_bgrt - Boot Graphics Resource Table (BGRT)
747 *
748 * Optional table that provides a mechanism to indicate that an image was drawn
749 * on the screen during boot, and some information about the image.
750 *
751 * See ACPI Spec v6.3 section 5.2.22 for details
752 */
Heinrich Schuchardtb9291b42024-01-21 14:44:36 +0100753struct acpi_bgrt {
Simon Glass3e11c8c2021-12-01 09:03:08 -0700754 struct acpi_table_header header;
755 u16 version;
756 u8 status;
757 u8 image_type;
758 u64 addr;
759 u32 offset_x;
760 u32 offset_y;
Heinrich Schuchardtb9291b42024-01-21 14:44:36 +0100761} __packed;
Simon Glass3e11c8c2021-12-01 09:03:08 -0700762
763/* Types for PPTT */
764#define ACPI_PPTT_TYPE_PROC 0
765#define ACPI_PPTT_TYPE_CACHE 1
766
767/* Flags for PPTT */
768#define ACPI_PPTT_PHYSICAL_PACKAGE BIT(0)
769#define ACPI_PPTT_PROC_ID_VALID BIT(1)
770#define ACPI_PPTT_PROC_IS_THREAD BIT(2)
771#define ACPI_PPTT_NODE_IS_LEAF BIT(3)
772#define ACPI_PPTT_CHILDREN_IDENTICAL BIT(4)
773
774/**
775 * struct acpi_pptt_header - Processor Properties Topology Table (PPTT) header
776 *
777 * Describes the topological structure of processors and their shared resources,
778 * such as caches.
779 *
780 * See ACPI Spec v6.3 section 5.2.29 for details
781 */
Heinrich Schuchardtb9291b42024-01-21 14:44:36 +0100782struct acpi_pptt_header {
Simon Glass3e11c8c2021-12-01 09:03:08 -0700783 u8 type; /* ACPI_PPTT_TYPE_... */
784 u8 length;
785 u16 reserved;
Heinrich Schuchardtb9291b42024-01-21 14:44:36 +0100786} __packed;
Simon Glass3e11c8c2021-12-01 09:03:08 -0700787
788/**
789 * struct acpi_pptt_proc - a processor as described by PPTT
790 */
Heinrich Schuchardtb9291b42024-01-21 14:44:36 +0100791struct acpi_pptt_proc {
Simon Glass3e11c8c2021-12-01 09:03:08 -0700792 struct acpi_pptt_header hdr;
793 u32 flags;
794 u32 parent;
795 u32 proc_id;
796 u32 num_resources;
Heinrich Schuchardtb9291b42024-01-21 14:44:36 +0100797} __packed;
Simon Glass3e11c8c2021-12-01 09:03:08 -0700798
799/* Cache flags for acpi_pptt_cache */
800#define ACPI_PPTT_SIZE_VALID BIT(0)
801#define ACPI_PPTT_SETS_VALID BIT(1)
802#define ACPI_PPTT_ASSOC_VALID BIT(2)
803#define ACPI_PPTT_ALLOC_TYPE_VALID BIT(3)
804#define ACPI_PPTT_CACHE_TYPE_VALID BIT(4)
805#define ACPI_PPTT_WRITE_POLICY_VALID BIT(5)
806#define ACPI_PPTT_LINE_SIZE_VALID BIT(6)
807
808#define ACPI_PPTT_ALL_VALID 0x7f
809#define ACPI_PPTT_ALL_BUT_WRITE_POL 0x5f
810
811#define ACPI_PPTT_READ_ALLOC BIT(0)
812#define ACPI_PPTT_WRITE_ALLOC BIT(1)
813#define ACPI_PPTT_CACHE_TYPE_SHIFT 2
814#define ACPI_PPTT_CACHE_TYPE_MASK (3 << ACPI_PPTT_CACHE_TYPE_SHIFT)
815#define ACPI_PPTT_CACHE_TYPE_DATA 0
816#define ACPI_PPTT_CACHE_TYPE_INSTR 1
817#define ACPI_PPTT_CACHE_TYPE_UNIFIED 2
818#define ACPI_PPTT_CACHE_TYPE_DATA 0
819#define ACPI_PPTT_WRITE_THROUGH BIT(4)
820
821/**
822 * struct acpi_pptt_cache - a cache as described by PPTT
823 */
Heinrich Schuchardtb9291b42024-01-21 14:44:36 +0100824struct acpi_pptt_cache {
Simon Glass3e11c8c2021-12-01 09:03:08 -0700825 struct acpi_pptt_header hdr;
826 u32 flags;
827 u32 next_cache_level;
828 u32 size;
829 u32 sets;
830 u8 assoc;
831 u8 attributes;
832 u16 line_size;
Heinrich Schuchardtb9291b42024-01-21 14:44:36 +0100833} __packed;
Simon Glass3e11c8c2021-12-01 09:03:08 -0700834
Patrick Rudolph1669ce72024-10-23 15:19:54 +0200835/** IORT - IO Remapping Table revision 6
836 * Document number: ARM DEN 0049E.e, Sep 2022
837 */
838struct acpi_table_iort {
839 struct acpi_table_header header;
840 u32 node_count;
841 u32 node_offset;
842 u32 reserved;
843} __packed;
844
845/*
846 * IORT subtables
847 */
848struct acpi_iort_node {
849 u8 type;
850 u16 length;
851 u8 revision;
852 u32 identifier;
853 u32 mapping_count;
854 u32 mapping_offset;
855 char node_data[];
856} __packed;
857
858/* Values for subtable Type above */
859enum acpi_iort_node_type {
860 ACPI_IORT_NODE_ITS_GROUP = 0x00,
861 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
862 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
863 ACPI_IORT_NODE_SMMU = 0x03,
864 ACPI_IORT_NODE_SMMU_V3 = 0x04,
865 ACPI_IORT_NODE_PMCG = 0x05,
866 ACPI_IORT_NODE_RMR = 0x06,
867};
868
869/* ITS Group revision 1 */
870struct acpi_iort_its_group {
871 u32 its_count;
872 u32 identifiers[]; /* GIC ITS identifier array */
873} __packed;
874
875/* PCI root complex node revision 2 */
876struct acpi_iort_rc {
877 u64 mem_access_properties;
878 u32 ats_attributes;
879 u32 pci_segment_number;
880 u8 memory_address_size_limit;
881 u8 reserved[3];
882} __packed;
883
884/* SMMUv3 revision 5 */
885struct acpi_iort_smmu_v3 {
886 u64 base_address; /* SMMUv3 base address */
887 u32 flags;
888 u32 reserved;
889 u64 vatos_address;
890 u32 model;
891 u32 event_gsiv;
892 u32 pri_gsiv;
893 u32 gerr_gsiv;
894 u32 sync_gsiv;
895 u32 pxm;
896 u32 id_mapping_index;
897} __packed;
898
899/* Masks for Flags field above */
900#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
901#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3 << 1)
902#define ACPI_IORT_SMMU_V3_PXM_VALID (1 << 3)
903#define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1 << 4)
904
905struct acpi_iort_id_mapping {
906 u32 input_base; /* Lowest value in input range */
907 u32 id_count; /* Number of IDs */
908 u32 output_base; /* Lowest value in output range */
909 u32 output_reference; /* A reference to the output node */
910 u32 flags;
911} __packed;
912
913/* Masks for Flags field above for IORT subtable */
914#define ACPI_IORT_ID_SINGLE_MAPPING (1)
915
916/* Named Component revision 4 */
917struct acpi_iort_named_component {
918 u32 node_flags;
919 u64 memory_properties; /* Memory access properties */
920 u8 memory_address_limit; /* Memory address size limit */
921 char device_name[]; /* Path of namespace object */
922} __packed;
923
924/* Masks for Flags field above */
925#define ACPI_IORT_NC_STALL_SUPPORTED (1)
926#define ACPI_IORT_NC_PASID_BITS (31 << 1)
927
928struct acpi_iort_root_complex {
929 u64 memory_properties; /* Memory access properties */
930 u32 ats_attribute;
931 u32 pci_segment_number;
932 u8 memory_address_limit;/* Memory address size limit */
933 u16 pasid_capabilities; /* PASID Capabilities */
934 u8 reserved; /* Reserved, must be zero */
935 u32 flags; /* Flags */
936} __packed;
937
938/* Masks for ats_attribute field above */
939#define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */
940#define ACPI_IORT_PRI_SUPPORTED (1 << 1) /* The root complex PRI support */
941#define ACPI_IORT_PASID_FWD_SUPPORTED (1 << 2) /* The root complex PASID forward support */
942
943/* Masks for pasid_capabilities field above */
944#define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */
945
Simon Glassb2672ea2020-04-08 16:57:38 -0600946/* Tables defined/reserved by ACPI and generated by U-Boot */
947enum acpi_tables {
948 ACPITAB_BERT,
949 ACPITAB_DBG2,
950 ACPITAB_DMAR,
951 ACPITAB_DSDT,
952 ACPITAB_ECDT,
953 ACPITAB_FACS,
954 ACPITAB_FADT,
Patrick Rudolph4d3cf1a2024-10-23 15:19:53 +0200955 ACPITAB_GTDT,
Simon Glassb2672ea2020-04-08 16:57:38 -0600956 ACPITAB_HEST,
957 ACPITAB_HPET,
958 ACPITAB_IVRS,
959 ACPITAB_MADT,
960 ACPITAB_MCFG,
961 ACPITAB_NHLT,
Patrick Rudolph4d3cf1a2024-10-23 15:19:53 +0200962 ACPITAB_PPTT,
Simon Glassb2672ea2020-04-08 16:57:38 -0600963 ACPITAB_RSDP,
964 ACPITAB_RSDT,
965 ACPITAB_SLIT,
966 ACPITAB_SPCR,
967 ACPITAB_SPMI,
968 ACPITAB_SRAT,
969 ACPITAB_SSDT,
970 ACPITAB_TCPA,
971 ACPITAB_TPM2,
972 ACPITAB_VFCT,
973 ACPITAB_XSDT,
974
975 ACPITAB_COUNT,
976};
977
978/**
979 * acpi_get_table_revision() - Get the revision number generated for a table
980 *
981 * This keeps the version-number information in one place
982 *
983 * @table: ACPI table to check
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100984 * Return: version number that U-Boot generates
Simon Glassb2672ea2020-04-08 16:57:38 -0600985 */
986int acpi_get_table_revision(enum acpi_tables table);
987
Simon Glasse9629892020-04-08 16:57:39 -0600988/**
989 * acpi_create_dmar() - Create a DMA Remapping Reporting (DMAR) table
990 *
991 * @dmar: Place to put the table
992 * @flags: DMAR flags to use
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100993 * Return: 0 if OK, -ve on error
Simon Glasse9629892020-04-08 16:57:39 -0600994 */
995int acpi_create_dmar(struct acpi_dmar *dmar, enum dmar_flags flags);
996
Simon Glass17968c32020-04-26 09:19:46 -0600997/**
Patrick Rudolph5c360412024-10-23 15:19:55 +0200998 * acpi_create_mcfg_mmconfig() - Create a MCFG table entry
999 *
1000 * @mmconfig: Place to put the table
1001 * @base: Base address of the ECAM space
1002 * @seg_nr: PCI segment number
1003 * @start: PCI bus start number
1004 * @end: PCI bus end number
1005 * Return: size of data written in bytes
1006 */
1007int acpi_create_mcfg_mmconfig(struct acpi_mcfg_mmconfig *mmconfig, u32 base,
1008 u16 seg_nr, u8 start, u8 end);
1009
1010/**
Simon Glass95971892020-09-22 12:45:10 -06001011 * acpi_create_dbg2() - Create a DBG2 table
1012 *
1013 * This table describes how to access the debug UART
1014 *
1015 * @dbg2: Place to put information
1016 * @port_type: Serial port type (see ACPI_DBG2_...)
1017 * @port_subtype: Serial port sub-type (see ACPI_DBG2_...)
1018 * @address: ACPI address of port
1019 * @address_size: Size of address space
1020 * @device_path: Path of device (created using acpi_device_path())
1021 */
1022void acpi_create_dbg2(struct acpi_dbg2_header *dbg2,
1023 int port_type, int port_subtype,
1024 struct acpi_gen_regaddr *address, uint32_t address_size,
1025 const char *device_path);
1026
1027/**
Simon Glass0e113842020-04-26 09:19:47 -06001028 * acpi_align() - Align the ACPI output pointer to a 16-byte boundary
1029 *
1030 * @ctx: ACPI context
1031 */
1032void acpi_align(struct acpi_ctx *ctx);
1033
1034/**
1035 * acpi_align64() - Align the ACPI output pointer to a 64-byte boundary
1036 *
1037 * @ctx: ACPI context
1038 */
1039void acpi_align64(struct acpi_ctx *ctx);
1040
1041/**
1042 * acpi_inc() - Increment the ACPI output pointer by a bit
1043 *
1044 * The pointer is NOT aligned afterwards.
1045 *
1046 * @ctx: ACPI context
1047 * @amount: Amount to increment by
1048 */
1049void acpi_inc(struct acpi_ctx *ctx, uint amount);
1050
1051/**
1052 * acpi_inc_align() - Increment the ACPI output pointer by a bit and align
1053 *
1054 * The pointer is aligned afterwards to a 16-byte boundary
1055 *
1056 * @ctx: ACPI context
1057 * @amount: Amount to increment by
1058 */
1059void acpi_inc_align(struct acpi_ctx *ctx, uint amount);
1060
Simon Glass575a5472020-04-26 09:19:50 -06001061/**
1062 * acpi_add_table() - Add a new table to the RSDP and XSDT
1063 *
1064 * @ctx: ACPI context
1065 * @table: Table to add
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +01001066 * Return: 0 if OK, -E2BIG if too many tables
Simon Glass575a5472020-04-26 09:19:50 -06001067 */
1068int acpi_add_table(struct acpi_ctx *ctx, void *table);
1069
Andy Shevchenko6f15ab72023-09-01 11:27:10 -06001070static inline int acpi_add_fadt(struct acpi_ctx *ctx, struct acpi_fadt *fadt)
1071{
1072 acpi_add_table(ctx, fadt);
1073 acpi_inc(ctx, sizeof(struct acpi_fadt));
1074 return 0;
1075}
1076
Simon Glass9c442a62020-04-26 09:19:51 -06001077/**
Maximilian Bruned7fa54b2024-10-23 15:19:44 +02001078 * acpi_write_dbg2_pci_uart() - Write out a DBG2 table
1079 *
1080 * @ctx: Current ACPI context
1081 * @dev: Debug UART device to describe
1082 * @access_size: Access size for UART (e.g. ACPI_ACCESS_SIZE_DWORD_ACCESS)
1083 * Return: 0 if OK, -ve on error
1084 */
1085int acpi_write_dbg2_pci_uart(struct acpi_ctx *ctx, struct udevice *dev,
1086 uint access_size);
1087
1088/**
Simon Glass5d093f32020-11-04 09:57:25 -07001089 * acpi_write_rsdp() - Write out an RSDP indicating where the ACPI tables are
1090 *
1091 * @rsdp: Address to write RSDP
1092 * @rsdt: Address of RSDT
1093 * @xsdt: Address of XSDT
1094 */
1095void acpi_write_rsdp(struct acpi_rsdp *rsdp, struct acpi_rsdt *rsdt,
1096 struct acpi_xsdt *xsdt);
1097
Simon Glass96bf4332021-12-01 09:02:45 -07001098/**
1099 * acpi_fill_header() - Set up a table header
1100 *
1101 * @header: Pointer to header to set up
1102 * @signature: 4-character signature to use (e.g. "FACS")
1103 */
1104void acpi_fill_header(struct acpi_table_header *header, char *signature);
1105
Simon Glass89ce5192021-12-01 09:03:01 -07001106/**
1107 * acpi_fill_csrt() - Fill out the body of the CSRT
1108 *
1109 * This should write the contents of the Core System Resource Table (CSRT)
1110 * to the context. The header (struct acpi_table_header) has already been
1111 * written.
1112 *
1113 * @ctx: ACPI context to write to
1114 * @return 0 if OK, -ve on error
1115 */
1116int acpi_fill_csrt(struct acpi_ctx *ctx);
1117
Simon Glassb0da2232022-01-29 14:30:52 -07001118/**
Maximilian Brune8dc45122024-10-23 15:19:45 +02001119 * acpi_fill_fadt() - Fill out the body of the FADT
1120 *
1121 * Must be implemented in SoC specific code or in mainboard code.
1122 *
1123 * @fadt: Pointer to FADT to update
1124 */
1125void acpi_fill_fadt(struct acpi_fadt *fadt);
1126
1127/**
Patrick Rudolph1669ce72024-10-23 15:19:54 +02001128 * acpi_fill_iort() - Fill out the body of the IORT table
1129 *
1130 * Should be implemented in SoC specific code.
1131 *
1132 * @ctx: ACPI context to write to
1133 * @offset: Offset from the start of the IORT
1134 */
1135int acpi_fill_iort(struct acpi_ctx *ctx);
1136
1137/**
1138 * acpi_iort_add_its_group() - Add ITS group node to IORT table
1139 *
1140 * Called by SoC specific code within acpi_fill_iort().
1141 *
1142 * @ctx: ACPI context to write to
1143 * @its_count: Elements in identifiers
1144 * @identifiers: The array of ITS identifiers. These IDs must match the value
1145 * used in the Multiple APIC Description Table (MADT) GIC ITS
1146 * structure for each relevant ITS unit.
1147 * @return Offset of table within parent
1148 */
1149int acpi_iort_add_its_group(struct acpi_ctx *ctx,
1150 const u32 its_count,
1151 const u32 *identifiers);
1152
1153/**
1154 * acpi_iort_add_named_component() - Add named component to IORT table
1155 *
1156 * Called by SoC specific code within acpi_fill_iort().
1157 *
1158 * @ctx: ACPI context to write to
1159 * @node_flags: Node flags
1160 * @memory_properties: Memory properties
1161 * @memory_address_limit: Memory address limit
1162 * @device_name: ACPI device path
1163 * @return Offset of table within parent
1164 */
1165int acpi_iort_add_named_component(struct acpi_ctx *ctx,
1166 const u32 node_flags,
1167 const u64 memory_properties,
1168 const u8 memory_address_limit,
1169 const char *device_name);
1170
1171/**
1172 * acpi_iort_add_rc() - Add PCI root complex node to IORT table
1173 *
1174 * Called by SoC specific code within acpi_fill_iort().
1175 *
1176 * @ctx: ACPI context to write to
1177 * @mem_access_properties: Memory access properties
1178 * @ats_attributes: Support for ATS and its ancillary feature
1179 * @pci_segment_number: The PCI segment number, as in MCFG
1180 * @memory_address_size_limit: The number of address bits, starting from LSB
1181 * @num_mappings: Number of elements in map
1182 * @map: ID mappings for this node
1183 * @return Offset of table within parent
1184 */
1185int acpi_iort_add_rc(struct acpi_ctx *ctx,
1186 const u64 mem_access_properties,
1187 const u32 ats_attributes,
1188 const u32 pci_segment_number,
1189 const u8 memory_address_size_limit,
1190 const int num_mappings,
1191 const struct acpi_iort_id_mapping *map);
1192
1193/**
1194 * acpi_iort_add_smmu_v3() - Add PCI root complex node to IORT table
1195 *
1196 * Called by SoC specific code within acpi_fill_iort().
1197 *
1198 * @ctx: ACPI context to write to
1199 * @base_address: Base address of SMMU
1200 * @flags: SMMUv3 flags
1201 * @vatos_address: Optional, set to zero if not supported
1202 * @model: Model ID
1203 * @event_gsiv: GSIV of the Event interrupt if SPI based
1204 * @pri_gsiv: GSIV of the PRI interrupt if SPI based
1205 * @gerr_gsiv: GSIV of the GERR interrupt if GSIV based
1206 * @sync_gsiv: TGSIV of the Sync interrupt if GSIV based
1207 * @pxm: Proximity Domain
1208 * @id_mapping_index: If all the SMMU control interrupts are GSIV based,
1209 * this field is ignored. Index into the array of ID
1210 * mapping otherwise.
1211 * @num_mappings: Number of elements in map
1212 * @map: ID mappings for this node
1213 * @return Offset of table within parent
1214 */
1215int acpi_iort_add_smmu_v3(struct acpi_ctx *ctx,
1216 const u64 base_address,
1217 const u32 flags,
1218 const u64 vatos_address,
1219 const u32 model,
1220 const u32 event_gsiv,
1221 const u32 pri_gsiv,
1222 const u32 gerr_gsiv,
1223 const u32 sync_gsiv,
1224 const u32 pxm,
1225 const u32 id_mapping_index,
1226 const int num_mappings,
1227 const struct acpi_iort_id_mapping *map);
1228
1229/**
Patrick Rudolph97b4c8a2024-10-23 15:19:46 +02001230 * acpi_fill_madt() - Fill out the body of the MADT
1231 *
1232 * Must be implemented in SoC specific code.
1233 *
1234 * @madt: The MADT to update
1235 * @ctx: ACPI context to write MADT sub-tables to
1236 * @return Pointer to the end of tables, where the next tables can be written
1237 */
1238void *acpi_fill_madt(struct acpi_madt *madt, struct acpi_ctx *ctx);
1239
1240/**
Patrick Rudolph2f6f8d92024-10-23 15:20:13 +02001241 * acpi_write_park() - Installs the ACPI parking protocol.
1242 *
1243 * Sets up the ACPI parking protocol and installs the spinning code for
1244 * secondary CPUs.
1245 *
1246 * @madt: The MADT to update
1247 */
1248void acpi_write_park(struct acpi_madt *madt);
1249
1250/**
Heinrich Schuchardt2c1fd4a2023-11-09 09:23:02 -08001251 * acpi_get_rsdp_addr() - get ACPI RSDP table address
1252 *
1253 * This routine returns the ACPI RSDP table address in the system memory.
1254 *
1255 * @return: ACPI RSDP table address
1256 */
1257ulong acpi_get_rsdp_addr(void);
1258
1259/**
Simon Glassb0da2232022-01-29 14:30:52 -07001260 * write_acpi_tables() - Write out the ACPI tables
1261 *
1262 * This writes all ACPI tables to the given address
1263 *
1264 * @start: Start address for the tables
1265 * @return address of end of tables, where the next tables can be written
1266 */
1267ulong write_acpi_tables(ulong start);
1268
Simon Glass7ae69762023-05-04 16:54:58 -06001269/**
1270 * acpi_find_table() - Look up an ACPI table
1271 *
1272 * @sig: Signature of table (4 characters, upper case)
1273 * Return: pointer to table header, or NULL if not found
1274 */
1275struct acpi_table_header *acpi_find_table(const char *sig);
1276
Simon Glass4969d212020-04-08 16:57:37 -06001277#endif /* !__ACPI__*/
1278
Simon Glass858fed12020-04-08 16:57:36 -06001279#include <asm/acpi_table.h>
1280
1281#endif /* __ACPI_TABLE_H__ */