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git01.mediatek.com / filogic / uboot / 4969d21d8974a6564634d3ce44f230e56ae763d9 / . / include / acpi / acpi_table.h
blob: dd7489581366c340d1bd5235acc4299cbc9722b1 [file] [log] [blame]
Simon Glass858fed12020-04-08 16:57:36 -0600[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Helpers for ACPI table generation
4 *
5 * Based on acpi.c from coreboot
6 *
7 * Copyright 2019 Google LLC
8 *
9 * Copyright (C) 2015, Saket Sinha <saket.sinha89@gmail.com>
10 * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
11 */
12
13#ifndef __ACPI_TABLE_H__
14#define __ACPI_TABLE_H__
15
16#define RSDP_SIG "RSD PTR " /* RSDP pointer signature */
17#define OEM_ID "U-BOOT" /* U-Boot */
18#define OEM_TABLE_ID "U-BOOTBL" /* U-Boot Table */
19#define ASLC_ID "INTL" /* Intel ASL Compiler */
20
21#define ACPI_RSDP_REV_ACPI_1_0 0
22#define ACPI_RSDP_REV_ACPI_2_0 2
23
Simon Glass4969d212020-04-08 16:57:37 -0600[diff] [blame^]24#if !defined(__ACPI__)
25
Simon Glass858fed12020-04-08 16:57:36 -0600[diff] [blame]26/*
27 * RSDP (Root System Description Pointer)
28 * Note: ACPI 1.0 didn't have length, xsdt_address, and ext_checksum
29 */
30struct acpi_rsdp {
31 char signature[8]; /* RSDP signature */
32 u8 checksum; /* Checksum of the first 20 bytes */
33 char oem_id[6]; /* OEM ID */
34 u8 revision; /* 0 for ACPI 1.0, others 2 */
35 u32 rsdt_address; /* Physical address of RSDT (32 bits) */
36 u32 length; /* Total RSDP length (incl. extended part) */
37 u64 xsdt_address; /* Physical address of XSDT (64 bits) */
38 u8 ext_checksum; /* Checksum of the whole table */
39 u8 reserved[3];
40};
41
42/* Generic ACPI header, provided by (almost) all tables */
43struct __packed acpi_table_header {
44 char signature[4]; /* ACPI signature (4 ASCII characters) */
45 u32 length; /* Table length in bytes (incl. header) */
46 u8 revision; /* Table version (not ACPI version!) */
47 volatile u8 checksum; /* To make sum of entire table == 0 */
48 char oem_id[6]; /* OEM identification */
49 char oem_table_id[8]; /* OEM table identification */
50 u32 oem_revision; /* OEM revision number */
51 char aslc_id[4]; /* ASL compiler vendor ID */
52 u32 aslc_revision; /* ASL compiler revision number */
53};
54
55/* A maximum number of 32 ACPI tables ought to be enough for now */
56#define MAX_ACPI_TABLES 32
57
58/* RSDT (Root System Description Table) */
59struct acpi_rsdt {
60 struct acpi_table_header header;
61 u32 entry[MAX_ACPI_TABLES];
62};
63
64/* XSDT (Extended System Description Table) */
65struct acpi_xsdt {
66 struct acpi_table_header header;
67 u64 entry[MAX_ACPI_TABLES];
68};
69
70/* FADT Preferred Power Management Profile */
71enum acpi_pm_profile {
72 ACPI_PM_UNSPECIFIED = 0,
73 ACPI_PM_DESKTOP,
74 ACPI_PM_MOBILE,
75 ACPI_PM_WORKSTATION,
76 ACPI_PM_ENTERPRISE_SERVER,
77 ACPI_PM_SOHO_SERVER,
78 ACPI_PM_APPLIANCE_PC,
79 ACPI_PM_PERFORMANCE_SERVER,
80 ACPI_PM_TABLET
81};
82
83/* FADT flags for p_lvl2_lat and p_lvl3_lat */
84#define ACPI_FADT_C2_NOT_SUPPORTED 101
85#define ACPI_FADT_C3_NOT_SUPPORTED 1001
86
87/* FADT Boot Architecture Flags */
88#define ACPI_FADT_LEGACY_FREE 0x00
89#define ACPI_FADT_LEGACY_DEVICES BIT(0)
90#define ACPI_FADT_8042 BIT(1)
91#define ACPI_FADT_VGA_NOT_PRESENT BIT(2)
92#define ACPI_FADT_MSI_NOT_SUPPORTED BIT(3)
93#define ACPI_FADT_NO_PCIE_ASPM_CONTROL BIT(4)
94
95/* FADT Feature Flags */
96#define ACPI_FADT_WBINVD BIT(0)
97#define ACPI_FADT_WBINVD_FLUSH BIT(1)
98#define ACPI_FADT_C1_SUPPORTED BIT(2)
99#define ACPI_FADT_C2_MP_SUPPORTED BIT(3)
100#define ACPI_FADT_POWER_BUTTON BIT(4)
101#define ACPI_FADT_SLEEP_BUTTON BIT(5)
102#define ACPI_FADT_FIXED_RTC BIT(6)
103#define ACPI_FADT_S4_RTC_WAKE BIT(7)
104#define ACPI_FADT_32BIT_TIMER BIT(8)
105#define ACPI_FADT_DOCKING_SUPPORTED BIT(9)
106#define ACPI_FADT_RESET_REGISTER BIT(10)
107#define ACPI_FADT_SEALED_CASE BIT(11)
108#define ACPI_FADT_HEADLESS BIT(12)
109#define ACPI_FADT_SLEEP_TYPE BIT(13)
110#define ACPI_FADT_PCI_EXPRESS_WAKE BIT(14)
111#define ACPI_FADT_PLATFORM_CLOCK BIT(15)
112#define ACPI_FADT_S4_RTC_VALID BIT(16)
113#define ACPI_FADT_REMOTE_POWER_ON BIT(17)
114#define ACPI_FADT_APIC_CLUSTER BIT(18)
115#define ACPI_FADT_APIC_PHYSICAL BIT(19)
116#define ACPI_FADT_HW_REDUCED_ACPI BIT(20)
117#define ACPI_FADT_LOW_PWR_IDLE_S0 BIT(21)
118
119enum acpi_address_space_type {
120 ACPI_ADDRESS_SPACE_MEMORY = 0, /* System memory */
121 ACPI_ADDRESS_SPACE_IO, /* System I/O */
122 ACPI_ADDRESS_SPACE_PCI, /* PCI config space */
123 ACPI_ADDRESS_SPACE_EC, /* Embedded controller */
124 ACPI_ADDRESS_SPACE_SMBUS, /* SMBus */
125 ACPI_ADDRESS_SPACE_PCC = 0x0a, /* Platform Comm. Channel */
126 ACPI_ADDRESS_SPACE_FIXED = 0x7f /* Functional fixed hardware */
127};
128
129enum acpi_address_space_size {
130 ACPI_ACCESS_SIZE_UNDEFINED = 0,
131 ACPI_ACCESS_SIZE_BYTE_ACCESS,
132 ACPI_ACCESS_SIZE_WORD_ACCESS,
133 ACPI_ACCESS_SIZE_DWORD_ACCESS,
134 ACPI_ACCESS_SIZE_QWORD_ACCESS
135};
136
137struct acpi_gen_regaddr {
138 u8 space_id; /* Address space ID */
139 u8 bit_width; /* Register size in bits */
140 u8 bit_offset; /* Register bit offset */
141 u8 access_size; /* Access size */
142 u32 addrl; /* Register address, low 32 bits */
143 u32 addrh; /* Register address, high 32 bits */
144};
145
146/* FADT (Fixed ACPI Description Table) */
147struct __packed acpi_fadt {
148 struct acpi_table_header header;
149 u32 firmware_ctrl;
150 u32 dsdt;
151 u8 res1;
152 u8 preferred_pm_profile;
153 u16 sci_int;
154 u32 smi_cmd;
155 u8 acpi_enable;
156 u8 acpi_disable;
157 u8 s4bios_req;
158 u8 pstate_cnt;
159 u32 pm1a_evt_blk;
160 u32 pm1b_evt_blk;
161 u32 pm1a_cnt_blk;
162 u32 pm1b_cnt_blk;
163 u32 pm2_cnt_blk;
164 u32 pm_tmr_blk;
165 u32 gpe0_blk;
166 u32 gpe1_blk;
167 u8 pm1_evt_len;
168 u8 pm1_cnt_len;
169 u8 pm2_cnt_len;
170 u8 pm_tmr_len;
171 u8 gpe0_blk_len;
172 u8 gpe1_blk_len;
173 u8 gpe1_base;
174 u8 cst_cnt;
175 u16 p_lvl2_lat;
176 u16 p_lvl3_lat;
177 u16 flush_size;
178 u16 flush_stride;
179 u8 duty_offset;
180 u8 duty_width;
181 u8 day_alrm;
182 u8 mon_alrm;
183 u8 century;
184 u16 iapc_boot_arch;
185 u8 res2;
186 u32 flags;
187 struct acpi_gen_regaddr reset_reg;
188 u8 reset_value;
189 u16 arm_boot_arch;
190 u8 minor_revision;
191 u32 x_firmware_ctl_l;
192 u32 x_firmware_ctl_h;
193 u32 x_dsdt_l;
194 u32 x_dsdt_h;
195 struct acpi_gen_regaddr x_pm1a_evt_blk;
196 struct acpi_gen_regaddr x_pm1b_evt_blk;
197 struct acpi_gen_regaddr x_pm1a_cnt_blk;
198 struct acpi_gen_regaddr x_pm1b_cnt_blk;
199 struct acpi_gen_regaddr x_pm2_cnt_blk;
200 struct acpi_gen_regaddr x_pm_tmr_blk;
201 struct acpi_gen_regaddr x_gpe0_blk;
202 struct acpi_gen_regaddr x_gpe1_blk;
203};
204
205/* FACS flags */
206#define ACPI_FACS_S4BIOS_F BIT(0)
207#define ACPI_FACS_64BIT_WAKE_F BIT(1)
208
209/* FACS (Firmware ACPI Control Structure) */
210struct acpi_facs {
211 char signature[4]; /* "FACS" */
212 u32 length; /* Length in bytes (>= 64) */
213 u32 hardware_signature; /* Hardware signature */
214 u32 firmware_waking_vector; /* Firmware waking vector */
215 u32 global_lock; /* Global lock */
216 u32 flags; /* FACS flags */
217 u32 x_firmware_waking_vector_l; /* X FW waking vector, low */
218 u32 x_firmware_waking_vector_h; /* X FW waking vector, high */
219 u8 version; /* Version 2 */
220 u8 res1[3];
221 u32 ospm_flags; /* OSPM enabled flags */
222 u8 res2[24];
223};
224
225/* MADT flags */
226#define ACPI_MADT_PCAT_COMPAT BIT(0)
227
228/* MADT (Multiple APIC Description Table) */
229struct acpi_madt {
230 struct acpi_table_header header;
231 u32 lapic_addr; /* Local APIC address */
232 u32 flags; /* Multiple APIC flags */
233};
234
235/* MADT: APIC Structure Type*/
236enum acpi_apic_types {
237 ACPI_APIC_LAPIC = 0, /* Processor local APIC */
238 ACPI_APIC_IOAPIC, /* I/O APIC */
239 ACPI_APIC_IRQ_SRC_OVERRIDE, /* Interrupt source override */
240 ACPI_APIC_NMI_SRC, /* NMI source */
241 ACPI_APIC_LAPIC_NMI, /* Local APIC NMI */
242 ACPI_APIC_LAPIC_ADDR_OVERRIDE, /* Local APIC address override */
243 ACPI_APIC_IOSAPIC, /* I/O SAPIC */
244 ACPI_APIC_LSAPIC, /* Local SAPIC */
245 ACPI_APIC_PLATFORM_IRQ_SRC, /* Platform interrupt sources */
246 ACPI_APIC_LX2APIC, /* Processor local x2APIC */
247 ACPI_APIC_LX2APIC_NMI, /* Local x2APIC NMI */
248};
249
250/* MADT: Processor Local APIC Structure */
251
252#define LOCAL_APIC_FLAG_ENABLED BIT(0)
253
254struct acpi_madt_lapic {
255 u8 type; /* Type (0) */
256 u8 length; /* Length in bytes (8) */
257 u8 processor_id; /* ACPI processor ID */
258 u8 apic_id; /* Local APIC ID */
259 u32 flags; /* Local APIC flags */
260};
261
262/* MADT: I/O APIC Structure */
263struct acpi_madt_ioapic {
264 u8 type; /* Type (1) */
265 u8 length; /* Length in bytes (12) */
266 u8 ioapic_id; /* I/O APIC ID */
267 u8 reserved;
268 u32 ioapic_addr; /* I/O APIC address */
269 u32 gsi_base; /* Global system interrupt base */
270};
271
272/* MADT: Interrupt Source Override Structure */
273struct __packed acpi_madt_irqoverride {
274 u8 type; /* Type (2) */
275 u8 length; /* Length in bytes (10) */
276 u8 bus; /* ISA (0) */
277 u8 source; /* Bus-relative int. source (IRQ) */
278 u32 gsirq; /* Global system interrupt */
279 u16 flags; /* MPS INTI flags */
280};
281
282/* MADT: Local APIC NMI Structure */
283struct __packed acpi_madt_lapic_nmi {
284 u8 type; /* Type (4) */
285 u8 length; /* Length in bytes (6) */
286 u8 processor_id; /* ACPI processor ID */
287 u16 flags; /* MPS INTI flags */
288 u8 lint; /* Local APIC LINT# */
289};
290
291/* MCFG (PCI Express MMIO config space BAR description table) */
292struct acpi_mcfg {
293 struct acpi_table_header header;
294 u8 reserved[8];
295};
296
297struct acpi_mcfg_mmconfig {
298 u32 base_address_l;
299 u32 base_address_h;
300 u16 pci_segment_group_number;
301 u8 start_bus_number;
302 u8 end_bus_number;
303 u8 reserved[4];
304};
305
306/* PM1_CNT bit defines */
307#define PM1_CNT_SCI_EN BIT(0)
308
309/* ACPI global NVS structure */
310struct acpi_global_nvs;
311
312/* CSRT (Core System Resource Table) */
313struct acpi_csrt {
314 struct acpi_table_header header;
315};
316
317struct acpi_csrt_group {
318 u32 length;
319 u32 vendor_id;
320 u32 subvendor_id;
321 u16 device_id;
322 u16 subdevice_id;
323 u16 revision;
324 u16 reserved;
325 u32 shared_info_length;
326};
327
328struct acpi_csrt_shared_info {
329 u16 major_version;
330 u16 minor_version;
331 u32 mmio_base_low;
332 u32 mmio_base_high;
333 u32 gsi_interrupt;
334 u8 interrupt_polarity;
335 u8 interrupt_mode;
336 u8 num_channels;
337 u8 dma_address_width;
338 u16 base_request_line;
339 u16 num_handshake_signals;
340 u32 max_block_size;
341};
342
343/* DBG2 definitions are partially used for SPCR interface_type */
344
345/* Types for port_type field */
346
347#define ACPI_DBG2_SERIAL_PORT 0x8000
348#define ACPI_DBG2_1394_PORT 0x8001
349#define ACPI_DBG2_USB_PORT 0x8002
350#define ACPI_DBG2_NET_PORT 0x8003
351
352/* Subtypes for port_subtype field */
353
354#define ACPI_DBG2_16550_COMPATIBLE 0x0000
355#define ACPI_DBG2_16550_SUBSET 0x0001
356#define ACPI_DBG2_ARM_PL011 0x0003
357#define ACPI_DBG2_ARM_SBSA_32BIT 0x000D
358#define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E
359#define ACPI_DBG2_ARM_DCC 0x000F
360#define ACPI_DBG2_BCM2835 0x0010
361
362#define ACPI_DBG2_1394_STANDARD 0x0000
363
364#define ACPI_DBG2_USB_XHCI 0x0000
365#define ACPI_DBG2_USB_EHCI 0x0001
366
367#define ACPI_DBG2_UNKNOWN 0x00FF
368
369/* SPCR (Serial Port Console Redirection table) */
370struct __packed acpi_spcr {
371 struct acpi_table_header header;
372 u8 interface_type;
373 u8 reserved[3];
374 struct acpi_gen_regaddr serial_port;
375 u8 interrupt_type;
376 u8 pc_interrupt;
377 u32 interrupt; /* Global system interrupt */
378 u8 baud_rate;
379 u8 parity;
380 u8 stop_bits;
381 u8 flow_control;
382 u8 terminal_type;
383 u8 reserved1;
384 u16 pci_device_id; /* Must be 0xffff if not PCI device */
385 u16 pci_vendor_id; /* Must be 0xffff if not PCI device */
386 u8 pci_bus;
387 u8 pci_device;
388 u8 pci_function;
389 u32 pci_flags;
390 u8 pci_segment;
391 u32 reserved2;
392};
393
Simon Glass4969d212020-04-08 16:57:37 -0600[diff] [blame^]394#endif /* !__ACPI__*/
395
Simon Glass858fed12020-04-08 16:57:36 -0600[diff] [blame]396#include <asm/acpi_table.h>
397
398#endif /* __ACPI_TABLE_H__ */