blob: a2bd929c920c299113e86e2b33c3a5e672e5f88d [file] [log] [blame]
Simon Glass858fed12020-04-08 16:57:36 -06001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Helpers for ACPI table generation
4 *
5 * Based on acpi.c from coreboot
6 *
7 * Copyright 2019 Google LLC
8 *
9 * Copyright (C) 2015, Saket Sinha <saket.sinha89@gmail.com>
10 * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
11 */
12
13#ifndef __ACPI_TABLE_H__
14#define __ACPI_TABLE_H__
15
16#define RSDP_SIG "RSD PTR " /* RSDP pointer signature */
17#define OEM_ID "U-BOOT" /* U-Boot */
18#define OEM_TABLE_ID "U-BOOTBL" /* U-Boot Table */
19#define ASLC_ID "INTL" /* Intel ASL Compiler */
20
21#define ACPI_RSDP_REV_ACPI_1_0 0
22#define ACPI_RSDP_REV_ACPI_2_0 2
23
Simon Glass4969d212020-04-08 16:57:37 -060024#if !defined(__ACPI__)
25
Simon Glass858fed12020-04-08 16:57:36 -060026/*
27 * RSDP (Root System Description Pointer)
28 * Note: ACPI 1.0 didn't have length, xsdt_address, and ext_checksum
29 */
30struct acpi_rsdp {
31 char signature[8]; /* RSDP signature */
32 u8 checksum; /* Checksum of the first 20 bytes */
33 char oem_id[6]; /* OEM ID */
34 u8 revision; /* 0 for ACPI 1.0, others 2 */
35 u32 rsdt_address; /* Physical address of RSDT (32 bits) */
36 u32 length; /* Total RSDP length (incl. extended part) */
37 u64 xsdt_address; /* Physical address of XSDT (64 bits) */
38 u8 ext_checksum; /* Checksum of the whole table */
39 u8 reserved[3];
40};
41
42/* Generic ACPI header, provided by (almost) all tables */
43struct __packed acpi_table_header {
44 char signature[4]; /* ACPI signature (4 ASCII characters) */
45 u32 length; /* Table length in bytes (incl. header) */
46 u8 revision; /* Table version (not ACPI version!) */
47 volatile u8 checksum; /* To make sum of entire table == 0 */
48 char oem_id[6]; /* OEM identification */
49 char oem_table_id[8]; /* OEM table identification */
50 u32 oem_revision; /* OEM revision number */
51 char aslc_id[4]; /* ASL compiler vendor ID */
52 u32 aslc_revision; /* ASL compiler revision number */
53};
54
55/* A maximum number of 32 ACPI tables ought to be enough for now */
56#define MAX_ACPI_TABLES 32
57
58/* RSDT (Root System Description Table) */
59struct acpi_rsdt {
60 struct acpi_table_header header;
61 u32 entry[MAX_ACPI_TABLES];
62};
63
64/* XSDT (Extended System Description Table) */
65struct acpi_xsdt {
66 struct acpi_table_header header;
67 u64 entry[MAX_ACPI_TABLES];
68};
69
70/* FADT Preferred Power Management Profile */
71enum acpi_pm_profile {
72 ACPI_PM_UNSPECIFIED = 0,
73 ACPI_PM_DESKTOP,
74 ACPI_PM_MOBILE,
75 ACPI_PM_WORKSTATION,
76 ACPI_PM_ENTERPRISE_SERVER,
77 ACPI_PM_SOHO_SERVER,
78 ACPI_PM_APPLIANCE_PC,
79 ACPI_PM_PERFORMANCE_SERVER,
80 ACPI_PM_TABLET
81};
82
83/* FADT flags for p_lvl2_lat and p_lvl3_lat */
84#define ACPI_FADT_C2_NOT_SUPPORTED 101
85#define ACPI_FADT_C3_NOT_SUPPORTED 1001
86
87/* FADT Boot Architecture Flags */
88#define ACPI_FADT_LEGACY_FREE 0x00
89#define ACPI_FADT_LEGACY_DEVICES BIT(0)
90#define ACPI_FADT_8042 BIT(1)
91#define ACPI_FADT_VGA_NOT_PRESENT BIT(2)
92#define ACPI_FADT_MSI_NOT_SUPPORTED BIT(3)
93#define ACPI_FADT_NO_PCIE_ASPM_CONTROL BIT(4)
94
95/* FADT Feature Flags */
96#define ACPI_FADT_WBINVD BIT(0)
97#define ACPI_FADT_WBINVD_FLUSH BIT(1)
98#define ACPI_FADT_C1_SUPPORTED BIT(2)
99#define ACPI_FADT_C2_MP_SUPPORTED BIT(3)
100#define ACPI_FADT_POWER_BUTTON BIT(4)
101#define ACPI_FADT_SLEEP_BUTTON BIT(5)
102#define ACPI_FADT_FIXED_RTC BIT(6)
103#define ACPI_FADT_S4_RTC_WAKE BIT(7)
104#define ACPI_FADT_32BIT_TIMER BIT(8)
105#define ACPI_FADT_DOCKING_SUPPORTED BIT(9)
106#define ACPI_FADT_RESET_REGISTER BIT(10)
107#define ACPI_FADT_SEALED_CASE BIT(11)
108#define ACPI_FADT_HEADLESS BIT(12)
109#define ACPI_FADT_SLEEP_TYPE BIT(13)
110#define ACPI_FADT_PCI_EXPRESS_WAKE BIT(14)
111#define ACPI_FADT_PLATFORM_CLOCK BIT(15)
112#define ACPI_FADT_S4_RTC_VALID BIT(16)
113#define ACPI_FADT_REMOTE_POWER_ON BIT(17)
114#define ACPI_FADT_APIC_CLUSTER BIT(18)
115#define ACPI_FADT_APIC_PHYSICAL BIT(19)
116#define ACPI_FADT_HW_REDUCED_ACPI BIT(20)
117#define ACPI_FADT_LOW_PWR_IDLE_S0 BIT(21)
118
119enum acpi_address_space_type {
120 ACPI_ADDRESS_SPACE_MEMORY = 0, /* System memory */
121 ACPI_ADDRESS_SPACE_IO, /* System I/O */
122 ACPI_ADDRESS_SPACE_PCI, /* PCI config space */
123 ACPI_ADDRESS_SPACE_EC, /* Embedded controller */
124 ACPI_ADDRESS_SPACE_SMBUS, /* SMBus */
125 ACPI_ADDRESS_SPACE_PCC = 0x0a, /* Platform Comm. Channel */
126 ACPI_ADDRESS_SPACE_FIXED = 0x7f /* Functional fixed hardware */
127};
128
129enum acpi_address_space_size {
130 ACPI_ACCESS_SIZE_UNDEFINED = 0,
131 ACPI_ACCESS_SIZE_BYTE_ACCESS,
132 ACPI_ACCESS_SIZE_WORD_ACCESS,
133 ACPI_ACCESS_SIZE_DWORD_ACCESS,
134 ACPI_ACCESS_SIZE_QWORD_ACCESS
135};
136
137struct acpi_gen_regaddr {
138 u8 space_id; /* Address space ID */
139 u8 bit_width; /* Register size in bits */
140 u8 bit_offset; /* Register bit offset */
141 u8 access_size; /* Access size */
142 u32 addrl; /* Register address, low 32 bits */
143 u32 addrh; /* Register address, high 32 bits */
144};
145
146/* FADT (Fixed ACPI Description Table) */
147struct __packed acpi_fadt {
148 struct acpi_table_header header;
149 u32 firmware_ctrl;
150 u32 dsdt;
151 u8 res1;
152 u8 preferred_pm_profile;
153 u16 sci_int;
154 u32 smi_cmd;
155 u8 acpi_enable;
156 u8 acpi_disable;
157 u8 s4bios_req;
158 u8 pstate_cnt;
159 u32 pm1a_evt_blk;
160 u32 pm1b_evt_blk;
161 u32 pm1a_cnt_blk;
162 u32 pm1b_cnt_blk;
163 u32 pm2_cnt_blk;
164 u32 pm_tmr_blk;
165 u32 gpe0_blk;
166 u32 gpe1_blk;
167 u8 pm1_evt_len;
168 u8 pm1_cnt_len;
169 u8 pm2_cnt_len;
170 u8 pm_tmr_len;
171 u8 gpe0_blk_len;
172 u8 gpe1_blk_len;
173 u8 gpe1_base;
174 u8 cst_cnt;
175 u16 p_lvl2_lat;
176 u16 p_lvl3_lat;
177 u16 flush_size;
178 u16 flush_stride;
179 u8 duty_offset;
180 u8 duty_width;
181 u8 day_alrm;
182 u8 mon_alrm;
183 u8 century;
184 u16 iapc_boot_arch;
185 u8 res2;
186 u32 flags;
187 struct acpi_gen_regaddr reset_reg;
188 u8 reset_value;
189 u16 arm_boot_arch;
190 u8 minor_revision;
191 u32 x_firmware_ctl_l;
192 u32 x_firmware_ctl_h;
193 u32 x_dsdt_l;
194 u32 x_dsdt_h;
195 struct acpi_gen_regaddr x_pm1a_evt_blk;
196 struct acpi_gen_regaddr x_pm1b_evt_blk;
197 struct acpi_gen_regaddr x_pm1a_cnt_blk;
198 struct acpi_gen_regaddr x_pm1b_cnt_blk;
199 struct acpi_gen_regaddr x_pm2_cnt_blk;
200 struct acpi_gen_regaddr x_pm_tmr_blk;
201 struct acpi_gen_regaddr x_gpe0_blk;
202 struct acpi_gen_regaddr x_gpe1_blk;
203};
204
Simon Glassb2672ea2020-04-08 16:57:38 -0600205/* FADT TABLE Revision values - note these do not match the ACPI revision */
206#define ACPI_FADT_REV_ACPI_1_0 1
207#define ACPI_FADT_REV_ACPI_2_0 3
208#define ACPI_FADT_REV_ACPI_3_0 4
209#define ACPI_FADT_REV_ACPI_4_0 4
210#define ACPI_FADT_REV_ACPI_5_0 5
211#define ACPI_FADT_REV_ACPI_6_0 6
212
213/* MADT TABLE Revision values - note these do not match the ACPI revision */
214#define ACPI_MADT_REV_ACPI_3_0 2
215#define ACPI_MADT_REV_ACPI_4_0 3
216#define ACPI_MADT_REV_ACPI_5_0 3
217#define ACPI_MADT_REV_ACPI_6_0 5
218
219#define ACPI_MCFG_REV_ACPI_3_0 1
220
221/* IVRS Revision Field */
222#define IVRS_FORMAT_FIXED 0x01 /* Type 10h & 11h only */
223#define IVRS_FORMAT_MIXED 0x02 /* Type 10h, 11h, & 40h */
224
Simon Glass858fed12020-04-08 16:57:36 -0600225/* FACS flags */
226#define ACPI_FACS_S4BIOS_F BIT(0)
227#define ACPI_FACS_64BIT_WAKE_F BIT(1)
228
229/* FACS (Firmware ACPI Control Structure) */
230struct acpi_facs {
231 char signature[4]; /* "FACS" */
232 u32 length; /* Length in bytes (>= 64) */
233 u32 hardware_signature; /* Hardware signature */
234 u32 firmware_waking_vector; /* Firmware waking vector */
235 u32 global_lock; /* Global lock */
236 u32 flags; /* FACS flags */
237 u32 x_firmware_waking_vector_l; /* X FW waking vector, low */
238 u32 x_firmware_waking_vector_h; /* X FW waking vector, high */
239 u8 version; /* Version 2 */
240 u8 res1[3];
241 u32 ospm_flags; /* OSPM enabled flags */
242 u8 res2[24];
243};
244
245/* MADT flags */
246#define ACPI_MADT_PCAT_COMPAT BIT(0)
247
248/* MADT (Multiple APIC Description Table) */
249struct acpi_madt {
250 struct acpi_table_header header;
251 u32 lapic_addr; /* Local APIC address */
252 u32 flags; /* Multiple APIC flags */
253};
254
255/* MADT: APIC Structure Type*/
256enum acpi_apic_types {
257 ACPI_APIC_LAPIC = 0, /* Processor local APIC */
258 ACPI_APIC_IOAPIC, /* I/O APIC */
259 ACPI_APIC_IRQ_SRC_OVERRIDE, /* Interrupt source override */
260 ACPI_APIC_NMI_SRC, /* NMI source */
261 ACPI_APIC_LAPIC_NMI, /* Local APIC NMI */
262 ACPI_APIC_LAPIC_ADDR_OVERRIDE, /* Local APIC address override */
263 ACPI_APIC_IOSAPIC, /* I/O SAPIC */
264 ACPI_APIC_LSAPIC, /* Local SAPIC */
265 ACPI_APIC_PLATFORM_IRQ_SRC, /* Platform interrupt sources */
266 ACPI_APIC_LX2APIC, /* Processor local x2APIC */
267 ACPI_APIC_LX2APIC_NMI, /* Local x2APIC NMI */
268};
269
270/* MADT: Processor Local APIC Structure */
271
272#define LOCAL_APIC_FLAG_ENABLED BIT(0)
273
274struct acpi_madt_lapic {
275 u8 type; /* Type (0) */
276 u8 length; /* Length in bytes (8) */
277 u8 processor_id; /* ACPI processor ID */
278 u8 apic_id; /* Local APIC ID */
279 u32 flags; /* Local APIC flags */
280};
281
282/* MADT: I/O APIC Structure */
283struct acpi_madt_ioapic {
284 u8 type; /* Type (1) */
285 u8 length; /* Length in bytes (12) */
286 u8 ioapic_id; /* I/O APIC ID */
287 u8 reserved;
288 u32 ioapic_addr; /* I/O APIC address */
289 u32 gsi_base; /* Global system interrupt base */
290};
291
292/* MADT: Interrupt Source Override Structure */
293struct __packed acpi_madt_irqoverride {
294 u8 type; /* Type (2) */
295 u8 length; /* Length in bytes (10) */
296 u8 bus; /* ISA (0) */
297 u8 source; /* Bus-relative int. source (IRQ) */
298 u32 gsirq; /* Global system interrupt */
299 u16 flags; /* MPS INTI flags */
300};
301
302/* MADT: Local APIC NMI Structure */
303struct __packed acpi_madt_lapic_nmi {
304 u8 type; /* Type (4) */
305 u8 length; /* Length in bytes (6) */
306 u8 processor_id; /* ACPI processor ID */
307 u16 flags; /* MPS INTI flags */
308 u8 lint; /* Local APIC LINT# */
309};
310
311/* MCFG (PCI Express MMIO config space BAR description table) */
312struct acpi_mcfg {
313 struct acpi_table_header header;
314 u8 reserved[8];
315};
316
317struct acpi_mcfg_mmconfig {
318 u32 base_address_l;
319 u32 base_address_h;
320 u16 pci_segment_group_number;
321 u8 start_bus_number;
322 u8 end_bus_number;
323 u8 reserved[4];
324};
325
326/* PM1_CNT bit defines */
327#define PM1_CNT_SCI_EN BIT(0)
328
329/* ACPI global NVS structure */
330struct acpi_global_nvs;
331
332/* CSRT (Core System Resource Table) */
333struct acpi_csrt {
334 struct acpi_table_header header;
335};
336
337struct acpi_csrt_group {
338 u32 length;
339 u32 vendor_id;
340 u32 subvendor_id;
341 u16 device_id;
342 u16 subdevice_id;
343 u16 revision;
344 u16 reserved;
345 u32 shared_info_length;
346};
347
348struct acpi_csrt_shared_info {
349 u16 major_version;
350 u16 minor_version;
351 u32 mmio_base_low;
352 u32 mmio_base_high;
353 u32 gsi_interrupt;
354 u8 interrupt_polarity;
355 u8 interrupt_mode;
356 u8 num_channels;
357 u8 dma_address_width;
358 u16 base_request_line;
359 u16 num_handshake_signals;
360 u32 max_block_size;
361};
362
Simon Glasse9629892020-04-08 16:57:39 -0600363enum dmar_type {
364 DMAR_DRHD = 0,
365 DMAR_RMRR = 1,
366 DMAR_ATSR = 2,
367 DMAR_RHSA = 3,
368 DMAR_ANDD = 4
369};
370
371enum {
372 DRHD_INCLUDE_PCI_ALL = BIT(0)
373};
374
375enum dmar_flags {
376 DMAR_INTR_REMAP = BIT(0),
377 DMAR_X2APIC_OPT_OUT = BIT(1),
378 DMAR_CTRL_PLATFORM_OPT_IN_FLAG = BIT(2),
379};
380
381struct dmar_entry {
382 u16 type;
383 u16 length;
384 u8 flags;
385 u8 reserved;
386 u16 segment;
387 u64 bar;
388};
389
390struct dmar_rmrr_entry {
391 u16 type;
392 u16 length;
393 u16 reserved;
394 u16 segment;
395 u64 bar;
396 u64 limit;
397};
398
399/* DMAR (DMA Remapping Reporting Structure) */
400struct __packed acpi_dmar {
401 struct acpi_table_header header;
402 u8 host_address_width;
403 u8 flags;
404 u8 reserved[10];
405 struct dmar_entry structure[0];
406};
407
Simon Glass858fed12020-04-08 16:57:36 -0600408/* DBG2 definitions are partially used for SPCR interface_type */
409
410/* Types for port_type field */
411
412#define ACPI_DBG2_SERIAL_PORT 0x8000
413#define ACPI_DBG2_1394_PORT 0x8001
414#define ACPI_DBG2_USB_PORT 0x8002
415#define ACPI_DBG2_NET_PORT 0x8003
416
417/* Subtypes for port_subtype field */
418
419#define ACPI_DBG2_16550_COMPATIBLE 0x0000
420#define ACPI_DBG2_16550_SUBSET 0x0001
421#define ACPI_DBG2_ARM_PL011 0x0003
422#define ACPI_DBG2_ARM_SBSA_32BIT 0x000D
423#define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E
424#define ACPI_DBG2_ARM_DCC 0x000F
425#define ACPI_DBG2_BCM2835 0x0010
426
427#define ACPI_DBG2_1394_STANDARD 0x0000
428
429#define ACPI_DBG2_USB_XHCI 0x0000
430#define ACPI_DBG2_USB_EHCI 0x0001
431
432#define ACPI_DBG2_UNKNOWN 0x00FF
433
434/* SPCR (Serial Port Console Redirection table) */
435struct __packed acpi_spcr {
436 struct acpi_table_header header;
437 u8 interface_type;
438 u8 reserved[3];
439 struct acpi_gen_regaddr serial_port;
440 u8 interrupt_type;
441 u8 pc_interrupt;
442 u32 interrupt; /* Global system interrupt */
443 u8 baud_rate;
444 u8 parity;
445 u8 stop_bits;
446 u8 flow_control;
447 u8 terminal_type;
448 u8 reserved1;
449 u16 pci_device_id; /* Must be 0xffff if not PCI device */
450 u16 pci_vendor_id; /* Must be 0xffff if not PCI device */
451 u8 pci_bus;
452 u8 pci_device;
453 u8 pci_function;
454 u32 pci_flags;
455 u8 pci_segment;
456 u32 reserved2;
457};
458
Simon Glassb2672ea2020-04-08 16:57:38 -0600459/* Tables defined/reserved by ACPI and generated by U-Boot */
460enum acpi_tables {
461 ACPITAB_BERT,
462 ACPITAB_DBG2,
463 ACPITAB_DMAR,
464 ACPITAB_DSDT,
465 ACPITAB_ECDT,
466 ACPITAB_FACS,
467 ACPITAB_FADT,
468 ACPITAB_HEST,
469 ACPITAB_HPET,
470 ACPITAB_IVRS,
471 ACPITAB_MADT,
472 ACPITAB_MCFG,
473 ACPITAB_NHLT,
474 ACPITAB_RSDP,
475 ACPITAB_RSDT,
476 ACPITAB_SLIT,
477 ACPITAB_SPCR,
478 ACPITAB_SPMI,
479 ACPITAB_SRAT,
480 ACPITAB_SSDT,
481 ACPITAB_TCPA,
482 ACPITAB_TPM2,
483 ACPITAB_VFCT,
484 ACPITAB_XSDT,
485
486 ACPITAB_COUNT,
487};
488
489/**
490 * acpi_get_table_revision() - Get the revision number generated for a table
491 *
492 * This keeps the version-number information in one place
493 *
494 * @table: ACPI table to check
495 * @return version number that U-Boot generates
496 */
497int acpi_get_table_revision(enum acpi_tables table);
498
Simon Glasse9629892020-04-08 16:57:39 -0600499/**
500 * acpi_create_dmar() - Create a DMA Remapping Reporting (DMAR) table
501 *
502 * @dmar: Place to put the table
503 * @flags: DMAR flags to use
504 * @return 0 if OK, -ve on error
505 */
506int acpi_create_dmar(struct acpi_dmar *dmar, enum dmar_flags flags);
507
Simon Glass17968c32020-04-26 09:19:46 -0600508/**
509 * acpi_fill_header() - Set up a new table header
510 *
511 * This sets all fields except length, revision, checksum and aslc_revision
512 *
513 * @header: ACPI header to update
514 * @signature: Table signature to use (4 characters)
515 */
516void acpi_fill_header(struct acpi_table_header *header, char *signature);
517
Simon Glass4969d212020-04-08 16:57:37 -0600518#endif /* !__ACPI__*/
519
Simon Glass858fed12020-04-08 16:57:36 -0600520#include <asm/acpi_table.h>
521
522#endif /* __ACPI_TABLE_H__ */