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wdenk64519362004-07-11 17:40:54 +00001/*
wdenka5948882005-03-27 23:41:39 +00002 * (C) Copyright 2003-2005
wdenk64519362004-07-11 17:40:54 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denkc98368a2006-07-19 17:52:30 +02005 * (C) Copyright 2004-2006
wdenk64519362004-07-11 17:40:54 +00006 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
wdenk64519362004-07-11 17:40:54 +000030/*
31 * High Level Configuration Options
32 * (easy to change)
33 */
34
Wolfgang Denk99753142006-07-21 11:16:34 +020035#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
36#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
37#define CONFIG_TQM5200 1 /* ... on TQM5200 module */
38#undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
wdenk64519362004-07-11 17:40:54 +000039
Wolfgang Denk9018bc92006-08-18 23:27:33 +020040/* On a Cameron or on a FO300 board or ... */
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +020041#if !defined(CONFIG_CAM5200) && !defined(CONFIG_FO300)
Wolfgang Denk99753142006-07-21 11:16:34 +020042#define CONFIG_STK52XX 1 /* ... on a STK52XX board */
43#endif
44
45#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
wdenk64519362004-07-11 17:40:54 +000046
Wolfgang Denk99753142006-07-21 11:16:34 +020047#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
48#define BOOTFLAG_WARM 0x02 /* Software reboot */
wdenk64519362004-07-11 17:40:54 +000049
Wolfgang Denk99753142006-07-21 11:16:34 +020050#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
wdenk64519362004-07-11 17:40:54 +000051#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
Wolfgang Denk99753142006-07-21 11:16:34 +020052# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
wdenk64519362004-07-11 17:40:54 +000053#endif
54
55/*
56 * Serial console configuration
57 */
Wolfgang Denk99753142006-07-21 11:16:34 +020058#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
59#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
wdenk64519362004-07-11 17:40:54 +000060#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
61
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +020062#ifdef CONFIG_FO300
63#define CFG_DEVICE_NULLDEV 1 /* enable null device */
64#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
65#define CONFIG_BOARD_EARLY_INIT_F 1 /* used to detect S1 switch position */
Bartlomiej Sieka9d47ad42006-08-22 10:38:18 +020066#define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +020067#if 0
68#define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
69 /* switch is closed */
70#endif
71
72#undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
73 /* switch is open */
Wolfgang Denk9018bc92006-08-18 23:27:33 +020074#endif /* CONFIG_FO300 */
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +020075
wdenkdc130442004-12-12 22:06:17 +000076#ifdef CONFIG_STK52XX
77#define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
78#define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
79#define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
80#define CONFIG_PS2MULT_DELAY (CFG_HZ/2) /* Initial delay */
81#define CONFIG_BOARD_EARLY_INIT_R
82#endif /* CONFIG_STK52XX */
wdenk64519362004-07-11 17:40:54 +000083
wdenk64519362004-07-11 17:40:54 +000084/*
85 * PCI Mapping:
86 * 0x40000000 - 0x4fffffff - PCI Memory
87 * 0x50000000 - 0x50ffffff - PCI IO Space
88 */
wdenkdc130442004-12-12 22:06:17 +000089#ifdef CONFIG_STK52XX
90#define CONFIG_PCI 1
wdenk64519362004-07-11 17:40:54 +000091#define CONFIG_PCI_PNP 1
wdenk79cf7572004-08-28 21:09:14 +000092/* #define CONFIG_PCI_SCAN_SHOW 1 */
wdenk64519362004-07-11 17:40:54 +000093
94#define CONFIG_PCI_MEM_BUS 0x40000000
95#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
96#define CONFIG_PCI_MEM_SIZE 0x10000000
97
98#define CONFIG_PCI_IO_BUS 0x50000000
99#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
100#define CONFIG_PCI_IO_SIZE 0x01000000
101
102#define CONFIG_NET_MULTI 1
Wolfgang Denk3f2f9dd2006-06-16 16:11:34 +0200103#define CONFIG_EEPRO100 1
wdenk64519362004-07-11 17:40:54 +0000104#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
105#define CONFIG_NS8382X 1
wdenk61c636e2005-03-31 18:42:15 +0000106#endif /* CONFIG_STK52XX */
wdenk64519362004-07-11 17:40:54 +0000107
wdenka5948882005-03-27 23:41:39 +0000108#ifdef CONFIG_PCI
wdenkdc130442004-12-12 22:06:17 +0000109#define ADD_PCI_CMD CFG_CMD_PCI
wdenka5948882005-03-27 23:41:39 +0000110#else
wdenkdc130442004-12-12 22:06:17 +0000111#define ADD_PCI_CMD 0
112#endif
wdenk64519362004-07-11 17:40:54 +0000113
wdenka5948882005-03-27 23:41:39 +0000114/*
115 * Video console
116 */
Wolfgang Denk99753142006-07-21 11:16:34 +0200117#ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
wdenka5948882005-03-27 23:41:39 +0000118#define CONFIG_VIDEO
119#define CONFIG_VIDEO_SM501
120#define CONFIG_VIDEO_SM501_32BPP
121#define CONFIG_CFB_CONSOLE
122#define CONFIG_VIDEO_LOGO
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200123
124#ifndef CONFIG_FO300
wdenka5948882005-03-27 23:41:39 +0000125#define CONFIG_CONSOLE_EXTRA_INFO
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200126#else
127#define CONFIG_VIDEO_BMP_LOGO
128#endif
129
130#define CONFIG_VGA_AS_SINGLE_DEVICE
wdenka5948882005-03-27 23:41:39 +0000131#define CONFIG_VIDEO_SW_CURSOR
132#define CONFIG_SPLASH_SCREEN
wdenk61c636e2005-03-31 18:42:15 +0000133#define CFG_CONSOLE_IS_IN_ENV
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200134#endif /* #ifndef CONFIG_TQM5200S */
wdenk64519362004-07-11 17:40:54 +0000135
wdenka5948882005-03-27 23:41:39 +0000136#ifdef CONFIG_VIDEO
137#define ADD_BMP_CMD CFG_CMD_BMP
138#else
139#define ADD_BMP_CMD 0
wdenk64519362004-07-11 17:40:54 +0000140#endif
141
142/* Partitions */
wdenk8d3d9ed2005-03-16 16:32:26 +0000143#define CONFIG_MAC_PARTITION
wdenk64519362004-07-11 17:40:54 +0000144#define CONFIG_DOS_PARTITION
wdenka5948882005-03-27 23:41:39 +0000145#define CONFIG_ISO_PARTITION
wdenk64519362004-07-11 17:40:54 +0000146
147/* USB */
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200148#if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
wdenk64519362004-07-11 17:40:54 +0000149#define CONFIG_USB_OHCI
wdenk7dd13292004-07-11 20:04:51 +0000150#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
wdenk64519362004-07-11 17:40:54 +0000151#define CONFIG_USB_STORAGE
152#else
wdenk7dd13292004-07-11 20:04:51 +0000153#define ADD_USB_CMD 0
wdenk64519362004-07-11 17:40:54 +0000154#endif
155
Wolfgang Denk641e3572006-07-22 01:20:03 +0200156#ifndef CONFIG_CAM5200
wdenk64519362004-07-11 17:40:54 +0000157/* POST support */
158#define CONFIG_POST (CFG_POST_MEMORY | \
159 CFG_POST_CPU | \
160 CFG_POST_I2C)
Wolfgang Denk99753142006-07-21 11:16:34 +0200161#endif
wdenk64519362004-07-11 17:40:54 +0000162
163#ifdef CONFIG_POST
164#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
165/* preserve space for the post_word at end of on-chip SRAM */
166#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
167#else
168#define CFG_CMD_POST_DIAG 0
169#endif
170
171/* IDE */
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200172#if defined (CONFIG_MINIFAP) || defined (CONFIG_STK52XX) || defined(CONFIG_FO300)
wdenk99408ba2005-02-24 22:44:16 +0000173#define ADD_IDE_CMD (CFG_CMD_IDE | CFG_CMD_FAT | CFG_CMD_EXT2)
wdenk64519362004-07-11 17:40:54 +0000174#else
175#define ADD_IDE_CMD 0
176#endif
177
178/*
179 * Supported commands
180 */
181#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
wdenka5948882005-03-27 23:41:39 +0000182 ADD_BMP_CMD | \
wdenk99408ba2005-02-24 22:44:16 +0000183 ADD_IDE_CMD | \
wdenk64519362004-07-11 17:40:54 +0000184 ADD_PCI_CMD | \
185 ADD_USB_CMD | \
wdenk99408ba2005-02-24 22:44:16 +0000186 CFG_CMD_ASKENV | \
wdenk64519362004-07-11 17:40:54 +0000187 CFG_CMD_DATE | \
wdenk99408ba2005-02-24 22:44:16 +0000188 CFG_CMD_DHCP | \
wdenk99408ba2005-02-24 22:44:16 +0000189 CFG_CMD_EEPROM | \
190 CFG_CMD_I2C | \
Wolfgang Denkcc1850e2005-08-23 22:27:41 +0200191 CFG_CMD_JFFS2 | \
wdenk64519362004-07-11 17:40:54 +0000192 CFG_CMD_MII | \
wdenk8d5d28a2005-04-02 22:37:54 +0000193 CFG_CMD_NFS | \
wdenk64519362004-07-11 17:40:54 +0000194 CFG_CMD_PING | \
wdenk99408ba2005-02-24 22:44:16 +0000195 CFG_CMD_POST_DIAG | \
wdenk8d5d28a2005-04-02 22:37:54 +0000196 CFG_CMD_REGINFO | \
Wolfgang Denke4e5e4e2005-08-19 00:46:54 +0200197 CFG_CMD_SNTP | \
198 CFG_CMD_BSP)
wdenk64519362004-07-11 17:40:54 +0000199
200/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
201#include <cmd_confdefs.h>
202
wdenk99408ba2005-02-24 22:44:16 +0000203#define CONFIG_TIMESTAMP /* display image timestamps */
204
Wolfgang Denk99753142006-07-21 11:16:34 +0200205#if (TEXT_BASE != 0xFFF00000)
206# define CFG_LOWBOOT 1 /* Boot low */
wdenk64519362004-07-11 17:40:54 +0000207#endif
208
209/*
210 * Autobooting
211 */
212#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
213
wdenk7dd13292004-07-11 20:04:51 +0000214#define CONFIG_PREBOOT "echo;" \
Wolfgang Denk7af96802006-07-26 10:33:37 +0200215 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
wdenk64519362004-07-11 17:40:54 +0000216 "echo"
217
218#undef CONFIG_BOOTARGS
219
Wolfgang Denk0129dcd2006-11-23 22:58:58 +0100220#if defined(CONFIG_TQM5200_B) && !defined(CFG_LOWBOOT)
221# define ENV_UPDT \
222 "update=protect off FFF00000 +${filesize};" \
223 "erase FFF00000 +${filesize};" \
Wolfgang Denk99753142006-07-21 11:16:34 +0200224 "cp.b 200000 FFF00000 ${filesize};" \
Wolfgang Denk0129dcd2006-11-23 22:58:58 +0100225 "protect on FFF00000 +${filesize}\0"
226#else /* default lowboot configuration */
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200227# define ENV_UPDT \
Wolfgang Denk0129dcd2006-11-23 22:58:58 +0100228 "update=protect off FC000000 +${filesize};" \
229 "erase FC000000 +${filesize};" \
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200230 "cp.b 200000 FC000000 ${filesize};" \
Wolfgang Denk0129dcd2006-11-23 22:58:58 +0100231 "protect on FC000000 +${filesize}\0"
232#endif
Wolfgang Denk99753142006-07-21 11:16:34 +0200233
Reinhard Thiesb31c0672007-01-10 14:41:14 +0100234#ifndef CONFIG_CAM5200
235#define CUSTOM_ENV_SETTINGS \
236 "bootfile=/tftpboot/tqm5200/uImage\0" \
237 "u-boot=/tftpboot/tqm5200/u-boot.bin\0"
238#else
239#define CUSTOM_ENV_SETTINGS \
240 "bootfile=cam5200/uImage\0" \
241 "u-boot=cam5200/u-boot.bin\0" \
242 "setup=tftp 200000 cam5200/setup.img; autoscr 200000\0"
243#endif
244
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200245#define CONFIG_EXTRA_ENV_SETTINGS \
246 "netdev=eth0\0" \
247 "rootpath=/opt/eldk/ppc_6xx\0" \
248 "ramargs=setenv bootargs root=/dev/ram rw\0" \
249 "nfsargs=setenv bootargs root=/dev/nfs rw " \
250 "nfsroot=${serverip}:${rootpath}\0" \
251 "addip=setenv bootargs ${bootargs} " \
252 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
253 ":${hostname}:${netdev}:off panic=1\0" \
Wolfgang Denk99753142006-07-21 11:16:34 +0200254 "addcons=setenv bootargs ${bootargs} " \
255 "console=ttyS0,${baudrate}\0" \
256 "flash_self=run ramargs addip addcons;" \
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200257 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
Wolfgang Denk99753142006-07-21 11:16:34 +0200258 "flash_nfs=run nfsargs addip addcons;" \
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200259 "bootm ${kernel_addr}\0" \
Wolfgang Denk99753142006-07-21 11:16:34 +0200260 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
261 "bootm\0" \
Reinhard Thiesb31c0672007-01-10 14:41:14 +0100262 CUSTOM_ENV_SETTINGS \
Wolfgang Denk99753142006-07-21 11:16:34 +0200263 "load=tftp 200000 ${u-boot}\0" \
264 ENV_UPDT \
wdenkdc130442004-12-12 22:06:17 +0000265 ""
wdenk64519362004-07-11 17:40:54 +0000266
267#define CONFIG_BOOTCOMMAND "run net_nfs"
268
269/*
270 * IPB Bus clocking configuration.
271 */
wdenk7dd13292004-07-11 20:04:51 +0000272#define CFG_IPBSPEED_133 /* define for 133MHz speed */
wdenk64519362004-07-11 17:40:54 +0000273
Marian Balakowiczcfae4892006-10-03 20:28:38 +0200274#if defined(CFG_IPBSPEED_133) && !defined(CONFIG_CAM5200)
wdenk64519362004-07-11 17:40:54 +0000275/*
276 * PCI Bus clocking configuration
277 *
278 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
279 * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
280 * been tested with a IPB Bus Clock of 66 MHz.
281 */
282#define CFG_PCISPEED_66 /* define for 66MHz speed */
283#endif
284
285/*
286 * I2C configuration
287 */
288#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
wdenka5948882005-03-27 23:41:39 +0000289#ifdef CONFIG_TQM5200_REV100
290#define CFG_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
wdenk64519362004-07-11 17:40:54 +0000291#else
wdenka5948882005-03-27 23:41:39 +0000292#define CFG_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
wdenk64519362004-07-11 17:40:54 +0000293#endif
294
295/*
296 * I2C clock frequency
297 *
298 * Please notice, that the resulting clock frequency could differ from the
299 * configured value. This is because the I2C clock is derived from system
300 * clock over a frequency divider with only a few divider values. U-boot
301 * calculates the best approximation for CFG_I2C_SPEED. However the calculated
302 * approximation allways lies below the configured value, never above.
303 */
304#define CFG_I2C_SPEED 100000 /* 100 kHz */
305#define CFG_I2C_SLAVE 0x7F
306
307/*
308 * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
309 * also). For other EEPROMs configuration should be verified. On Mini-FAP the
310 * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
311 * same configuration could be used.
312 */
313#define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */
314#define CFG_I2C_EEPROM_ADDR_LEN 2
315#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
316#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
317
318/*
319 * HW-Monitor configuration on Mini-FAP
320 */
321#if defined (CONFIG_MINIFAP)
322#define CFG_I2C_HWMON_ADDR 0x2C
323#endif
324
325/* List of I2C addresses to be verified by POST */
wdenk64519362004-07-11 17:40:54 +0000326#if defined (CONFIG_MINIFAP)
327#undef I2C_ADDR_LIST
328#define I2C_ADDR_LIST { CFG_I2C_EEPROM_ADDR, \
329 CFG_I2C_HWMON_ADDR, \
330 CFG_I2C_SLAVE }
331#endif
332
333/*
334 * Flash configuration
335 */
Wolfgang Denk5591d9e2006-07-19 18:01:38 +0200336#define CFG_FLASH_BASE 0xFC000000
wdenk64519362004-07-11 17:40:54 +0000337
Marian Balakowicz4b7e4562007-01-10 00:26:15 +0100338#if defined(CONFIG_CAM5200) && defined(CONFIG_CAM5200_NIOSFLASH)
Marian Balakowiczcfae4892006-10-03 20:28:38 +0200339#define CFG_MAX_FLASH_BANKS 2 /* max num of flash banks
340 (= chip selects) */
341#define CFG_FLASH_WORD_SIZE unsigned int /* main flash device with */
342#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
343#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
344
345#define CFG_FLASH_ADDR0 0x555
346#define CFG_FLASH_ADDR1 0x2AA
347#define CFG_FLASH_2ND_16BIT_DEV 1 /* NIOS flash is a 16bit device */
348#define CFG_MAX_FLASH_SECT 128
Marian Balakowicz4b7e4562007-01-10 00:26:15 +0100349#else
350/* use CFI flash driver */
351#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
352#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
353#define CFG_FLASH_BANKS_LIST { CFG_BOOTCS_START }
354#define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks
355 (= chip selects) */
356#define CFG_MAX_FLASH_SECT 512 /* max num of sects on one chip */
357#endif
Marian Balakowiczcfae4892006-10-03 20:28:38 +0200358
wdenkdc130442004-12-12 22:06:17 +0000359#define CFG_FLASH_EMPTY_INFO
wdenka5948882005-03-27 23:41:39 +0000360#define CFG_FLASH_SIZE 0x04000000 /* 64 MByte */
Wolfgang Denk0d8e1dc2006-07-18 17:44:19 +0200361#define CFG_FLASH_USE_BUFFER_WRITE 1
wdenk64519362004-07-11 17:40:54 +0000362
Wolfgang Denk641e3572006-07-22 01:20:03 +0200363#if defined (CONFIG_CAM5200)
Wolfgang Denk99753142006-07-21 11:16:34 +0200364# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00040000)
365#elif defined(CONFIG_TQM5200_B)
366# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00080000)
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200367#else
Wolfgang Denk99753142006-07-21 11:16:34 +0200368# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00060000)
369#endif
370
Wolfgang Denkcc1850e2005-08-23 22:27:41 +0200371/* Dynamic MTD partition support */
372#define CONFIG_JFFS2_CMDLINE
373#define MTDIDS_DEFAULT "nor0=TQM5200-0"
Wolfgang Denk99753142006-07-21 11:16:34 +0200374
375#ifdef CONFIG_STK52XX
376# if defined(CONFIG_TQM5200_B)
377# if defined(CFG_LOWBOOT)
378# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:1m(firmware)," \
379 "1536k(kernel)," \
380 "3584k(small-fs)," \
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200381 "2m(initrd)," \
Wolfgang Denk99753142006-07-21 11:16:34 +0200382 "8m(misc)," \
383 "16m(big-fs)"
384# else /* highboot */
385# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:2560k(kernel)," \
386 "3584k(small-fs)," \
387 "2m(initrd)," \
388 "8m(misc)," \
389 "15m(big-fs)," \
390 "1m(firmware)"
391# endif /* CFG_LOWBOOT */
392# else /* !CONFIG_TQM5200_B */
393# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
Wolfgang Denkcc1850e2005-08-23 22:27:41 +0200394 "1408k(kernel)," \
395 "2m(initrd)," \
396 "4m(small-fs)," \
Wolfgang Denk99753142006-07-21 11:16:34 +0200397 "8m(misc)," \
398 "16m(big-fs)"
399# endif /* CONFIG_TQM5200_B */
Wolfgang Denk641e3572006-07-22 01:20:03 +0200400#elif defined (CONFIG_CAM5200)
Wolfgang Denk99753142006-07-21 11:16:34 +0200401# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:768k(firmware)," \
402 "1792k(kernel)," \
Marian Balakowiczcfae4892006-10-03 20:28:38 +0200403 "5632k(rootfs)," \
404 "24m(home)"
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200405#elif defined (CONFIG_FO300)
406# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
407 "1408k(kernel)," \
408 "2m(initrd)," \
409 "4m(small-fs)," \
410 "8m(misc)," \
411 "16m(big-fs)"
Wolfgang Denk99753142006-07-21 11:16:34 +0200412#else
413# error "Unknown Carrier Board"
414#endif /* CONFIG_STK52XX */
wdenk64519362004-07-11 17:40:54 +0000415
416/*
417 * Environment settings
418 */
419#define CFG_ENV_IS_IN_FLASH 1
Wolfgang Denk99753142006-07-21 11:16:34 +0200420#define CFG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
Wolfgang Denk0129dcd2006-11-23 22:58:58 +0100421#if defined(CONFIG_TQM5200_B) || defined (CONFIG_CAM5200)
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200422#define CFG_ENV_SECT_SIZE 0x40000
423#else
wdenk64519362004-07-11 17:40:54 +0000424#define CFG_ENV_SECT_SIZE 0x20000
Wolfgang Denk99753142006-07-21 11:16:34 +0200425#endif /* CONFIG_TQM5200_B */
wdenk8d3d9ed2005-03-16 16:32:26 +0000426#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200427#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
wdenk64519362004-07-11 17:40:54 +0000428
429/*
430 * Memory map
431 */
432#define CFG_MBAR 0xF0000000
433#define CFG_SDRAM_BASE 0x00000000
434#define CFG_DEFAULT_MBAR 0x80000000
435
436/* Use ON-Chip SRAM until RAM will be available */
437#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
438#ifdef CONFIG_POST
439/* preserve space for the post_word at end of on-chip SRAM */
440#define CFG_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
441#else
442#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE
443#endif
444
445
446#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
447#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
448#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
449
wdenk8d3d9ed2005-03-16 16:32:26 +0000450#define CFG_MONITOR_BASE TEXT_BASE
wdenk64519362004-07-11 17:40:54 +0000451#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
452# define CFG_RAMBOOT 1
453#endif
454
Wolfgang Denk641e3572006-07-22 01:20:03 +0200455#if defined (CONFIG_CAM5200)
Wolfgang Denk99753142006-07-21 11:16:34 +0200456# define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
457#elif defined(CONFIG_TQM5200_B)
458# define CFG_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200459#else
Wolfgang Denk99753142006-07-21 11:16:34 +0200460# define CFG_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
461#endif
462
463#define CFG_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
wdenk64519362004-07-11 17:40:54 +0000464#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
465
466/*
467 * Ethernet configuration
468 */
469#define CONFIG_MPC5xxx_FEC 1
470/*
471 * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
472 */
473/* #define CONFIG_FEC_10MBIT 1 */
474#define CONFIG_PHY_ADDR 0x00
475
476/*
477 * GPIO configuration
478 *
Marian Balakowiczcfae4892006-10-03 20:28:38 +0200479 * use CS1: Bit 0 (mask: 0x80000000):
480 * 1 -> Pin gpio_wkup_6 as second SDRAM chip select (mem_cs1).
wdenk64519362004-07-11 17:40:54 +0000481 * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
Marian Balakowiczcfae4892006-10-03 20:28:38 +0200482 * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
483 * SPI on PSC3 according to PSC3 setting. Use for CAM5200.
484 * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
485 * Use for REV200 STK52XX boards and FO300 boards. Do not use
486 * with REV100 modules (because, there I2C1 is used as I2C bus).
487 * use ATA: Bits 6-7 (mask 0x03000000):
488 * 00 -> No ATA chip selects, csb_4/5 used as normal chip selects.
489 * Use for CAM5200 board.
490 * 01 -> ATA cs0/1 on csb_4/5. Use for the remaining boards.
491 * use PSC6: Bits 9-11 (mask 0x00700000):
492 * 000 -> use PSC6_0 to PSC6_3 as GPIO, PSC6 could not be used as
493 * UART, CODEC or IrDA.
494 * GPIO on PSC6_3 is used in post_hotkeys_pressed() to
495 * enable extended POST tests.
496 * Use for MINI-FAP and TQM5200_IB boards.
497 * 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
498 * Extended POST test is not available.
499 * Use for STK52xx, FO300 and CAM5200 boards.
500 * use PCI_DIS: Bit 16 (mask 0x00008000):
501 * 1 -> disable PCI controller (on CAM5200 board).
502 * use USB: Bits 18-19 (mask 0x00003000):
503 * 10 -> two UARTs (on FO300 and CAM5200).
504 * use PSC3: Bits 20-23 (mask: 0x00000f00):
505 * 0000 -> All PSC3 pins are GPIOs.
506 * 1100 -> UART/SPI (on FO300 board).
507 * 0100 -> UART (on CAM5200 board).
508 * use PSC2: Bits 25:27 (mask: 0x00000030):
509 * 000 -> All PSC2 pins are GPIOs.
510 * 100 -> UART (on CAM5200 board).
511 * 001 -> CAN1/2 on PSC2 pins.
512 * Use for REV100 STK52xx boards
513 * 01x -> Use AC97 (on FO300 board).
514 * use PSC1: Bits 29-31 (mask: 0x00000007):
515 * 100 -> UART (on all boards).
wdenk64519362004-07-11 17:40:54 +0000516 */
517#if defined (CONFIG_MINIFAP)
wdenka5948882005-03-27 23:41:39 +0000518# define CFG_GPS_PORT_CONFIG 0x91000004
wdenkdc130442004-12-12 22:06:17 +0000519#elif defined (CONFIG_STK52XX)
wdenk61c636e2005-03-31 18:42:15 +0000520# if defined (CONFIG_STK52XX_REV100)
521# define CFG_GPS_PORT_CONFIG 0x81500014
522# else /* STK52xx REV200 and above */
523# if defined (CONFIG_TQM5200_REV100)
524# error TQM5200 REV100 not supported on STK52XX REV200 or above
525# else/* TQM5200 REV200 and above */
526# define CFG_GPS_PORT_CONFIG 0x91500004
527# endif
wdenka5948882005-03-27 23:41:39 +0000528# endif
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200529#elif defined (CONFIG_FO300)
530# define CFG_GPS_PORT_CONFIG 0x91502c24
Marian Balakowiczcfae4892006-10-03 20:28:38 +0200531#elif defined (CONFIG_CAM5200)
532# define CFG_GPS_PORT_CONFIG 0x8050A444
wdenk61c636e2005-03-31 18:42:15 +0000533#else /* TMQ5200 Inbetriebnahme-Board */
wdenka5948882005-03-27 23:41:39 +0000534# define CFG_GPS_PORT_CONFIG 0x81000004
wdenk64519362004-07-11 17:40:54 +0000535#endif
536
537/*
538 * RTC configuration
539 */
Wolfgang Denk09f940b2005-08-18 11:51:12 +0200540#if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
541# define CONFIG_RTC_M41T11 1
542# define CFG_I2C_RTC_ADDR 0x68
Wolfgang Denk8362ea42006-07-19 14:44:03 +0200543# define CFG_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
544 year */
Wolfgang Denk09f940b2005-08-18 11:51:12 +0200545#else
546# define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
547#endif
wdenk64519362004-07-11 17:40:54 +0000548
549/*
550 * Miscellaneous configurable options
551 */
552#define CFG_LONGHELP /* undef to save memory */
553#define CFG_PROMPT "=> " /* Monitor Command Prompt */
Wolfgang Denk99753142006-07-21 11:16:34 +0200554
Wolfgang Denk274bac52006-10-28 02:29:14 +0200555#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
Wolfgang Denk99753142006-07-21 11:16:34 +0200556#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
557#define CFG_PROMPT_HUSH_PS2 "> "
558
wdenk64519362004-07-11 17:40:54 +0000559#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
560#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
561#else
562#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
563#endif
564#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
565#define CFG_MAXARGS 16 /* max number of command args */
566#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
567
568/* Enable an alternate, more extensive memory test */
569#define CFG_ALT_MEMTEST
570
571#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
572#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
573
574#define CFG_LOAD_ADDR 0x100000 /* default load address */
575
576#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
577
578/*
579 * Enable loopw commando. This has only affect, if CFG_CMD_MEM is defined,
580 * which is normally part of the default commands (CFV_CMD_DFL)
581 */
582#define CONFIG_LOOPW
583
584/*
585 * Various low-level settings
586 */
587#if defined(CONFIG_MPC5200)
588#define CFG_HID0_INIT HID0_ICE | HID0_ICFI
589#define CFG_HID0_FINAL HID0_ICE
590#else
591#define CFG_HID0_INIT 0
592#define CFG_HID0_FINAL 0
593#endif
594
595#define CFG_BOOTCS_START CFG_FLASH_BASE
596#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
597#ifdef CFG_PCISPEED_66
598#define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
599#else
600#define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
601#endif
602#define CFG_CS0_START CFG_FLASH_BASE
603#define CFG_CS0_SIZE CFG_FLASH_SIZE
604
wdenkdc130442004-12-12 22:06:17 +0000605#define CONFIG_LAST_STAGE_INIT
wdenkdc130442004-12-12 22:06:17 +0000606
wdenk64519362004-07-11 17:40:54 +0000607/*
608 * SRAM - Do not map below 2 GB in address space, because this area is used
609 * for SDRAM autosizing.
610 */
wdenk64519362004-07-11 17:40:54 +0000611#define CFG_CS2_START 0xE5000000
wdenkdc130442004-12-12 22:06:17 +0000612#define CFG_CS2_SIZE 0x100000 /* 1 MByte */
wdenk64519362004-07-11 17:40:54 +0000613#define CFG_CS2_CFG 0x0004D930
wdenk64519362004-07-11 17:40:54 +0000614
615/*
616 * Grafic controller - Do not map below 2 GB in address space, because this
617 * area is used for SDRAM autosizing.
618 */
wdenka5948882005-03-27 23:41:39 +0000619#define SM501_FB_BASE 0xE0000000
620#define CFG_CS1_START (SM501_FB_BASE)
wdenk64519362004-07-11 17:40:54 +0000621#define CFG_CS1_SIZE 0x4000000 /* 64 MByte */
wdenkda54bc92004-08-04 21:56:49 +0000622#define CFG_CS1_CFG 0x8F48FF70
wdenk64519362004-07-11 17:40:54 +0000623#define SM501_MMIO_BASE CFG_CS1_START + 0x03E00000
wdenk64519362004-07-11 17:40:54 +0000624
625#define CFG_CS_BURST 0x00000000
wdenka5948882005-03-27 23:41:39 +0000626#define CFG_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
wdenk64519362004-07-11 17:40:54 +0000627
Marian Balakowiczcfae4892006-10-03 20:28:38 +0200628#if defined(CONFIG_CAM5200)
629#define CFG_CS4_START 0xB0000000
630#define CFG_CS4_SIZE 0x00010000
631#define CFG_CS4_CFG 0x01019C10
632
633#define CFG_CS5_START 0xD0000000
634#define CFG_CS5_SIZE 0x01208000
635#define CFG_CS5_CFG 0x1414BF10
636#endif
637
wdenk64519362004-07-11 17:40:54 +0000638#define CFG_RESET_ADDRESS 0xff000000
639
640/*-----------------------------------------------------------------------
641 * USB stuff
642 *-----------------------------------------------------------------------
643 */
644#define CONFIG_USB_CLOCK 0x0001BBBB
645#define CONFIG_USB_CONFIG 0x00001000
646
647/*-----------------------------------------------------------------------
648 * IDE/ATA stuff Supports IDE harddisk
649 *-----------------------------------------------------------------------
650 */
651
wdenk7dd13292004-07-11 20:04:51 +0000652#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
wdenk64519362004-07-11 17:40:54 +0000653
wdenk7dd13292004-07-11 20:04:51 +0000654#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
655#undef CONFIG_IDE_LED /* LED for ide not supported */
wdenk64519362004-07-11 17:40:54 +0000656
wdenk7dd13292004-07-11 20:04:51 +0000657#define CONFIG_IDE_RESET /* reset for ide supported */
wdenk64519362004-07-11 17:40:54 +0000658#define CONFIG_IDE_PREINIT
659
660#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
wdenka5948882005-03-27 23:41:39 +0000661#define CFG_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
wdenk64519362004-07-11 17:40:54 +0000662
663#define CFG_ATA_IDE0_OFFSET 0x0000
664
665#define CFG_ATA_BASE_ADDR MPC5XXX_ATA
666
667/* Offset for data I/O */
668#define CFG_ATA_DATA_OFFSET (0x0060)
669
670/* Offset for normal register accesses */
671#define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET)
672
673/* Offset for alternate registers */
674#define CFG_ATA_ALT_OFFSET (0x005C)
675
wdenk7dd13292004-07-11 20:04:51 +0000676/* Interval between registers */
677#define CFG_ATA_STRIDE 4
wdenk64519362004-07-11 17:40:54 +0000678
679#endif /* __CONFIG_H */