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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
wdenk591dda52002-11-18 00:14:45 +00002/*
3 * (C) Copyright 2002
Albert ARIBAUD60fbc8d2011-08-04 18:45:45 +02004 * Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
wdenk591dda52002-11-18 00:14:45 +00005 */
6
wdenkef5fe752003-03-12 10:41:04 +00007#ifndef _U_BOOT_I386_H_
8#define _U_BOOT_I386_H_ 1
wdenk591dda52002-11-18 00:14:45 +00009
Simon Glass162b09c2017-05-17 08:22:56 -060010struct global_data;
11
Bin Menga3c9fb02015-06-07 11:33:13 +080012extern char gdt_rom[];
13
wdenk591dda52002-11-18 00:14:45 +000014/* cpu/.../cpu.c */
Simon Glass19a8b122014-11-06 13:20:06 -070015int arch_cpu_init(void);
Simon Glass05e12f72019-04-25 21:58:42 -060016
17/**
18 * x86_cpu_init_f() - Set up basic features of the x86 CPU
19 *
20 * 0 on success, -ve on error
21 */
Graeme Russ121931c2011-02-12 15:11:35 +110022int x86_cpu_init_f(void);
Simon Glass05e12f72019-04-25 21:58:42 -060023
24/**
25 * x86_cpu_reinit_f() - Set up the CPU a second time
26 *
27 * Once cpu_init_f() has been called (e.g. in SPL) we should not call it
28 * again (e.g. in U-Boot proper) since it sets up the state from scratch.
29 * Call this function in later phases of U-Boot instead. It reads the CPU
30 * identify so that CPU functions can be used correctly, but does not change
31 * anything.
32 *
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +010033 * Return: 0 (indicating success, to mimic cpu_init_f())
Simon Glass05e12f72019-04-25 21:58:42 -060034 */
35int x86_cpu_reinit_f(void);
36
Simon Glassdc444672019-10-20 21:37:54 -060037/**
38 * x86_cpu_init_tpl() - Do the minimum possible CPU init
39 *
40 * This just sets up the CPU features and figured out the identity
41 *
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +010042 * Return: 0 (indicating success, to mimic cpu_init_f())
Simon Glassdc444672019-10-20 21:37:54 -060043 */
44int x86_cpu_init_tpl(void);
45
Simon Glassc5c4ed62020-07-02 21:12:12 -060046/**
47 * cpu_reinit_fpu() - Reinit the FPU if something is wrong with it
48 *
49 * The FSP-M code can leave registers in use in the FPU. This functions reinits
50 * it so that the FPU can be used safely
51 */
52void cpu_reinit_fpu(void);
53
Graeme Russ078395c2009-11-24 20:04:21 +110054int cpu_init_f(void);
Simon Glass162b09c2017-05-17 08:22:56 -060055void setup_gdt(struct global_data *id, u64 *gdt_addr);
Bin Menga3c9fb02015-06-07 11:33:13 +080056/*
57 * Setup FSP execution environment GDT to use the one we used in
58 * arch/x86/cpu/start16.S and reload the segment registers.
59 */
60void setup_fsp_gdt(void);
Graeme Russ6e256002011-12-27 22:46:43 +110061int init_cache(void);
Gabe Black846d08e2012-10-20 12:33:10 +000062int cleanup_before_linux(void);
Graeme Russ7679d1f2009-02-24 21:14:45 +110063
64/* cpu/.../timer.c */
65void timer_isr(void *);
66typedef void (timer_fnc_t) (void);
67int register_timer_isr (timer_fnc_t *isr_func);
Simon Glass11d7a5b2013-04-17 16:13:36 +000068unsigned long get_tbclk_mhz(void);
69void timer_set_base(uint64_t base);
Bin Mengb29a08c2015-10-22 19:13:30 -070070int i8254_init(void);
Graeme Russ7679d1f2009-02-24 21:14:45 +110071
Graeme Russ77290ee2009-02-24 21:13:40 +110072/* cpu/.../interrupts.c */
73int cpu_init_interrupts(void);
74
Simon Glass83374332014-11-06 13:20:08 -070075int cleanup_before_linux(void);
76int x86_cleanup_before_linux(void);
77void x86_enable_caches(void);
78void x86_disable_caches(void);
79int x86_init_cache(void);
Pali Rohár4f4f5832022-09-09 17:32:40 +020080phys_size_t board_get_usable_ram_top(phys_size_t total_size);
Simon Glass543bb142014-11-10 18:00:26 -070081int default_print_cpuinfo(void);
Simon Glass83374332014-11-06 13:20:08 -070082
Simon Glass4661c2c2015-01-27 22:13:42 -070083/* Set up a UART which can be used with printch(), printhex8(), etc. */
Stefan Roesea377b7c2016-01-19 14:24:12 +010084int setup_internal_uart(int enable);
Simon Glass4661c2c2015-01-27 22:13:42 -070085
wdenkabda5ca2003-05-31 18:35:21 +000086void isa_unmap_rom(u32 addr);
87u32 isa_map_rom(u32 bus_addr, int size);
88
Graeme Russcbfce1d2011-04-13 19:43:28 +100089/* arch/x86/lib/... */
wdenkabda5ca2003-05-31 18:35:21 +000090int video_bios_init(void);
wdenk591dda52002-11-18 00:14:45 +000091
Simon Glass6c34fc12019-09-25 08:00:11 -060092/* arch/x86/lib/fsp1,2/... */
Bin Mengcf200302017-04-21 07:24:39 -070093
94/**
95 * fsp_save_s3_stack() - save stack address to CMOS for next S3 boot
96 *
97 * At the end of pre-relocation phase, save the new stack address
98 * to CMOS and use it as the stack on next S3 boot for fsp_init()
99 * continuation function.
100 *
101 * @return: 0 if OK, -ve on error
102 */
103int fsp_save_s3_stack(void);
104
Simon Glasscfac29e2023-07-15 21:38:41 -0600105/**
106 * board_init_f_r_trampoline() - jump to relocated address with new stack
107 *
108 * @sp: New stack pointer to use
109 */
110void __noreturn board_init_f_r_trampoline(ulong sp);
111
112/**
113 * board_init_f_r() - jump to relocated U-Boot
114 *
115 * This is used to jump from pre-relocation to post-relocation U-Boot. It
116 * enables the cache and jump to the new location.
117 */
118void __noreturn board_init_f_r(void);
wdenk591dda52002-11-18 00:14:45 +0000119
Simon Glasse6b03502023-07-15 21:38:52 -0600120/*
121 * board_init_f_r_trampoline64() - jump to relocated address with new stack
122 *
123 * This is the 64-bit version
124 *
125 * @new_gd: New global_data pointer to use
126 * @sp: New stack pointer to pass on to board_init_r()
127 */
128void __noreturn board_init_f_r_trampoline64(struct global_data *new_gd,
129 ulong sp);
130
Bin Meng15305362015-04-24 18:10:06 +0800131int arch_misc_init(void);
132
Vadim Bendebury1d82bac2012-10-23 18:04:32 +0000133/* Read the time stamp counter */
Simon Glass56da76d2022-12-21 16:08:15 -0700134static inline notrace uint64_t rdtsc(void)
Vadim Bendebury1d82bac2012-10-23 18:04:32 +0000135{
136 uint32_t high, low;
137 __asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high));
138 return (((uint64_t)high) << 32) | low;
139}
140
141/* board/... */
142void timer_set_tsc_base(uint64_t new_base);
143uint64_t timer_get_tsc(void);
144
Simon Glass268eefd2014-11-12 22:42:28 -0700145void quick_ram_check(void);
146
Simon Glass1b6b9b92014-12-29 19:32:24 -0700147#define PCI_VGA_RAM_IMAGE_START 0xc0000
148
wdenkef5fe752003-03-12 10:41:04 +0000149#endif /* _U_BOOT_I386_H_ */