Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 2 | /* |
3 | * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org> | ||||
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 4 | */ |
5 | |||||
Paul Burton | 10a74b5 | 2013-11-09 10:22:08 +0000 | [diff] [blame] | 6 | #ifndef _MALTA_CONFIG_H |
7 | #define _MALTA_CONFIG_H | ||||
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 8 | |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 9 | /* |
10 | * System configuration | ||||
11 | */ | ||||
Paul Burton | 10a74b5 | 2013-11-09 10:22:08 +0000 | [diff] [blame] | 12 | #define CONFIG_MALTA |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 13 | |
Gabor Juhos | 5e19515 | 2013-10-24 14:32:00 +0200 | [diff] [blame] | 14 | #define CONFIG_MEMSIZE_IN_BYTES |
15 | |||||
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 16 | /* |
17 | * CPU Configuration | ||||
18 | */ | ||||
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 19 | |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 20 | /* |
21 | * Memory map | ||||
22 | */ | ||||
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 23 | |
Paul Burton | 825cfbd | 2016-05-26 14:49:36 +0100 | [diff] [blame] | 24 | #ifdef CONFIG_64BIT |
Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 25 | # define CFG_SYS_SDRAM_BASE 0xffffffff80000000 |
Paul Burton | 825cfbd | 2016-05-26 14:49:36 +0100 | [diff] [blame] | 26 | #else |
Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 27 | # define CFG_SYS_SDRAM_BASE 0x80000000 |
Paul Burton | 825cfbd | 2016-05-26 14:49:36 +0100 | [diff] [blame] | 28 | #endif |
Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 29 | #define CFG_SYS_SDRAM_SIZE 0x10000000 /* 256 MiB */ |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 30 | |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 31 | #define CFG_SYS_INIT_SP_OFFSET 0x400000 |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 32 | |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 33 | /* |
34 | * Serial driver | ||||
35 | */ | ||||
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 36 | |
37 | /* | ||||
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 38 | * Flash configuration |
39 | */ | ||||
Paul Burton | 825cfbd | 2016-05-26 14:49:36 +0100 | [diff] [blame] | 40 | #ifdef CONFIG_64BIT |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 41 | # define CFG_SYS_FLASH_BASE 0xffffffffbe000000 |
Paul Burton | 825cfbd | 2016-05-26 14:49:36 +0100 | [diff] [blame] | 42 | #else |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 43 | # define CFG_SYS_FLASH_BASE 0xbe000000 |
Paul Burton | 825cfbd | 2016-05-26 14:49:36 +0100 | [diff] [blame] | 44 | #endif |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 45 | |
46 | /* | ||||
Paul Burton | 6046522 | 2013-11-08 11:18:56 +0000 | [diff] [blame] | 47 | * Environment |
48 | */ | ||||
Paul Burton | 6046522 | 2013-11-08 11:18:56 +0000 | [diff] [blame] | 49 | |
50 | /* | ||||
Paul Burton | c6c3853 | 2015-01-29 10:38:20 +0000 | [diff] [blame] | 51 | * IDE/ATA |
52 | */ | ||||
Paul Burton | c6c3853 | 2015-01-29 10:38:20 +0000 | [diff] [blame] | 53 | |
54 | /* | ||||
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 55 | * Commands |
56 | */ | ||||
Gabor Juhos | 652ccee | 2013-05-22 03:57:42 +0000 | [diff] [blame] | 57 | |
Paul Burton | 10a74b5 | 2013-11-09 10:22:08 +0000 | [diff] [blame] | 58 | #endif /* _MALTA_CONFIG_H */ |