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Tom Rini8b0c8a12018-05-06 18:27:01 -04001/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
4 *
5 * Configuration settings for the STM32MP15x CPU
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01006 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10#include <linux/sizes.h>
11#include <asm/arch/stm32.h>
12
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010013/*
14 * Number of clock ticks in 1 sec
15 */
16#define CONFIG_SYS_HZ 1000
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010017
Patrick Delaunay5d061412019-02-12 11:44:39 +010018#ifndef CONFIG_STM32MP1_TRUSTED
Patrick Delaunaye0207372018-04-16 10:13:24 +020019/* PSCI support */
20#define CONFIG_ARMV7_PSCI_1_0
21#define CONFIG_ARMV7_SECURE_BASE STM32_SYSRAM_BASE
22#define CONFIG_ARMV7_SECURE_MAX_SIZE STM32_SYSRAM_SIZE
Patrick Delaunay5d061412019-02-12 11:44:39 +010023#endif
Patrick Delaunaye0207372018-04-16 10:13:24 +020024
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010025/*
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010026 * Configuration of the external SRAM memory used by U-Boot
27 */
28#define CONFIG_SYS_SDRAM_BASE STM32_DDR_BASE
29#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
30
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010031/*
32 * Console I/O buffer size
33 */
34#define CONFIG_SYS_CBSIZE SZ_1K
35
36/*
37 * Needed by "loadb"
38 */
39#define CONFIG_SYS_LOAD_ADDR STM32_DDR_BASE
40
Patrice Chotardde326e42019-05-07 18:39:22 +020041#if defined(CONFIG_ENV_IS_IN_UBI)
42#define CONFIG_ENV_UBI_VOLUME_REDUND "uboot_config_r"
43#endif
44
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010045/* ATAGs */
46#define CONFIG_CMDLINE_TAG
47#define CONFIG_SETUP_MEMORY_TAGS
48#define CONFIG_INITRD_TAG
49
Patrick Delaunay80e17eb2019-02-27 17:01:21 +010050/* Extend size of kernel image for uncompression */
51#define CONFIG_SYS_BOOTM_LEN SZ_32M
52
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010053/* SPL support */
54#ifdef CONFIG_SPL
55/* BOOTROM load address */
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010056/* SPL use DDR */
57#define CONFIG_SPL_BSS_START_ADDR 0xC0200000
58#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000
59#define CONFIG_SYS_SPL_MALLOC_START 0xC0300000
60#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000
61
62/* limit SYSRAM usage to first 128 KB */
63#define CONFIG_SPL_MAX_SIZE 0x00020000
64#define CONFIG_SPL_STACK (STM32_SYSRAM_BASE + \
65 STM32_SYSRAM_SIZE)
66#endif /* #ifdef CONFIG_SPL */
67
Patrick Delaunaya9a36942019-02-27 17:01:22 +010068#define CONFIG_SYS_MEMTEST_START STM32_DDR_BASE
69#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_64M)
70#define CONFIG_SYS_MEMTEST_SCRATCH (CONFIG_SYS_MEMTEST_END + 4)
71
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010072/*MMC SD*/
73#define CONFIG_SYS_MMC_MAX_DEVICE 3
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010074
Patrick Delaunayf2a7b872019-02-27 17:01:18 +010075/*****************************************************************************/
76#ifdef CONFIG_DISTRO_DEFAULTS
77/*****************************************************************************/
78
79#if !defined(CONFIG_SPL_BUILD)
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010080
Patrick Delaunaye0188ac2019-04-08 15:30:52 +020081/* NAND support */
82#define CONFIG_SYS_NAND_ONFI_DETECTION
83#define CONFIG_SYS_MAX_NAND_DEVICE 1
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010084#define BOOT_TARGET_DEVICES(func) \
85 func(MMC, mmc, 1) \
86 func(MMC, mmc, 0) \
87 func(MMC, mmc, 2)
Patrick Delaunayf2a7b872019-02-27 17:01:18 +010088/*
89 * bootcmd for stm32mp1:
90 * for serial/usb: execute the stm32prog command
91 * for mmc boot (eMMC, SD card), boot only on the same device
92 * for nand boot, boot with on ubifs partition on nand
93 * for nor boot, use the default order
94 */
Patrick Delaunayf2a7b872019-02-27 17:01:18 +010095#define STM32MP_BOOTCMD "bootcmd_stm32mp=" \
96 "echo \"Boot over ${boot_device}${boot_instance}!\";" \
97 "if test ${boot_device} = serial || test ${boot_device} = usb;" \
98 "then stm32prog ${boot_device} ${boot_instance}; " \
99 "else " \
100 "if test ${boot_device} = mmc;" \
101 "then env set boot_targets \"mmc${boot_instance}\"; fi;" \
102 "if test ${boot_device} = nand;" \
103 "then env set boot_targets ubifs0; fi;" \
104 "run distro_bootcmd;" \
105 "fi;\0"
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100106
Patrick Delaunayf2a7b872019-02-27 17:01:18 +0100107#include <config_distro_bootcmd.h>
Patrick Delaunayfc69c682018-03-20 10:54:54 +0100108
Patrice Chotard41443cf2019-05-02 18:07:14 +0200109#if defined(CONFIG_STM32_QSPI) || defined(CONFIG_NAND_STM32_FMC)
110#define CONFIG_SYS_MTDPARTS_RUNTIME
111#endif
112
113#define STM32MP_MTDPARTS \
114 "mtdparts_nor0=256k(fsbl1),256k(fsbl2),2m(ssbl),-(nor_user)\0" \
115 "mtdparts_nand0=2m(fsbl),2m(ssbl1),2m(ssbl2),-(UBI)\0"
116
Patrick Delaunay80e17eb2019-02-27 17:01:21 +0100117/*
118 * memory layout for 32M uncompressed/compressed kernel,
119 * 1M fdt, 1M script, 1M pxe and 1M for splashimage
120 * and the ramdisk at the end.
121 */
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100122#define CONFIG_EXTRA_ENV_SETTINGS \
Patrick Delaunay80e17eb2019-02-27 17:01:21 +0100123 "kernel_addr_r=0xc2000000\0" \
124 "fdt_addr_r=0xc4000000\0" \
125 "scriptaddr=0xc4100000\0" \
126 "pxefile_addr_r=0xc4200000\0" \
127 "splashimage=0xc4300000\0" \
128 "ramdisk_addr_r=0xc4400000\0" \
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100129 "fdt_high=0xffffffff\0" \
130 "initrd_high=0xffffffff\0" \
Patrick Delaunayf2a7b872019-02-27 17:01:18 +0100131 STM32MP_BOOTCMD \
Patrice Chotard41443cf2019-05-02 18:07:14 +0200132 STM32MP_MTDPARTS \
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100133 BOOTENV
134
135#endif /* ifndef CONFIG_SPL_BUILD */
Patrick Delaunayf2a7b872019-02-27 17:01:18 +0100136#endif /* ifdef CONFIG_DISTRO_DEFAULTS*/
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100137
138#endif /* __CONFIG_H */