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Tom Rini8b0c8a12018-05-06 18:27:01 -04001/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
4 *
5 * Configuration settings for the STM32MP15x CPU
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01006 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10#include <linux/sizes.h>
11#include <asm/arch/stm32.h>
12
13#define CONFIG_PREBOOT
14
15/*
16 * Number of clock ticks in 1 sec
17 */
18#define CONFIG_SYS_HZ 1000
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010019
Patrick Delaunay5d061412019-02-12 11:44:39 +010020#ifndef CONFIG_STM32MP1_TRUSTED
Patrick Delaunaye0207372018-04-16 10:13:24 +020021/* PSCI support */
22#define CONFIG_ARMV7_PSCI_1_0
23#define CONFIG_ARMV7_SECURE_BASE STM32_SYSRAM_BASE
24#define CONFIG_ARMV7_SECURE_MAX_SIZE STM32_SYSRAM_SIZE
Patrick Delaunay5d061412019-02-12 11:44:39 +010025#endif
Patrick Delaunaye0207372018-04-16 10:13:24 +020026
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010027/*
28 * malloc() pool size
29 */
30#define CONFIG_SYS_MALLOC_LEN SZ_32M
31
32/*
33 * Configuration of the external SRAM memory used by U-Boot
34 */
35#define CONFIG_SYS_SDRAM_BASE STM32_DDR_BASE
36#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
37
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010038/*
39 * Console I/O buffer size
40 */
41#define CONFIG_SYS_CBSIZE SZ_1K
42
43/*
44 * Needed by "loadb"
45 */
46#define CONFIG_SYS_LOAD_ADDR STM32_DDR_BASE
47
48/*
49 * Env parameters
50 */
51#define CONFIG_ENV_SIZE SZ_4K
52
53/* ATAGs */
54#define CONFIG_CMDLINE_TAG
55#define CONFIG_SETUP_MEMORY_TAGS
56#define CONFIG_INITRD_TAG
57
58/* SPL support */
59#ifdef CONFIG_SPL
60/* BOOTROM load address */
61#define CONFIG_SPL_TEXT_BASE 0x2FFC2500
62/* SPL use DDR */
63#define CONFIG_SPL_BSS_START_ADDR 0xC0200000
64#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000
65#define CONFIG_SYS_SPL_MALLOC_START 0xC0300000
66#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000
67
68/* limit SYSRAM usage to first 128 KB */
69#define CONFIG_SPL_MAX_SIZE 0x00020000
70#define CONFIG_SPL_STACK (STM32_SYSRAM_BASE + \
71 STM32_SYSRAM_SIZE)
72#endif /* #ifdef CONFIG_SPL */
73
74/*MMC SD*/
75#define CONFIG_SYS_MMC_MAX_DEVICE 3
Patrick Delaunay8d050102018-03-20 10:54:52 +010076#define CONFIG_SUPPORT_EMMC_BOOT
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010077
78#if !defined(CONFIG_SPL) || !defined(CONFIG_SPL_BUILD)
79
80#define BOOT_TARGET_DEVICES(func) \
81 func(MMC, mmc, 1) \
82 func(MMC, mmc, 0) \
83 func(MMC, mmc, 2)
84
85#include <config_distro_bootcmd.h>
86
Patrick Delaunayfc69c682018-03-20 10:54:54 +010087#define STM32MP_PREBOOT \
88 "echo \"Boot over ${boot_device}${boot_instance}!\"; " \
89 "if test \"${boot_device}\" = \"mmc\"; then " \
90 "env set boot_targets \"mmc${boot_instance}\"; "\
91 "fi;"
92
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010093#define CONFIG_EXTRA_ENV_SETTINGS \
94 "scriptaddr=0xC0000000\0" \
95 "pxefile_addr_r=0xC0000000\0" \
96 "kernel_addr_r=0xC1000000\0" \
97 "fdt_addr_r=0xC4000000\0" \
98 "ramdisk_addr_r=0xC4100000\0" \
99 "fdt_high=0xffffffff\0" \
100 "initrd_high=0xffffffff\0" \
Patrick Delaunayfc69c682018-03-20 10:54:54 +0100101 "preboot=" STM32MP_PREBOOT "\0" \
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100102 BOOTENV
103
104#endif /* ifndef CONFIG_SPL_BUILD */
105
106#endif /* __CONFIG_H */