blob: c3061e20d95d4f7eb15e20c60d5f9b2abbbbe4a8 [file] [log] [blame]
Mathieu J. Poirier4a036fe2012-08-03 11:05:12 +00001/*
2 * Copyright (C) ST-Ericsson SA 2009
3 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Mathieu J. Poirier4a036fe2012-08-03 11:05:12 +00005 */
6
7#include <config.h>
8#include <common.h>
9#include <malloc.h>
10#include <i2c.h>
11#include <mmc.h>
12#include <asm/types.h>
13#include <asm/io.h>
14#include <asm/errno.h>
15#include <asm/arch/db8500_pincfg.h>
Mathieu J. Poiriercc1bb792012-07-31 08:59:28 +000016#include <asm/arch/prcmu.h>
17#include <asm/arch/hardware.h>
Mathieu J. Poiriera50f83b2012-07-31 08:59:30 +000018#include <asm/arch/sys_proto.h>
Mathieu J. Poirier4a036fe2012-08-03 11:05:12 +000019
John Rigby03f609b2012-07-31 08:59:31 +000020#ifdef CONFIG_MMC
21#include "../../../drivers/mmc/arm_pl180_mmci.h"
22#endif
Mathieu J. Poirier4a036fe2012-08-03 11:05:12 +000023#include "db8500_pins.h"
24
25/*
26 * Get a global data pointer
27 */
28DECLARE_GLOBAL_DATA_PTR;
29
30/*
31 * Memory controller register
32 */
33#define DMC_BASE_ADDR 0x80156000
34#define DMC_CTL_97 (DMC_BASE_ADDR + 0x184)
35
36/*
37 * GPIO pin config common for MOP500/HREF boards
38 */
39unsigned long gpio_cfg_common[] = {
40 /* I2C */
41 GPIO147_I2C0_SCL,
42 GPIO148_I2C0_SDA,
43 GPIO16_I2C1_SCL,
44 GPIO17_I2C1_SDA,
45 GPIO10_I2C2_SDA,
46 GPIO11_I2C2_SCL,
47 GPIO229_I2C3_SDA,
48 GPIO230_I2C3_SCL,
49
50 /* SSP0, to AB8500 */
51 GPIO143_SSP0_CLK,
52 GPIO144_SSP0_FRM,
53 GPIO145_SSP0_RXD | PIN_PULL_DOWN,
54 GPIO146_SSP0_TXD,
55
56 /* MMC0 (MicroSD card) */
57 GPIO18_MC0_CMDDIR | PIN_OUTPUT_HIGH,
58 GPIO19_MC0_DAT0DIR | PIN_OUTPUT_HIGH,
59 GPIO20_MC0_DAT2DIR | PIN_OUTPUT_HIGH,
60 GPIO21_MC0_DAT31DIR | PIN_OUTPUT_HIGH,
61 GPIO22_MC0_FBCLK | PIN_INPUT_NOPULL,
62 GPIO23_MC0_CLK | PIN_OUTPUT_LOW,
63 GPIO24_MC0_CMD | PIN_INPUT_PULLUP,
64 GPIO25_MC0_DAT0 | PIN_INPUT_PULLUP,
65 GPIO26_MC0_DAT1 | PIN_INPUT_PULLUP,
66 GPIO27_MC0_DAT2 | PIN_INPUT_PULLUP,
67 GPIO28_MC0_DAT3 | PIN_INPUT_PULLUP,
68
69 /* MMC4 (On-board eMMC) */
70 GPIO197_MC4_DAT3 | PIN_INPUT_PULLUP,
71 GPIO198_MC4_DAT2 | PIN_INPUT_PULLUP,
72 GPIO199_MC4_DAT1 | PIN_INPUT_PULLUP,
73 GPIO200_MC4_DAT0 | PIN_INPUT_PULLUP,
74 GPIO201_MC4_CMD | PIN_INPUT_PULLUP,
75 GPIO202_MC4_FBCLK | PIN_INPUT_NOPULL,
76 GPIO203_MC4_CLK | PIN_OUTPUT_LOW,
77 GPIO204_MC4_DAT7 | PIN_INPUT_PULLUP,
78 GPIO205_MC4_DAT6 | PIN_INPUT_PULLUP,
79 GPIO206_MC4_DAT5 | PIN_INPUT_PULLUP,
80 GPIO207_MC4_DAT4 | PIN_INPUT_PULLUP,
81
82 /* UART2, console */
83 GPIO29_U2_RXD | PIN_INPUT_PULLUP,
84 GPIO30_U2_TXD | PIN_OUTPUT_HIGH,
85 GPIO31_U2_CTSn | PIN_INPUT_PULLUP,
86 GPIO32_U2_RTSn | PIN_OUTPUT_HIGH,
87
88 /*
89 * USB, pin 256-267 USB, Is probably already setup correctly from
90 * BootROM/boot stages, but we don't trust that and set it up anyway
91 */
92 GPIO256_USB_NXT,
93 GPIO257_USB_STP,
94 GPIO258_USB_XCLK,
95 GPIO259_USB_DIR,
96 GPIO260_USB_DAT7,
97 GPIO261_USB_DAT6,
98 GPIO262_USB_DAT5,
99 GPIO263_USB_DAT4,
100 GPIO264_USB_DAT3,
101 GPIO265_USB_DAT2,
102 GPIO266_USB_DAT1,
103 GPIO267_USB_DAT0,
104};
105
106unsigned long gpio_cfg_snowball[] = {
107 /* MMC0 (MicroSD card) */
108 GPIO217_GPIO | PIN_OUTPUT_HIGH, /* MMC_EN */
109 GPIO218_GPIO | PIN_INPUT_NOPULL, /* MMC_CD */
110 GPIO228_GPIO | PIN_OUTPUT_HIGH, /* SD_SEL */
111
112 /* eMMC */
113 GPIO167_GPIO | PIN_OUTPUT_HIGH, /* RSTn_MLC */
114
115 /* LAN */
116 GPIO131_SM_ADQ8,
117 GPIO132_SM_ADQ9,
118 GPIO133_SM_ADQ10,
119 GPIO134_SM_ADQ11,
120 GPIO135_SM_ADQ12,
121 GPIO136_SM_ADQ13,
122 GPIO137_SM_ADQ14,
123 GPIO138_SM_ADQ15,
124
125 /* RSTn_LAN */
126 GPIO141_GPIO | PIN_OUTPUT_HIGH,
127};
128
129/*
130 * Miscellaneous platform dependent initialisations
131 */
132
133int board_init(void)
134{
135 /*
136 * Setup board (bd) and board-info (bi).
137 * bi_arch_number: Unique id for this board. It will passed in r1 to
138 * Linux startup code and is the machine_id.
139 * bi_boot_params: Where this board expects params.
140 */
141 gd->bd->bi_arch_number = MACH_TYPE_SNOWBALL;
142 gd->bd->bi_boot_params = 0x00000100;
143
144 /* Configure GPIO pins needed by U-boot */
145 db8500_gpio_config_pins(gpio_cfg_common, ARRAY_SIZE(gpio_cfg_common));
146
147 db8500_gpio_config_pins(gpio_cfg_snowball,
148 ARRAY_SIZE(gpio_cfg_snowball));
149
150 return 0;
151}
152
153int dram_init(void)
154{
155 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
156 gd->ram_size = gd->bd->bi_dram[0].size =
157 get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE);
158
159 return 0;
160}
Mathieu J. Poiriercc1bb792012-07-31 08:59:28 +0000161
162static int raise_ab8500_gpio16(void)
163{
164 int ret;
165
166 /* selection */
167 ret = ab8500_read(AB8500_MISC, AB8500_GPIO_SEL2_REG);
168 if (ret < 0)
169 goto out;
170
171 ret |= 0x80;
172 ret = ab8500_write(AB8500_MISC, AB8500_GPIO_SEL2_REG, ret);
173 if (ret < 0)
174 goto out;
175
176 /* direction */
177 ret = ab8500_read(AB8500_MISC, AB8500_GPIO_DIR2_REG);
178 if (ret < 0)
179 goto out;
180
181 ret |= 0x80;
182 ret = ab8500_write(AB8500_MISC, AB8500_GPIO_DIR2_REG, ret);
183 if (ret < 0)
184 goto out;
185
186 /* out */
187 ret = ab8500_read(AB8500_MISC, AB8500_GPIO_OUT2_REG);
188 if (ret < 0)
189 goto out;
190
191 ret |= 0x80;
192 ret = ab8500_write(AB8500_MISC, AB8500_GPIO_OUT2_REG, ret);
193
194out:
195 return ret;
196}
197
198static int raise_ab8500_gpio26(void)
199{
200 int ret;
201
202 /* selection */
203 ret = ab8500_read(AB8500_MISC, AB8500_GPIO_DIR4_REG);
204 if (ret < 0)
205 goto out;
206
207 ret |= 0x2;
208 ret = ab8500_write(AB8500_MISC, AB8500_GPIO_DIR4_REG, ret);
209 if (ret < 0)
210 goto out;
211
212 /* out */
213 ret = ab8500_read(AB8500_MISC, AB8500_GPIO_OUT4_REG);
214 if (ret < 0)
215 goto out;
216
217 ret |= 0x2;
218 ret = ab8500_write(AB8500_MISC, AB8500_GPIO_OUT4_REG, ret);
219
220out:
221 return ret;
222}
223
224int board_late_init(void)
225{
226 /* enable 3V3 for LAN controller */
227 if (raise_ab8500_gpio26() >= 0) {
228 /* Turn on FSMC device */
229 writel(0x1, 0x8000f000);
230 writel(0x1, 0x8000f008);
231
232 /* setup FSMC for LAN controler */
233 writel(0x305b, 0x80000000);
234
235 /* run at the highest possible speed */
236 writel(0x01010210, 0x80000004);
237 } else
238 printf("error: can't raise GPIO26\n");
239
240 /* enable 3v6 for GBF chip */
241 if ((raise_ab8500_gpio16() < 0))
242 printf("error: cant' raise GPIO16\n");
243
Ramesh Chandrasekaranfd3682a2012-09-10 20:28:27 +0000244 /* empty UART RX FIFO */
245 while (tstc())
246 (void) getc();
247
John Rigby03f609b2012-07-31 08:59:31 +0000248 return 0;
249}
250
Mathieu J. Poiriera50f83b2012-07-31 08:59:30 +0000251#ifdef CONFIG_MMC
John Rigby03f609b2012-07-31 08:59:31 +0000252/*
253 * emmc_host_init - initialize the emmc controller.
254 * Configure GPIO settings, set initial clock and power for emmc slot.
255 * Initialize mmc struct and register with mmc framework.
256 */
257static int emmc_host_init(void)
258{
259 struct pl180_mmc_host *host;
260
261 host = malloc(sizeof(struct pl180_mmc_host));
262 if (!host)
263 return -ENOMEM;
264 memset(host, 0, sizeof(*host));
265
266 host->base = (struct sdi_registers *)CFG_EMMC_BASE;
267 host->pwr_init = SDI_PWR_OPD | SDI_PWR_PWRCTRL_ON;
268 host->clkdiv_init = SDI_CLKCR_CLKDIV_INIT_V2 |
269 SDI_CLKCR_CLKEN | SDI_CLKCR_HWFC_EN;
270 strcpy(host->name, "EMMC");
271 host->caps = MMC_MODE_8BIT | MMC_MODE_HS | MMC_MODE_HS_52MHz;
272 host->voltages = VOLTAGE_WINDOW_MMC;
273 host->clock_min = ARM_MCLK / (2 + SDI_CLKCR_CLKDIV_INIT_V2);
274 host->clock_max = ARM_MCLK / 2;
275 host->clock_in = ARM_MCLK;
276 host->version2 = 1;
277
278 return arm_pl180_mmci_init(host);
279}
280
281/*
282 * mmc_host_init - initialize the external mmc controller.
283 * Configure GPIO settings, set initial clock and power for mmc slot.
284 * Initialize mmc struct and register with mmc framework.
285 */
286static int mmc_host_init(void)
287{
288 struct pl180_mmc_host *host;
289 u32 sdi_u32;
290
291 host = malloc(sizeof(struct pl180_mmc_host));
292 if (!host)
293 return -ENOMEM;
294 memset(host, 0, sizeof(*host));
295
296 host->base = (struct sdi_registers *)CFG_MMC_BASE;
297 sdi_u32 = 0xBF;
298 writel(sdi_u32, &host->base->power);
299 host->pwr_init = 0xBF;
300 host->clkdiv_init = SDI_CLKCR_CLKDIV_INIT_V2 |
301 SDI_CLKCR_CLKEN | SDI_CLKCR_HWFC_EN;
302 strcpy(host->name, "MMC");
303 host->caps = MMC_MODE_8BIT;
304 host->b_max = 0;
305 host->voltages = VOLTAGE_WINDOW_SD;
306 host->clock_min = ARM_MCLK / (2 + SDI_CLKCR_CLKDIV_INIT_V2);
307 host->clock_max = ARM_MCLK / 2;
308 host->clock_in = ARM_MCLK;
309 host->version2 = 1;
310
311 return arm_pl180_mmci_init(host);
312}
313
314/*
315 * board_mmc_init - initialize all the mmc/sd host controllers.
316 * Called by generic mmc framework.
317 */
318int board_mmc_init(bd_t *bis)
319{
320 int error;
321
322 (void) bis;
323
324 error = emmc_host_init();
325 if (error) {
326 printf("emmc_host_init() %d\n", error);
327 return -1;
328 }
329
Mathieu J. Poiriera50f83b2012-07-31 08:59:30 +0000330 u8500_mmc_power_init();
John Rigby03f609b2012-07-31 08:59:31 +0000331
332 error = mmc_host_init();
333 if (error) {
334 printf("mmc_host_init() %d\n", error);
335 return -1;
336 }
Mathieu J. Poiriera50f83b2012-07-31 08:59:30 +0000337
Mathieu J. Poiriercc1bb792012-07-31 08:59:28 +0000338 return 0;
339}
John Rigby03f609b2012-07-31 08:59:31 +0000340#endif /* CONFIG_MMC */