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git01.mediatek.com / filogic / uboot / 4a036fee92864b730e0a749bcf413305deb52634 / . / board / st-ericsson / snowball / snowball.c
blob: 4bcc649724b65ae22a36f8031353aed0f6fb8186 [file] [log] [blame]
Mathieu J. Poirier4a036fe2012-08-03 11:05:12 +0000[diff] [blame^]1/*
2 * Copyright (C) ST-Ericsson SA 2009
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19#include <config.h>
20#include <common.h>
21#include <malloc.h>
22#include <i2c.h>
23#include <mmc.h>
24#include <asm/types.h>
25#include <asm/io.h>
26#include <asm/errno.h>
27#include <asm/arch/db8500_pincfg.h>
28
29#include "db8500_pins.h"
30
31/*
32 * Get a global data pointer
33 */
34DECLARE_GLOBAL_DATA_PTR;
35
36/*
37 * Memory controller register
38 */
39#define DMC_BASE_ADDR 0x80156000
40#define DMC_CTL_97 (DMC_BASE_ADDR + 0x184)
41
42/*
43 * GPIO pin config common for MOP500/HREF boards
44 */
45unsigned long gpio_cfg_common[] = {
46 /* I2C */
47 GPIO147_I2C0_SCL,
48 GPIO148_I2C0_SDA,
49 GPIO16_I2C1_SCL,
50 GPIO17_I2C1_SDA,
51 GPIO10_I2C2_SDA,
52 GPIO11_I2C2_SCL,
53 GPIO229_I2C3_SDA,
54 GPIO230_I2C3_SCL,
55
56 /* SSP0, to AB8500 */
57 GPIO143_SSP0_CLK,
58 GPIO144_SSP0_FRM,
59 GPIO145_SSP0_RXD | PIN_PULL_DOWN,
60 GPIO146_SSP0_TXD,
61
62 /* MMC0 (MicroSD card) */
63 GPIO18_MC0_CMDDIR | PIN_OUTPUT_HIGH,
64 GPIO19_MC0_DAT0DIR | PIN_OUTPUT_HIGH,
65 GPIO20_MC0_DAT2DIR | PIN_OUTPUT_HIGH,
66 GPIO21_MC0_DAT31DIR | PIN_OUTPUT_HIGH,
67 GPIO22_MC0_FBCLK | PIN_INPUT_NOPULL,
68 GPIO23_MC0_CLK | PIN_OUTPUT_LOW,
69 GPIO24_MC0_CMD | PIN_INPUT_PULLUP,
70 GPIO25_MC0_DAT0 | PIN_INPUT_PULLUP,
71 GPIO26_MC0_DAT1 | PIN_INPUT_PULLUP,
72 GPIO27_MC0_DAT2 | PIN_INPUT_PULLUP,
73 GPIO28_MC0_DAT3 | PIN_INPUT_PULLUP,
74
75 /* MMC4 (On-board eMMC) */
76 GPIO197_MC4_DAT3 | PIN_INPUT_PULLUP,
77 GPIO198_MC4_DAT2 | PIN_INPUT_PULLUP,
78 GPIO199_MC4_DAT1 | PIN_INPUT_PULLUP,
79 GPIO200_MC4_DAT0 | PIN_INPUT_PULLUP,
80 GPIO201_MC4_CMD | PIN_INPUT_PULLUP,
81 GPIO202_MC4_FBCLK | PIN_INPUT_NOPULL,
82 GPIO203_MC4_CLK | PIN_OUTPUT_LOW,
83 GPIO204_MC4_DAT7 | PIN_INPUT_PULLUP,
84 GPIO205_MC4_DAT6 | PIN_INPUT_PULLUP,
85 GPIO206_MC4_DAT5 | PIN_INPUT_PULLUP,
86 GPIO207_MC4_DAT4 | PIN_INPUT_PULLUP,
87
88 /* UART2, console */
89 GPIO29_U2_RXD | PIN_INPUT_PULLUP,
90 GPIO30_U2_TXD | PIN_OUTPUT_HIGH,
91 GPIO31_U2_CTSn | PIN_INPUT_PULLUP,
92 GPIO32_U2_RTSn | PIN_OUTPUT_HIGH,
93
94 /*
95 * USB, pin 256-267 USB, Is probably already setup correctly from
96 * BootROM/boot stages, but we don't trust that and set it up anyway
97 */
98 GPIO256_USB_NXT,
99 GPIO257_USB_STP,
100 GPIO258_USB_XCLK,
101 GPIO259_USB_DIR,
102 GPIO260_USB_DAT7,
103 GPIO261_USB_DAT6,
104 GPIO262_USB_DAT5,
105 GPIO263_USB_DAT4,
106 GPIO264_USB_DAT3,
107 GPIO265_USB_DAT2,
108 GPIO266_USB_DAT1,
109 GPIO267_USB_DAT0,
110};
111
112unsigned long gpio_cfg_snowball[] = {
113 /* MMC0 (MicroSD card) */
114 GPIO217_GPIO | PIN_OUTPUT_HIGH, /* MMC_EN */
115 GPIO218_GPIO | PIN_INPUT_NOPULL, /* MMC_CD */
116 GPIO228_GPIO | PIN_OUTPUT_HIGH, /* SD_SEL */
117
118 /* eMMC */
119 GPIO167_GPIO | PIN_OUTPUT_HIGH, /* RSTn_MLC */
120
121 /* LAN */
122 GPIO131_SM_ADQ8,
123 GPIO132_SM_ADQ9,
124 GPIO133_SM_ADQ10,
125 GPIO134_SM_ADQ11,
126 GPIO135_SM_ADQ12,
127 GPIO136_SM_ADQ13,
128 GPIO137_SM_ADQ14,
129 GPIO138_SM_ADQ15,
130
131 /* RSTn_LAN */
132 GPIO141_GPIO | PIN_OUTPUT_HIGH,
133};
134
135/*
136 * Miscellaneous platform dependent initialisations
137 */
138
139int board_init(void)
140{
141 /*
142 * Setup board (bd) and board-info (bi).
143 * bi_arch_number: Unique id for this board. It will passed in r1 to
144 * Linux startup code and is the machine_id.
145 * bi_boot_params: Where this board expects params.
146 */
147 gd->bd->bi_arch_number = MACH_TYPE_SNOWBALL;
148 gd->bd->bi_boot_params = 0x00000100;
149
150 /* Configure GPIO pins needed by U-boot */
151 db8500_gpio_config_pins(gpio_cfg_common, ARRAY_SIZE(gpio_cfg_common));
152
153 db8500_gpio_config_pins(gpio_cfg_snowball,
154 ARRAY_SIZE(gpio_cfg_snowball));
155
156 return 0;
157}
158
159int dram_init(void)
160{
161 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
162 gd->ram_size = gd->bd->bi_dram[0].size =
163 get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE);
164
165 return 0;
166}