Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Jean-Christophe PLAGNIOL-VILLARD | f7e9f92 | 2009-05-22 20:23:51 +0200 | [diff] [blame] | 2 | /* |
Reinhard Meyer | db364ae | 2010-09-14 16:38:57 +0200 | [diff] [blame] | 3 | * (C) Copyright 2010 |
| 4 | * Reinhard Meyer, reinhard.meyer@emk-elektronik.de |
Jean-Christophe PLAGNIOL-VILLARD | f7e9f92 | 2009-05-22 20:23:51 +0200 | [diff] [blame] | 5 | * (C) Copyright 2009 |
| 6 | * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
Jean-Christophe PLAGNIOL-VILLARD | f7e9f92 | 2009-05-22 20:23:51 +0200 | [diff] [blame] | 7 | */ |
| 8 | |
Tom Rini | cb7c5ee | 2024-04-30 07:35:55 -0600 | [diff] [blame] | 9 | #include <config.h> |
Simon Glass | 9758973 | 2020-05-10 11:40:02 -0600 | [diff] [blame] | 10 | #include <init.h> |
Simon Glass | f5c208d | 2019-11-14 12:57:20 -0700 | [diff] [blame] | 11 | #include <vsprintf.h> |
Reinhard Meyer | b06208c | 2010-11-07 13:26:14 +0100 | [diff] [blame] | 12 | #include <asm/io.h> |
Jean-Christophe PLAGNIOL-VILLARD | 23164f1 | 2009-04-16 21:30:44 +0200 | [diff] [blame] | 13 | #include <asm/arch/hardware.h> |
Alexander Stein | 696c73b | 2010-09-13 08:26:39 +0200 | [diff] [blame] | 14 | #include <asm/arch/at91_pit.h> |
Reinhard Meyer | db364ae | 2010-09-14 16:38:57 +0200 | [diff] [blame] | 15 | #include <asm/arch/at91_gpbr.h> |
Jean-Christophe PLAGNIOL-VILLARD | 23164f1 | 2009-04-16 21:30:44 +0200 | [diff] [blame] | 16 | #include <asm/arch/clk.h> |
Jean-Christophe PLAGNIOL-VILLARD | 23164f1 | 2009-04-16 21:30:44 +0200 | [diff] [blame] | 17 | |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 18 | #ifndef CFG_SYS_AT91_MAIN_CLOCK |
| 19 | #define CFG_SYS_AT91_MAIN_CLOCK 0 |
Jean-Christophe PLAGNIOL-VILLARD | df6d53b | 2009-05-31 14:53:18 +0200 | [diff] [blame] | 20 | #endif |
| 21 | |
Jean-Christophe PLAGNIOL-VILLARD | 23164f1 | 2009-04-16 21:30:44 +0200 | [diff] [blame] | 22 | int arch_cpu_init(void) |
| 23 | { |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 24 | return at91_clock_init(CFG_SYS_AT91_MAIN_CLOCK); |
Jean-Christophe PLAGNIOL-VILLARD | 23164f1 | 2009-04-16 21:30:44 +0200 | [diff] [blame] | 25 | } |
Jean-Christophe PLAGNIOL-VILLARD | df6d53b | 2009-05-31 14:53:18 +0200 | [diff] [blame] | 26 | |
Alexander Stein | 696c73b | 2010-09-13 08:26:39 +0200 | [diff] [blame] | 27 | void arch_preboot_os(void) |
| 28 | { |
| 29 | ulong cpiv; |
Reinhard Meyer | e260d0b | 2010-11-03 15:39:55 +0100 | [diff] [blame] | 30 | at91_pit_t *pit = (at91_pit_t *) ATMEL_BASE_PIT; |
Alexander Stein | 696c73b | 2010-09-13 08:26:39 +0200 | [diff] [blame] | 31 | |
| 32 | cpiv = AT91_PIT_MR_PIV_MASK(readl(&pit->piir)); |
| 33 | |
| 34 | /* |
| 35 | * Disable PITC |
| 36 | * Add 0x1000 to current counter to stop it faster |
| 37 | * without waiting for wrapping back to 0 |
| 38 | */ |
| 39 | writel(cpiv + 0x1000, &pit->mr); |
| 40 | } |
| 41 | |
Jean-Christophe PLAGNIOL-VILLARD | df6d53b | 2009-05-31 14:53:18 +0200 | [diff] [blame] | 42 | #if defined(CONFIG_DISPLAY_CPUINFO) |
| 43 | int print_cpuinfo(void) |
| 44 | { |
Heiko Schocher | 62cb156 | 2015-06-29 09:10:46 +0200 | [diff] [blame] | 45 | char __maybe_unused buf[32]; |
Jean-Christophe PLAGNIOL-VILLARD | df6d53b | 2009-05-31 14:53:18 +0200 | [diff] [blame] | 46 | |
Reinhard Meyer | e260d0b | 2010-11-03 15:39:55 +0100 | [diff] [blame] | 47 | printf("CPU: %s\n", ATMEL_CPU_NAME); |
Jean-Christophe PLAGNIOL-VILLARD | df6d53b | 2009-05-31 14:53:18 +0200 | [diff] [blame] | 48 | printf("Crystal frequency: %8s MHz\n", |
| 49 | strmhz(buf, get_main_clk_rate())); |
| 50 | printf("CPU clock : %8s MHz\n", |
| 51 | strmhz(buf, get_cpu_clk_rate())); |
| 52 | printf("Master clock : %8s MHz\n", |
| 53 | strmhz(buf, get_mck_clk_rate())); |
| 54 | |
| 55 | return 0; |
| 56 | } |
| 57 | #endif |