Jean-Christophe PLAGNIOL-VILLARD | f7e9f92 | 2009-05-22 20:23:51 +0200 | [diff] [blame] | 1 | /* |
Reinhard Meyer | db364ae | 2010-09-14 16:38:57 +0200 | [diff] [blame^] | 2 | * (C) Copyright 2010 |
| 3 | * Reinhard Meyer, reinhard.meyer@emk-elektronik.de |
Jean-Christophe PLAGNIOL-VILLARD | f7e9f92 | 2009-05-22 20:23:51 +0200 | [diff] [blame] | 4 | * (C) Copyright 2009 |
| 5 | * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
| 6 | * |
| 7 | * See file CREDITS for list of people who contributed to this |
| 8 | * project. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License as |
| 12 | * published by the Free Software Foundation; either version 2 of |
| 13 | * the License, or (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 23 | * MA 02111-1307 USA |
| 24 | */ |
| 25 | |
Jean-Christophe PLAGNIOL-VILLARD | df6d53b | 2009-05-31 14:53:18 +0200 | [diff] [blame] | 26 | #include <common.h> |
Jens Scharsig | a4db1ca | 2010-02-03 22:46:58 +0100 | [diff] [blame] | 27 | |
Jean-Christophe PLAGNIOL-VILLARD | 23164f1 | 2009-04-16 21:30:44 +0200 | [diff] [blame] | 28 | #include <asm/arch/hardware.h> |
| 29 | #include <asm/arch/at91_pmc.h> |
Reinhard Meyer | db364ae | 2010-09-14 16:38:57 +0200 | [diff] [blame^] | 30 | #include <asm/arch/at91_gpbr.h> |
Jean-Christophe PLAGNIOL-VILLARD | 23164f1 | 2009-04-16 21:30:44 +0200 | [diff] [blame] | 31 | #include <asm/arch/clk.h> |
| 32 | #include <asm/arch/io.h> |
| 33 | |
Achim Ehrlich | 443873d | 2010-02-24 10:29:16 +0100 | [diff] [blame] | 34 | #ifndef CONFIG_SYS_AT91_MAIN_CLOCK |
| 35 | #define CONFIG_SYS_AT91_MAIN_CLOCK 0 |
Jean-Christophe PLAGNIOL-VILLARD | df6d53b | 2009-05-31 14:53:18 +0200 | [diff] [blame] | 36 | #endif |
| 37 | |
Jean-Christophe PLAGNIOL-VILLARD | 23164f1 | 2009-04-16 21:30:44 +0200 | [diff] [blame] | 38 | int arch_cpu_init(void) |
| 39 | { |
Achim Ehrlich | 443873d | 2010-02-24 10:29:16 +0100 | [diff] [blame] | 40 | return at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK); |
Jean-Christophe PLAGNIOL-VILLARD | 23164f1 | 2009-04-16 21:30:44 +0200 | [diff] [blame] | 41 | } |
Jean-Christophe PLAGNIOL-VILLARD | df6d53b | 2009-05-31 14:53:18 +0200 | [diff] [blame] | 42 | |
| 43 | #if defined(CONFIG_DISPLAY_CPUINFO) |
| 44 | int print_cpuinfo(void) |
| 45 | { |
| 46 | char buf[32]; |
| 47 | |
Achim Ehrlich | 443873d | 2010-02-24 10:29:16 +0100 | [diff] [blame] | 48 | printf("CPU: %s\n", CONFIG_SYS_AT91_CPU_NAME); |
Jean-Christophe PLAGNIOL-VILLARD | df6d53b | 2009-05-31 14:53:18 +0200 | [diff] [blame] | 49 | printf("Crystal frequency: %8s MHz\n", |
| 50 | strmhz(buf, get_main_clk_rate())); |
| 51 | printf("CPU clock : %8s MHz\n", |
| 52 | strmhz(buf, get_cpu_clk_rate())); |
| 53 | printf("Master clock : %8s MHz\n", |
| 54 | strmhz(buf, get_mck_clk_rate())); |
| 55 | |
| 56 | return 0; |
| 57 | } |
| 58 | #endif |
Anders Darander | e15c073 | 2010-02-25 15:57:03 +0100 | [diff] [blame] | 59 | |
| 60 | #ifdef CONFIG_BOOTCOUNT_LIMIT |
| 61 | /* |
Reinhard Meyer | db364ae | 2010-09-14 16:38:57 +0200 | [diff] [blame^] | 62 | * We combine the BOOTCOUNT_MAGIC and bootcount in one 32-bit register. |
| 63 | * This is done so we need to use only one of the four GPBR registers. |
Anders Darander | e15c073 | 2010-02-25 15:57:03 +0100 | [diff] [blame] | 64 | */ |
| 65 | void bootcount_store (ulong a) |
| 66 | { |
Reinhard Meyer | db364ae | 2010-09-14 16:38:57 +0200 | [diff] [blame^] | 67 | at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE; |
Anders Darander | e15c073 | 2010-02-25 15:57:03 +0100 | [diff] [blame] | 68 | |
Reinhard Meyer | db364ae | 2010-09-14 16:38:57 +0200 | [diff] [blame^] | 69 | writel((BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff), |
| 70 | &gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]); |
Anders Darander | e15c073 | 2010-02-25 15:57:03 +0100 | [diff] [blame] | 71 | } |
| 72 | |
| 73 | ulong bootcount_load (void) |
| 74 | { |
Reinhard Meyer | db364ae | 2010-09-14 16:38:57 +0200 | [diff] [blame^] | 75 | at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE; |
Anders Darander | e15c073 | 2010-02-25 15:57:03 +0100 | [diff] [blame] | 76 | |
Reinhard Meyer | db364ae | 2010-09-14 16:38:57 +0200 | [diff] [blame^] | 77 | ulong val = readl(&gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]); |
| 78 | if ((val & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000)) |
Anders Darander | e15c073 | 2010-02-25 15:57:03 +0100 | [diff] [blame] | 79 | return 0; |
| 80 | else |
Reinhard Meyer | db364ae | 2010-09-14 16:38:57 +0200 | [diff] [blame^] | 81 | return val & 0x0000ffff; |
Anders Darander | e15c073 | 2010-02-25 15:57:03 +0100 | [diff] [blame] | 82 | } |
| 83 | |
| 84 | #endif /* CONFIG_BOOTCOUNT_LIMIT */ |