blob: 087fe95179ee9f008f361eaa81f909a784a1ddc6 [file] [log] [blame]
Jean-Christophe PLAGNIOL-VILLARDf7e9f922009-05-22 20:23:51 +02001/*
Reinhard Meyerdb364ae2010-09-14 16:38:57 +02002 * (C) Copyright 2010
3 * Reinhard Meyer, reinhard.meyer@emk-elektronik.de
Jean-Christophe PLAGNIOL-VILLARDf7e9f922009-05-22 20:23:51 +02004 * (C) Copyright 2009
5 * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
Jean-Christophe PLAGNIOL-VILLARDdf6d53b2009-05-31 14:53:18 +020026#include <common.h>
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010027
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +020028#include <asm/arch/hardware.h>
29#include <asm/arch/at91_pmc.h>
Reinhard Meyerdb364ae2010-09-14 16:38:57 +020030#include <asm/arch/at91_gpbr.h>
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +020031#include <asm/arch/clk.h>
32#include <asm/arch/io.h>
33
Achim Ehrlich443873d2010-02-24 10:29:16 +010034#ifndef CONFIG_SYS_AT91_MAIN_CLOCK
35#define CONFIG_SYS_AT91_MAIN_CLOCK 0
Jean-Christophe PLAGNIOL-VILLARDdf6d53b2009-05-31 14:53:18 +020036#endif
37
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +020038int arch_cpu_init(void)
39{
Achim Ehrlich443873d2010-02-24 10:29:16 +010040 return at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +020041}
Jean-Christophe PLAGNIOL-VILLARDdf6d53b2009-05-31 14:53:18 +020042
43#if defined(CONFIG_DISPLAY_CPUINFO)
44int print_cpuinfo(void)
45{
46 char buf[32];
47
Achim Ehrlich443873d2010-02-24 10:29:16 +010048 printf("CPU: %s\n", CONFIG_SYS_AT91_CPU_NAME);
Jean-Christophe PLAGNIOL-VILLARDdf6d53b2009-05-31 14:53:18 +020049 printf("Crystal frequency: %8s MHz\n",
50 strmhz(buf, get_main_clk_rate()));
51 printf("CPU clock : %8s MHz\n",
52 strmhz(buf, get_cpu_clk_rate()));
53 printf("Master clock : %8s MHz\n",
54 strmhz(buf, get_mck_clk_rate()));
55
56 return 0;
57}
58#endif
Anders Darandere15c0732010-02-25 15:57:03 +010059
60#ifdef CONFIG_BOOTCOUNT_LIMIT
61/*
Reinhard Meyerdb364ae2010-09-14 16:38:57 +020062 * We combine the BOOTCOUNT_MAGIC and bootcount in one 32-bit register.
63 * This is done so we need to use only one of the four GPBR registers.
Anders Darandere15c0732010-02-25 15:57:03 +010064 */
65void bootcount_store (ulong a)
66{
Reinhard Meyerdb364ae2010-09-14 16:38:57 +020067 at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE;
Anders Darandere15c0732010-02-25 15:57:03 +010068
Reinhard Meyerdb364ae2010-09-14 16:38:57 +020069 writel((BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff),
70 &gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]);
Anders Darandere15c0732010-02-25 15:57:03 +010071}
72
73ulong bootcount_load (void)
74{
Reinhard Meyerdb364ae2010-09-14 16:38:57 +020075 at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE;
Anders Darandere15c0732010-02-25 15:57:03 +010076
Reinhard Meyerdb364ae2010-09-14 16:38:57 +020077 ulong val = readl(&gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]);
78 if ((val & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000))
Anders Darandere15c0732010-02-25 15:57:03 +010079 return 0;
80 else
Reinhard Meyerdb364ae2010-09-14 16:38:57 +020081 return val & 0x0000ffff;
Anders Darandere15c0732010-02-25 15:57:03 +010082}
83
84#endif /* CONFIG_BOOTCOUNT_LIMIT */