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Jean-Christophe PLAGNIOL-VILLARDf7e9f922009-05-22 20:23:51 +02001/*
Reinhard Meyerdb364ae2010-09-14 16:38:57 +02002 * (C) Copyright 2010
3 * Reinhard Meyer, reinhard.meyer@emk-elektronik.de
Jean-Christophe PLAGNIOL-VILLARDf7e9f922009-05-22 20:23:51 +02004 * (C) Copyright 2009
5 * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
Jean-Christophe PLAGNIOL-VILLARDdf6d53b2009-05-31 14:53:18 +020026#include <common.h>
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010027
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +020028#include <asm/arch/hardware.h>
29#include <asm/arch/at91_pmc.h>
Alexander Stein696c73b2010-09-13 08:26:39 +020030#include <asm/arch/at91_pit.h>
Reinhard Meyerdb364ae2010-09-14 16:38:57 +020031#include <asm/arch/at91_gpbr.h>
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +020032#include <asm/arch/clk.h>
33#include <asm/arch/io.h>
34
Achim Ehrlich443873d2010-02-24 10:29:16 +010035#ifndef CONFIG_SYS_AT91_MAIN_CLOCK
36#define CONFIG_SYS_AT91_MAIN_CLOCK 0
Jean-Christophe PLAGNIOL-VILLARDdf6d53b2009-05-31 14:53:18 +020037#endif
38
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +020039int arch_cpu_init(void)
40{
Achim Ehrlich443873d2010-02-24 10:29:16 +010041 return at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +020042}
Jean-Christophe PLAGNIOL-VILLARDdf6d53b2009-05-31 14:53:18 +020043
Alexander Stein696c73b2010-09-13 08:26:39 +020044void arch_preboot_os(void)
45{
46 ulong cpiv;
Reinhard Meyere260d0b2010-11-03 15:39:55 +010047 at91_pit_t *pit = (at91_pit_t *) ATMEL_BASE_PIT;
Alexander Stein696c73b2010-09-13 08:26:39 +020048
49 cpiv = AT91_PIT_MR_PIV_MASK(readl(&pit->piir));
50
51 /*
52 * Disable PITC
53 * Add 0x1000 to current counter to stop it faster
54 * without waiting for wrapping back to 0
55 */
56 writel(cpiv + 0x1000, &pit->mr);
57}
58
Jean-Christophe PLAGNIOL-VILLARDdf6d53b2009-05-31 14:53:18 +020059#if defined(CONFIG_DISPLAY_CPUINFO)
60int print_cpuinfo(void)
61{
62 char buf[32];
63
Reinhard Meyere260d0b2010-11-03 15:39:55 +010064 printf("CPU: %s\n", ATMEL_CPU_NAME);
Jean-Christophe PLAGNIOL-VILLARDdf6d53b2009-05-31 14:53:18 +020065 printf("Crystal frequency: %8s MHz\n",
66 strmhz(buf, get_main_clk_rate()));
67 printf("CPU clock : %8s MHz\n",
68 strmhz(buf, get_cpu_clk_rate()));
69 printf("Master clock : %8s MHz\n",
70 strmhz(buf, get_mck_clk_rate()));
71
72 return 0;
73}
74#endif
Anders Darandere15c0732010-02-25 15:57:03 +010075
76#ifdef CONFIG_BOOTCOUNT_LIMIT
77/*
Reinhard Meyerdb364ae2010-09-14 16:38:57 +020078 * We combine the BOOTCOUNT_MAGIC and bootcount in one 32-bit register.
79 * This is done so we need to use only one of the four GPBR registers.
Anders Darandere15c0732010-02-25 15:57:03 +010080 */
81void bootcount_store (ulong a)
82{
Reinhard Meyere260d0b2010-11-03 15:39:55 +010083 at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR;
Anders Darandere15c0732010-02-25 15:57:03 +010084
Reinhard Meyerdb364ae2010-09-14 16:38:57 +020085 writel((BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff),
86 &gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]);
Anders Darandere15c0732010-02-25 15:57:03 +010087}
88
89ulong bootcount_load (void)
90{
Reinhard Meyere260d0b2010-11-03 15:39:55 +010091 at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR;
Anders Darandere15c0732010-02-25 15:57:03 +010092
Reinhard Meyerdb364ae2010-09-14 16:38:57 +020093 ulong val = readl(&gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]);
94 if ((val & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000))
Anders Darandere15c0732010-02-25 15:57:03 +010095 return 0;
96 else
Reinhard Meyerdb364ae2010-09-14 16:38:57 +020097 return val & 0x0000ffff;
Anders Darandere15c0732010-02-25 15:57:03 +010098}
99
100#endif /* CONFIG_BOOTCOUNT_LIMIT */