blob: 063831dfe873a8b9115969d4cf0ea1d56ec6c090 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Rob Herring73089ad2011-10-24 08:50:20 +00002/*
3 * Copyright 2010-2011 Calxeda, Inc.
Rob Herring73089ad2011-10-24 08:50:20 +00004 */
5
6#include <common.h>
7#include <ahci.h>
Simon Glass1d91ba72019-11-14 12:57:37 -07008#include <cpu_func.h>
Simon Glass5e6201b2019-08-01 09:46:51 -06009#include <env.h>
Simon Glass2dc9c342020-05-10 11:40:01 -060010#include <fdt_support.h>
Simon Glass97589732020-05-10 11:40:02 -060011#include <init.h>
Simon Glass274e0b02020-05-10 11:39:56 -060012#include <net.h>
Rob Herring12db8022012-02-21 12:52:26 +000013#include <netdev.h>
Rob Herring73089ad2011-10-24 08:50:20 +000014#include <scsi.h>
15
Alexey Brodkin267d8e22014-02-26 17:47:58 +040016#include <linux/sizes.h>
Rob Herring02fe7852012-02-01 16:57:54 +000017#include <asm/io.h>
Rob Herring73089ad2011-10-24 08:50:20 +000018
Rob Herringfd7ec6e2013-06-12 22:24:52 -050019#define HB_AHCI_BASE 0xffe08000
20
Rob Herring37057562015-06-05 00:58:42 +010021#define HB_SCU_A9_PWR_STATUS 0xfff10008
Rob Herringf9904ce2012-02-01 16:57:55 +000022#define HB_SREG_A9_PWR_REQ 0xfff3cf00
Rob Herring06d00742012-02-01 16:57:57 +000023#define HB_SREG_A9_BOOT_SRC_STAT 0xfff3cf04
Rob Herringfd7ec6e2013-06-12 22:24:52 -050024#define HB_SREG_A9_PWRDOM_STAT 0xfff3cf20
Mark Langsdorf1a707a22015-06-05 00:58:43 +010025#define HB_SREG_A15_PWR_CTRL 0xfff3c200
Rob Herringfd7ec6e2013-06-12 22:24:52 -050026
Rob Herringf9904ce2012-02-01 16:57:55 +000027#define HB_PWR_SUSPEND 0
28#define HB_PWR_SOFT_RESET 1
29#define HB_PWR_HARD_RESET 2
30#define HB_PWR_SHUTDOWN 3
31
Rob Herringfd7ec6e2013-06-12 22:24:52 -050032#define PWRDOM_STAT_SATA 0x80000000
33#define PWRDOM_STAT_PCI 0x40000000
34#define PWRDOM_STAT_EMMC 0x20000000
35
Rob Herring37057562015-06-05 00:58:42 +010036#define HB_SCU_A9_PWR_NORMAL 0
37#define HB_SCU_A9_PWR_DORMANT 2
38#define HB_SCU_A9_PWR_OFF 3
39
Rob Herring73089ad2011-10-24 08:50:20 +000040DECLARE_GLOBAL_DATA_PTR;
41
Mark Langsdorff913ff52015-06-05 00:58:49 +010042void cphy_disable_overrides(void);
43
Rob Herring73089ad2011-10-24 08:50:20 +000044/*
45 * Miscellaneous platform dependent initialisations
46 */
47int board_init(void)
48{
49 icache_enable();
50
51 return 0;
52}
53
Rob Herring6fd09422011-12-15 11:15:50 +000054/* We know all the init functions have been run now */
55int board_eth_init(bd_t *bis)
56{
57 int rc = 0;
58
59#ifdef CONFIG_CALXEDA_XGMAC
60 rc += calxedaxgmac_initialize(0, 0xfff50000);
61 rc += calxedaxgmac_initialize(1, 0xfff51000);
62#endif
63 return rc;
64}
65
Ian Campbell5af74b62014-03-07 01:20:57 +000066#ifdef CONFIG_SCSI_AHCI_PLAT
67void scsi_init(void)
Rob Herring73089ad2011-10-24 08:50:20 +000068{
Rob Herringfd7ec6e2013-06-12 22:24:52 -050069 u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
Rob Herring06d00742012-02-01 16:57:57 +000070
Mark Langsdorff913ff52015-06-05 00:58:49 +010071 cphy_disable_overrides();
Rob Herringfd7ec6e2013-06-12 22:24:52 -050072 if (reg & PWRDOM_STAT_SATA) {
Scott Wood16519a32015-04-17 09:19:01 -050073 ahci_init((void __iomem *)HB_AHCI_BASE);
Simon Glass48228732017-06-14 21:28:41 -060074 scsi_scan(true);
Rob Herringfd7ec6e2013-06-12 22:24:52 -050075 }
Ian Campbell5af74b62014-03-07 01:20:57 +000076}
77#endif
78
79#ifdef CONFIG_MISC_INIT_R
80int misc_init_r(void)
81{
82 char envbuffer[16];
83 u32 boot_choice;
Rob Herring06d00742012-02-01 16:57:57 +000084
85 boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff;
86 sprintf(envbuffer, "bootcmd%d", boot_choice);
Simon Glass64b723f2017-08-03 12:22:12 -060087 if (env_get(envbuffer)) {
Rob Herring06d00742012-02-01 16:57:57 +000088 sprintf(envbuffer, "run bootcmd%d", boot_choice);
Simon Glass6a38e412017-08-03 12:22:09 -060089 env_set("bootcmd", envbuffer);
Rob Herring06d00742012-02-01 16:57:57 +000090 } else
Simon Glass6a38e412017-08-03 12:22:09 -060091 env_set("bootcmd", "");
Rob Herring06d00742012-02-01 16:57:57 +000092
Rob Herring73089ad2011-10-24 08:50:20 +000093 return 0;
94}
Rob Herring13b17c32013-06-12 22:24:53 -050095#endif
Rob Herring73089ad2011-10-24 08:50:20 +000096
97int dram_init(void)
98{
99 gd->ram_size = SZ_512M;
100 return 0;
101}
102
Rob Herringfd7ec6e2013-06-12 22:24:52 -0500103#if defined(CONFIG_OF_BOARD_SETUP)
Simon Glass2aec3cc2014-10-23 18:58:47 -0600104int ft_board_setup(void *fdt, bd_t *bd)
Rob Herringfd7ec6e2013-06-12 22:24:52 -0500105{
106 static const char disabled[] = "disabled";
107 u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
108
109 if (!(reg & PWRDOM_STAT_SATA))
110 do_fixup_by_compat(fdt, "calxeda,hb-ahci", "status",
111 disabled, sizeof(disabled), 1);
112
113 if (!(reg & PWRDOM_STAT_EMMC))
114 do_fixup_by_compat(fdt, "calxeda,hb-sdhci", "status",
115 disabled, sizeof(disabled), 1);
Simon Glass2aec3cc2014-10-23 18:58:47 -0600116
117 return 0;
Rob Herringfd7ec6e2013-06-12 22:24:52 -0500118}
119#endif
120
Mark Langsdorf1a707a22015-06-05 00:58:43 +0100121static int is_highbank(void)
122{
123 uint32_t midr;
124
125 asm volatile ("mrc p15, 0, %0, c0, c0, 0\n" : "=r"(midr));
126
127 return (midr & 0xfff0) == 0xc090;
128}
129
Rob Herring73089ad2011-10-24 08:50:20 +0000130void reset_cpu(ulong addr)
131{
Rob Herringf9904ce2012-02-01 16:57:55 +0000132 writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ);
Mark Langsdorf1a707a22015-06-05 00:58:43 +0100133 if (is_highbank())
134 writeb(HB_SCU_A9_PWR_OFF, HB_SCU_A9_PWR_STATUS);
135 else
136 writel(0x1, HB_SREG_A15_PWR_CTRL);
Rob Herring35139602012-12-02 17:06:22 +0000137
138 wfi();
Rob Herring73089ad2011-10-24 08:50:20 +0000139}
Mark Langsdorff913ff52015-06-05 00:58:49 +0100140
141/*
142 * turn off the override before transferring control to Linux, since Linux
143 * may not support spread spectrum.
144 */
145void arch_preboot_os(void)
146{
147 cphy_disable_overrides();
148}