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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Rob Herring73089ad2011-10-24 08:50:20 +00002/*
3 * Copyright 2010-2011 Calxeda, Inc.
Rob Herring73089ad2011-10-24 08:50:20 +00004 */
5
6#include <common.h>
7#include <ahci.h>
Simon Glass1d91ba72019-11-14 12:57:37 -07008#include <cpu_func.h>
Simon Glass5e6201b2019-08-01 09:46:51 -06009#include <env.h>
Simon Glass2dc9c342020-05-10 11:40:01 -060010#include <fdt_support.h>
Simon Glass274e0b02020-05-10 11:39:56 -060011#include <net.h>
Rob Herring12db8022012-02-21 12:52:26 +000012#include <netdev.h>
Rob Herring73089ad2011-10-24 08:50:20 +000013#include <scsi.h>
14
Alexey Brodkin267d8e22014-02-26 17:47:58 +040015#include <linux/sizes.h>
Rob Herring02fe7852012-02-01 16:57:54 +000016#include <asm/io.h>
Rob Herring73089ad2011-10-24 08:50:20 +000017
Rob Herringfd7ec6e2013-06-12 22:24:52 -050018#define HB_AHCI_BASE 0xffe08000
19
Rob Herring37057562015-06-05 00:58:42 +010020#define HB_SCU_A9_PWR_STATUS 0xfff10008
Rob Herringf9904ce2012-02-01 16:57:55 +000021#define HB_SREG_A9_PWR_REQ 0xfff3cf00
Rob Herring06d00742012-02-01 16:57:57 +000022#define HB_SREG_A9_BOOT_SRC_STAT 0xfff3cf04
Rob Herringfd7ec6e2013-06-12 22:24:52 -050023#define HB_SREG_A9_PWRDOM_STAT 0xfff3cf20
Mark Langsdorf1a707a22015-06-05 00:58:43 +010024#define HB_SREG_A15_PWR_CTRL 0xfff3c200
Rob Herringfd7ec6e2013-06-12 22:24:52 -050025
Rob Herringf9904ce2012-02-01 16:57:55 +000026#define HB_PWR_SUSPEND 0
27#define HB_PWR_SOFT_RESET 1
28#define HB_PWR_HARD_RESET 2
29#define HB_PWR_SHUTDOWN 3
30
Rob Herringfd7ec6e2013-06-12 22:24:52 -050031#define PWRDOM_STAT_SATA 0x80000000
32#define PWRDOM_STAT_PCI 0x40000000
33#define PWRDOM_STAT_EMMC 0x20000000
34
Rob Herring37057562015-06-05 00:58:42 +010035#define HB_SCU_A9_PWR_NORMAL 0
36#define HB_SCU_A9_PWR_DORMANT 2
37#define HB_SCU_A9_PWR_OFF 3
38
Rob Herring73089ad2011-10-24 08:50:20 +000039DECLARE_GLOBAL_DATA_PTR;
40
Mark Langsdorff913ff52015-06-05 00:58:49 +010041void cphy_disable_overrides(void);
42
Rob Herring73089ad2011-10-24 08:50:20 +000043/*
44 * Miscellaneous platform dependent initialisations
45 */
46int board_init(void)
47{
48 icache_enable();
49
50 return 0;
51}
52
Rob Herring6fd09422011-12-15 11:15:50 +000053/* We know all the init functions have been run now */
54int board_eth_init(bd_t *bis)
55{
56 int rc = 0;
57
58#ifdef CONFIG_CALXEDA_XGMAC
59 rc += calxedaxgmac_initialize(0, 0xfff50000);
60 rc += calxedaxgmac_initialize(1, 0xfff51000);
61#endif
62 return rc;
63}
64
Ian Campbell5af74b62014-03-07 01:20:57 +000065#ifdef CONFIG_SCSI_AHCI_PLAT
66void scsi_init(void)
Rob Herring73089ad2011-10-24 08:50:20 +000067{
Rob Herringfd7ec6e2013-06-12 22:24:52 -050068 u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
Rob Herring06d00742012-02-01 16:57:57 +000069
Mark Langsdorff913ff52015-06-05 00:58:49 +010070 cphy_disable_overrides();
Rob Herringfd7ec6e2013-06-12 22:24:52 -050071 if (reg & PWRDOM_STAT_SATA) {
Scott Wood16519a32015-04-17 09:19:01 -050072 ahci_init((void __iomem *)HB_AHCI_BASE);
Simon Glass48228732017-06-14 21:28:41 -060073 scsi_scan(true);
Rob Herringfd7ec6e2013-06-12 22:24:52 -050074 }
Ian Campbell5af74b62014-03-07 01:20:57 +000075}
76#endif
77
78#ifdef CONFIG_MISC_INIT_R
79int misc_init_r(void)
80{
81 char envbuffer[16];
82 u32 boot_choice;
Rob Herring06d00742012-02-01 16:57:57 +000083
84 boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff;
85 sprintf(envbuffer, "bootcmd%d", boot_choice);
Simon Glass64b723f2017-08-03 12:22:12 -060086 if (env_get(envbuffer)) {
Rob Herring06d00742012-02-01 16:57:57 +000087 sprintf(envbuffer, "run bootcmd%d", boot_choice);
Simon Glass6a38e412017-08-03 12:22:09 -060088 env_set("bootcmd", envbuffer);
Rob Herring06d00742012-02-01 16:57:57 +000089 } else
Simon Glass6a38e412017-08-03 12:22:09 -060090 env_set("bootcmd", "");
Rob Herring06d00742012-02-01 16:57:57 +000091
Rob Herring73089ad2011-10-24 08:50:20 +000092 return 0;
93}
Rob Herring13b17c32013-06-12 22:24:53 -050094#endif
Rob Herring73089ad2011-10-24 08:50:20 +000095
96int dram_init(void)
97{
98 gd->ram_size = SZ_512M;
99 return 0;
100}
101
Rob Herringfd7ec6e2013-06-12 22:24:52 -0500102#if defined(CONFIG_OF_BOARD_SETUP)
Simon Glass2aec3cc2014-10-23 18:58:47 -0600103int ft_board_setup(void *fdt, bd_t *bd)
Rob Herringfd7ec6e2013-06-12 22:24:52 -0500104{
105 static const char disabled[] = "disabled";
106 u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
107
108 if (!(reg & PWRDOM_STAT_SATA))
109 do_fixup_by_compat(fdt, "calxeda,hb-ahci", "status",
110 disabled, sizeof(disabled), 1);
111
112 if (!(reg & PWRDOM_STAT_EMMC))
113 do_fixup_by_compat(fdt, "calxeda,hb-sdhci", "status",
114 disabled, sizeof(disabled), 1);
Simon Glass2aec3cc2014-10-23 18:58:47 -0600115
116 return 0;
Rob Herringfd7ec6e2013-06-12 22:24:52 -0500117}
118#endif
119
Mark Langsdorf1a707a22015-06-05 00:58:43 +0100120static int is_highbank(void)
121{
122 uint32_t midr;
123
124 asm volatile ("mrc p15, 0, %0, c0, c0, 0\n" : "=r"(midr));
125
126 return (midr & 0xfff0) == 0xc090;
127}
128
Rob Herring73089ad2011-10-24 08:50:20 +0000129void reset_cpu(ulong addr)
130{
Rob Herringf9904ce2012-02-01 16:57:55 +0000131 writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ);
Mark Langsdorf1a707a22015-06-05 00:58:43 +0100132 if (is_highbank())
133 writeb(HB_SCU_A9_PWR_OFF, HB_SCU_A9_PWR_STATUS);
134 else
135 writel(0x1, HB_SREG_A15_PWR_CTRL);
Rob Herring35139602012-12-02 17:06:22 +0000136
137 wfi();
Rob Herring73089ad2011-10-24 08:50:20 +0000138}
Mark Langsdorff913ff52015-06-05 00:58:49 +0100139
140/*
141 * turn off the override before transferring control to Linux, since Linux
142 * may not support spread spectrum.
143 */
144void arch_preboot_os(void)
145{
146 cphy_disable_overrides();
147}