blob: eca1d06ca5dcbfc68298c2e08817c034174467fc [file] [log] [blame]
York Sun149eb332016-09-26 08:09:27 -07001config ARCH_LS1021A
York Sunfcd0e742016-10-04 14:31:47 -07002 bool
York Sun149eb332016-09-26 08:09:27 -07003 select SYS_FSL_ERRATUM_A010315
York Sun6b62ef02016-10-04 18:01:34 -07004 select SYS_FSL_SRDS_1
5 select SYS_HAS_SERDES
York Sund297d392016-12-28 08:43:40 -08006 select SYS_FSL_DDR_BE if SYS_FSL_DDR
7 select SYS_FSL_DDR_VER_50 if SYS_FSL_DDR
8 select SYS_FSL_HAS_DDR3 if SYS_FSL_DDR
9 select SYS_FSL_HAS_DDR4 if SYS_FSL_DDR
York Sun92c36e22016-12-28 08:43:30 -080010 select SYS_FSL_HAS_SEC
11 select SYS_FSL_SEC_COMPAT_5
York Sunfa4199422016-12-28 08:43:31 -080012 select SYS_FSL_SEC_LE
York Sun4de7e932016-09-26 08:09:29 -070013
York Sun4dd8c612016-10-04 14:31:48 -070014menu "LS102xA architecture"
15 depends on ARCH_LS1021A
16
York Sun4de7e932016-09-26 08:09:29 -070017config LS1_DEEP_SLEEP
York Sunfcd0e742016-10-04 14:31:47 -070018 bool "Deep sleep"
19 depends on ARCH_LS1021A
York Sun4dd8c612016-10-04 14:31:48 -070020
York Sunf188d222016-10-04 14:45:01 -070021config MAX_CPUS
22 int "Maximum number of CPUs permitted for LS102xA"
23 depends on ARCH_LS1021A
24 default 2
25 help
26 Set this number to the maximum number of possible CPUs in the SoC.
27 SoCs may have multiple clusters with each cluster may have multiple
28 ports. If some ports are reserved but higher ports are used for
29 cores, count the reserved ports. This will allocate enough memory
30 in spin table to properly handle all cores.
31
York Sunf64fc5c2016-10-04 18:04:37 -070032config NUM_DDR_CONTROLLERS
33 int "Maximum DDR controllers"
34 default 1
35
York Sundfa93a92016-12-02 09:31:43 -080036config SECURE_BOOT
37 bool "Secure Boot"
38 help
39 Enable Freescale Secure Boot feature. Normally selected
40 by defconfig. If unsure, do not change.
41
York Sun4dd8c612016-10-04 14:31:48 -070042config SYS_FSL_ERRATUM_A010315
43 bool "Workaround for PCIe erratum A010315"
44
York Sun6b62ef02016-10-04 18:01:34 -070045config SYS_FSL_SRDS_1
46 bool
47
48config SYS_FSL_SRDS_2
49 bool
50
51config SYS_HAS_SERDES
52 bool
York Sunf64fc5c2016-10-04 18:04:37 -070053
York Sune7310a32016-10-04 14:45:54 -070054config SYS_FSL_IFC_BANK_COUNT
55 int "Maximum banks of Integrated flash controller"
56 depends on ARCH_LS1021A
57 default 8
58
York Sun4dd8c612016-10-04 14:31:48 -070059endmenu