Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 1 | /* |
Enric Balletbò i Serra | 19f9df8 | 2012-03-05 11:32:16 +0000 | [diff] [blame] | 2 | * Common configuration settings for IGEP technology based boards |
| 3 | * |
| 4 | * (C) Copyright 2012 |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 5 | * ISEE 2007 SL, <www.iseebcn.com> |
| 6 | * |
Wolfgang Denk | bd8ec7e | 2013-10-07 13:07:26 +0200 | [diff] [blame] | 7 | * SPDX-License-Identifier: GPL-2.0+ |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 8 | */ |
| 9 | |
Enric Balletbò i Serra | 19f9df8 | 2012-03-05 11:32:16 +0000 | [diff] [blame] | 10 | #ifndef __IGEP00X0_H |
| 11 | #define __IGEP00X0_H |
| 12 | |
Enric Balletbò i Serra | ed11648 | 2013-12-06 21:30:24 +0100 | [diff] [blame] | 13 | #define CONFIG_NR_DRAM_BANKS 2 |
Ladislav Michl | 43a6062 | 2016-07-12 20:28:32 +0200 | [diff] [blame] | 14 | #define CONFIG_NAND |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 15 | |
Enric Balletbò i Serra | ed11648 | 2013-12-06 21:30:24 +0100 | [diff] [blame] | 16 | #include <configs/ti_omap3_common.h> |
Enric Balletbo i Serra | 74fea92 | 2013-02-07 00:40:05 +0000 | [diff] [blame] | 17 | #include <asm/mach-types.h> |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 18 | |
Tom Rini | cfff4aa | 2016-08-26 13:30:43 -0400 | [diff] [blame] | 19 | /* |
| 20 | * We are only ever GP parts and will utilize all of the "downloaded image" |
| 21 | * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB). |
| 22 | */ |
Enric Balletbo i Serra | 8aa10d4 | 2016-05-03 08:59:24 +0200 | [diff] [blame] | 23 | #undef CONFIG_SPL_TEXT_BASE |
Enric Balletbo i Serra | 8aa10d4 | 2016-05-03 08:59:24 +0200 | [diff] [blame] | 24 | #define CONFIG_SPL_TEXT_BASE 0x40200000 |
| 25 | |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 26 | #define CONFIG_MISC_INIT_R |
| 27 | |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 28 | #define CONFIG_REVISION_TAG 1 |
| 29 | |
Enric Balletbo i Serra | 3bb41cc | 2015-02-24 19:27:15 +0100 | [diff] [blame] | 30 | /* Status LED available for IGEP0020 and IGEP0030 but not IGEP0032 */ |
| 31 | #if (CONFIG_MACH_TYPE != MACH_TYPE_IGEP0032) |
Enric Balletbo i Serra | a66c887 | 2015-01-28 15:01:32 +0100 | [diff] [blame] | 32 | #define CONFIG_STATUS_LED |
| 33 | #define CONFIG_BOARD_SPECIFIC_LED |
| 34 | #define CONFIG_GPIO_LED |
| 35 | #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) |
| 36 | #define RED_LED_GPIO 27 |
Enric Balletbo i Serra | 3bb41cc | 2015-02-24 19:27:15 +0100 | [diff] [blame] | 37 | #elif (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030) |
Enric Balletbo i Serra | a66c887 | 2015-01-28 15:01:32 +0100 | [diff] [blame] | 38 | #define RED_LED_GPIO 16 |
Enric Balletbo i Serra | 3bb41cc | 2015-02-24 19:27:15 +0100 | [diff] [blame] | 39 | #else |
| 40 | #error "status LED not defined for this machine." |
Enric Balletbo i Serra | 02043a7 | 2013-02-07 00:40:06 +0000 | [diff] [blame] | 41 | #endif |
Ladislav Michl | 06c1cd0 | 2016-01-04 23:08:01 +0100 | [diff] [blame] | 42 | #define RED_LED_DEV 0 |
Enric Balletbo i Serra | a66c887 | 2015-01-28 15:01:32 +0100 | [diff] [blame] | 43 | #define STATUS_LED_BIT RED_LED_GPIO |
| 44 | #define STATUS_LED_STATE STATUS_LED_ON |
| 45 | #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) |
| 46 | #define STATUS_LED_BOOT RED_LED_DEV |
Enric Balletbo i Serra | 3bb41cc | 2015-02-24 19:27:15 +0100 | [diff] [blame] | 47 | #endif |
Javier Martinez Canillas | d549ace | 2012-12-27 03:36:01 +0000 | [diff] [blame] | 48 | |
Enric Balletbo i Serra | 12fcb8c | 2014-01-25 22:52:22 +0100 | [diff] [blame] | 49 | /* GPIO banks */ |
| 50 | #define CONFIG_OMAP3_GPIO_3 /* GPIO64 .. 95 is in GPIO bank 3 */ |
| 51 | #define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO bank 5 */ |
| 52 | #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */ |
| 53 | |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 54 | /* USB */ |
Ladislav Michl | 06c1cd0 | 2016-01-04 23:08:01 +0100 | [diff] [blame] | 55 | #define CONFIG_USB_MUSB_UDC 1 |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 56 | #define CONFIG_USB_OMAP3 1 |
| 57 | #define CONFIG_TWL4030_USB 1 |
| 58 | |
| 59 | /* USB device configuration */ |
| 60 | #define CONFIG_USB_DEVICE 1 |
| 61 | #define CONFIG_USB_TTY 1 |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 62 | |
| 63 | /* Change these to suit your needs */ |
| 64 | #define CONFIG_USBD_VENDORID 0x0451 |
| 65 | #define CONFIG_USBD_PRODUCTID 0x5678 |
| 66 | #define CONFIG_USBD_MANUFACTURER "Texas Instruments" |
| 67 | #define CONFIG_USBD_PRODUCT_NAME "IGEP" |
| 68 | |
Ladislav Michl | 43a6062 | 2016-07-12 20:28:32 +0200 | [diff] [blame] | 69 | #define CONFIG_CMD_MTDPARTS |
| 70 | #define CONFIG_CMD_ONENAND |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 71 | |
Enric Balletbò i Serra | a5d75f7 | 2015-09-07 08:28:09 +0200 | [diff] [blame] | 72 | #ifndef CONFIG_SPL_BUILD |
| 73 | |
Enric Balletbò i Serra | a5d75f7 | 2015-09-07 08:28:09 +0200 | [diff] [blame] | 74 | /* Environment */ |
| 75 | #define ENV_DEVICE_SETTINGS \ |
| 76 | "stdin=serial\0" \ |
| 77 | "stdout=serial\0" \ |
| 78 | "stderr=serial\0" |
| 79 | |
| 80 | #define MEM_LAYOUT_SETTINGS \ |
| 81 | DEFAULT_LINUX_BOOT_ENV \ |
| 82 | "scriptaddr=0x87E00000\0" \ |
| 83 | "pxefile_addr_r=0x87F00000\0" |
| 84 | |
| 85 | #define BOOT_TARGET_DEVICES(func) \ |
| 86 | func(MMC, mmc, 0) |
| 87 | |
| 88 | #include <config_distro_bootcmd.h> |
| 89 | |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 90 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Enric Balletbò i Serra | a5d75f7 | 2015-09-07 08:28:09 +0200 | [diff] [blame] | 91 | ENV_DEVICE_SETTINGS \ |
| 92 | MEM_LAYOUT_SETTINGS \ |
| 93 | BOOTENV |
Enric Balletbo i Serra | 4adf801 | 2011-04-19 09:16:36 -0400 | [diff] [blame] | 94 | |
Enric Balletbò i Serra | a5d75f7 | 2015-09-07 08:28:09 +0200 | [diff] [blame] | 95 | #endif |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 96 | |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 97 | /* |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 98 | * SMSC911x Ethernet |
| 99 | */ |
| 100 | #if defined(CONFIG_CMD_NET) |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 101 | #define CONFIG_SMC911X |
| 102 | #define CONFIG_SMC911X_32_BIT |
Ladislav Michl | 06c1cd0 | 2016-01-04 23:08:01 +0100 | [diff] [blame] | 103 | #define CONFIG_SMC911X_BASE 0x2C000000 |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 104 | #endif /* (CONFIG_CMD_NET) */ |
| 105 | |
Ladislav Michl | 43a6062 | 2016-07-12 20:28:32 +0200 | [diff] [blame] | 106 | #define CONFIG_RBTREE |
| 107 | #define CONFIG_MTD_PARTITIONS |
Ladislav Michl | c44e29f | 2016-07-12 20:28:33 +0200 | [diff] [blame] | 108 | #define CONFIG_SYS_MTDPARTS_RUNTIME |
Javier Martinez Canillas | 361fc83 | 2012-07-28 01:19:34 +0000 | [diff] [blame] | 109 | |
Ladislav Michl | 43a6062 | 2016-07-12 20:28:32 +0200 | [diff] [blame] | 110 | /* OneNAND config */ |
Ladislav Michl | 43a6062 | 2016-07-12 20:28:32 +0200 | [diff] [blame] | 111 | #define CONFIG_USE_ONENAND_BOARD_INIT |
| 112 | #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP |
| 113 | #define CONFIG_SYS_ONENAND_BLOCK_SIZE (128*1024) |
Javier Martinez Canillas | 361fc83 | 2012-07-28 01:19:34 +0000 | [diff] [blame] | 114 | |
Ladislav Michl | 43a6062 | 2016-07-12 20:28:32 +0200 | [diff] [blame] | 115 | /* NAND config */ |
Ladislav Michl | 43a6062 | 2016-07-12 20:28:32 +0200 | [diff] [blame] | 116 | #define CONFIG_SPL_OMAP3_ID_NAND |
Stefano Babic | 0cd4118 | 2015-07-26 15:18:15 +0200 | [diff] [blame] | 117 | #define CONFIG_SYS_NAND_BUSWIDTH_16BIT |
Javier Martinez Canillas | 361fc83 | 2012-07-28 01:19:34 +0000 | [diff] [blame] | 118 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE |
| 119 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 |
| 120 | #define CONFIG_SYS_NAND_PAGE_SIZE 2048 |
| 121 | #define CONFIG_SYS_NAND_OOBSIZE 64 |
| 122 | #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) |
Ladislav Michl | 8ed5b0b | 2015-10-12 18:09:14 +0200 | [diff] [blame] | 123 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS |
| 124 | #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ |
| 125 | 10, 11, 12, 13, 14, 15, 16, 17, \ |
| 126 | 18, 19, 20, 21, 22, 23, 24, 25, \ |
| 127 | 26, 27, 28, 29, 30, 31, 32, 33, \ |
| 128 | 34, 35, 36, 37, 38, 39, 40, 41, \ |
| 129 | 42, 43, 44, 45, 46, 47, 48, 49, \ |
| 130 | 50, 51, 52, 53, 54, 55, 56, 57, } |
Javier Martinez Canillas | 361fc83 | 2012-07-28 01:19:34 +0000 | [diff] [blame] | 131 | #define CONFIG_SYS_NAND_ECCSIZE 512 |
Ladislav Michl | 8ed5b0b | 2015-10-12 18:09:14 +0200 | [diff] [blame] | 132 | #define CONFIG_SYS_NAND_ECCBYTES 14 |
| 133 | #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |
| 134 | #define CONFIG_NAND_OMAP_GPMC |
| 135 | #define CONFIG_BCH |
| 136 | |
Ladislav Michl | 43a6062 | 2016-07-12 20:28:32 +0200 | [diff] [blame] | 137 | /* UBI configuration */ |
| 138 | #define CONFIG_SPL_UBI 1 |
| 139 | #define CONFIG_SPL_UBI_MAX_VOL_LEBS 256 |
| 140 | #define CONFIG_SPL_UBI_MAX_PEB_SIZE (256*1024) |
| 141 | #define CONFIG_SPL_UBI_MAX_PEBS 4096 |
| 142 | #define CONFIG_SPL_UBI_VOL_IDS 8 |
| 143 | #define CONFIG_SPL_UBI_LOAD_MONITOR_ID 0 |
| 144 | #define CONFIG_SPL_UBI_LOAD_KERNEL_ID 3 |
| 145 | #define CONFIG_SPL_UBI_LOAD_ARGS_ID 4 |
| 146 | #define CONFIG_SPL_UBI_PEB_OFFSET 4 |
| 147 | #define CONFIG_SPL_UBI_VID_OFFSET 512 |
| 148 | #define CONFIG_SPL_UBI_LEB_START 2048 |
| 149 | #define CONFIG_SPL_UBI_INFO_ADDR 0x88080000 |
| 150 | |
| 151 | /* environment organization */ |
| 152 | #define CONFIG_ENV_IS_IN_UBI 1 |
| 153 | #define CONFIG_ENV_UBI_PART "UBI" |
| 154 | #define CONFIG_ENV_UBI_VOLUME "config" |
| 155 | #define CONFIG_ENV_UBI_VOLUME_REDUND "config_r" |
| 156 | #define CONFIG_UBI_SILENCE_MSG 1 |
| 157 | #define CONFIG_UBIFS_SILENCE_MSG 1 |
| 158 | #define CONFIG_ENV_SIZE (32*1024) |
| 159 | |
Enric Balletbò i Serra | 19f9df8 | 2012-03-05 11:32:16 +0000 | [diff] [blame] | 160 | #endif /* __IGEP00X0_H */ |