commit 8aa10d480f01b00023010cf2234600677bc7728b
author Enric Balletbo i Serra <enric.balletbo@collabora.com> Tue May 03 08:59:24 2016 +0200
committer Tom Rini <trini@konsulko.com> Tue May 03 12:17:13 2016 -0400
tree 7ad331a83b49e2ea694073d79052389fc7b172ef
parent ddd347709a6f24ff902eee210b97695b888badcc

igep00x0: Use the SRAM available for SPL.

Move CONFIG_SPL_TEXT_BASE down to 0x40200000 and set CONFIG_SPL_MAX_SIZE
to (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE), so that it's clear
what the limit is.

This will also help some compilers to fit all the code into the allocated
space.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>

include/configs/omap3_igep00x0.h

diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h
index 5da50a5..9bd8915 100644
--- a/include/configs/omap3_igep00x0.h
+++ b/include/configs/omap3_igep00x0.h
@@ -19,6 +19,13 @@
 #include <configs/ti_omap3_common.h>
 #include <asm/mach-types.h>
 
+/* SRAM starts at 0x40200000 and ends at 0x4020FFFF (64KB) */
+#undef CONFIG_SPL_MAX_SIZE
+#undef CONFIG_SPL_TEXT_BASE
+
+#define CONFIG_SPL_MAX_SIZE		(SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE)
+#define CONFIG_SPL_TEXT_BASE		0x40200000
+
 /*
  * Display CPU and Board information
  */