Rafal Jaworowski | d3a02c3 | 2007-07-27 14:43:59 +0200 | [diff] [blame] | 1 | /* |
Detlev Zundel | 00c2716 | 2010-01-21 17:55:58 +0100 | [diff] [blame] | 2 | * (C) Copyright 2007-2010 DENX Software Engineering |
Rafal Jaworowski | d3a02c3 | 2007-07-27 14:43:59 +0200 | [diff] [blame] | 3 | * Copyright (C) 2004-2006 Freescale Semiconductor, Inc. |
Rafal Jaworowski | d3a02c3 | 2007-07-27 14:43:59 +0200 | [diff] [blame] | 4 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
Rafal Jaworowski | d3a02c3 | 2007-07-27 14:43:59 +0200 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | /* |
| 9 | * CPU specific code for the MPC512x family. |
| 10 | * |
| 11 | * Derived from the MPC83xx code. |
| 12 | */ |
| 13 | |
| 14 | #include <common.h> |
| 15 | #include <command.h> |
Heiko Schocher | 50219e6 | 2009-03-26 07:33:59 +0100 | [diff] [blame] | 16 | #include <net.h> |
Ben Warren | b664dea | 2008-08-31 10:36:38 -0700 | [diff] [blame] | 17 | #include <netdev.h> |
Rafal Jaworowski | d3a02c3 | 2007-07-27 14:43:59 +0200 | [diff] [blame] | 18 | #include <asm/processor.h> |
Detlev Zundel | 00c2716 | 2010-01-21 17:55:58 +0100 | [diff] [blame] | 19 | #include <asm/io.h> |
Rafal Jaworowski | d3a02c3 | 2007-07-27 14:43:59 +0200 | [diff] [blame] | 20 | |
Grzegorz Bernacki | af554d8 | 2008-01-08 17:16:15 +0100 | [diff] [blame] | 21 | #if defined(CONFIG_OF_LIBFDT) |
| 22 | #include <fdt_support.h> |
| 23 | #endif |
| 24 | |
Rafal Jaworowski | d3a02c3 | 2007-07-27 14:43:59 +0200 | [diff] [blame] | 25 | DECLARE_GLOBAL_DATA_PTR; |
| 26 | |
| 27 | int checkcpu (void) |
| 28 | { |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 29 | volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; |
Rafal Jaworowski | d3a02c3 | 2007-07-27 14:43:59 +0200 | [diff] [blame] | 30 | ulong clock = gd->cpu_clk; |
| 31 | u32 pvr = get_pvr (); |
Detlev Zundel | 00c2716 | 2010-01-21 17:55:58 +0100 | [diff] [blame] | 32 | u32 spridr = in_be32(&immr->sysconf.spridr); |
Wolfgang Denk | 2059104 | 2008-10-19 02:35:49 +0200 | [diff] [blame] | 33 | char buf1[32], buf2[32]; |
Rafal Jaworowski | d3a02c3 | 2007-07-27 14:43:59 +0200 | [diff] [blame] | 34 | |
Wolfgang Denk | e4a56a5 | 2007-08-12 21:34:34 +0200 | [diff] [blame] | 35 | puts ("CPU: "); |
Rafal Jaworowski | d3a02c3 | 2007-07-27 14:43:59 +0200 | [diff] [blame] | 36 | |
| 37 | switch (spridr & 0xffff0000) { |
| 38 | case SPR_5121E: |
| 39 | puts ("MPC5121e "); |
| 40 | break; |
| 41 | default: |
| 42 | printf ("Unknown part ID %08x ", spridr & 0xffff0000); |
| 43 | } |
| 44 | printf ("rev. %d.%d, Core ", SVR_MJREV (spridr), SVR_MNREV (spridr)); |
| 45 | |
| 46 | switch (pvr & 0xffff0000) { |
| 47 | case PVR_E300C4: |
| 48 | puts ("e300c4 "); |
| 49 | break; |
| 50 | default: |
| 51 | puts ("unknown "); |
| 52 | } |
Detlev Zundel | a2ea276 | 2010-01-22 14:47:59 +0100 | [diff] [blame] | 53 | printf ("at %s MHz, CSB at %s MHz (RSR=0x%04lx)\n", |
Wolfgang Denk | 2059104 | 2008-10-19 02:35:49 +0200 | [diff] [blame] | 54 | strmhz(buf1, clock), |
Simon Glass | 6c6cbd1 | 2012-12-13 20:48:54 +0000 | [diff] [blame] | 55 | strmhz(buf2, gd->arch.csb_clk), |
Simon Glass | 4d6eaa3 | 2012-12-13 20:48:56 +0000 | [diff] [blame] | 56 | gd->arch.reset_status & 0xffff); |
Rafal Jaworowski | d3a02c3 | 2007-07-27 14:43:59 +0200 | [diff] [blame] | 57 | return 0; |
| 58 | } |
| 59 | |
| 60 | |
| 61 | int |
Wolfgang Denk | 6262d021 | 2010-06-28 22:00:46 +0200 | [diff] [blame] | 62 | do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
Rafal Jaworowski | d3a02c3 | 2007-07-27 14:43:59 +0200 | [diff] [blame] | 63 | { |
| 64 | ulong msr; |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 65 | volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; |
Rafal Jaworowski | d3a02c3 | 2007-07-27 14:43:59 +0200 | [diff] [blame] | 66 | |
| 67 | /* Interrupts and MMU off */ |
| 68 | __asm__ __volatile__ ("mfmsr %0":"=r" (msr):); |
| 69 | |
| 70 | msr &= ~( MSR_EE | MSR_IR | MSR_DR); |
| 71 | __asm__ __volatile__ ("mtmsr %0"::"r" (msr)); |
| 72 | |
| 73 | /* |
| 74 | * Enable Reset Control Reg - "RSTE" is the magic word that let us go |
| 75 | */ |
Detlev Zundel | 00c2716 | 2010-01-21 17:55:58 +0100 | [diff] [blame] | 76 | out_be32(&immap->reset.rpr, 0x52535445); |
Rafal Jaworowski | d3a02c3 | 2007-07-27 14:43:59 +0200 | [diff] [blame] | 77 | |
| 78 | /* Verify Reset Control Reg is enabled */ |
Detlev Zundel | 00c2716 | 2010-01-21 17:55:58 +0100 | [diff] [blame] | 79 | while (!(in_be32(&immap->reset.rcer) & RCER_CRE)) |
Rafal Jaworowski | d3a02c3 | 2007-07-27 14:43:59 +0200 | [diff] [blame] | 80 | ; |
| 81 | |
| 82 | printf ("Resetting the board.\n"); |
| 83 | udelay(200); |
| 84 | |
| 85 | /* Perform reset */ |
Detlev Zundel | 00c2716 | 2010-01-21 17:55:58 +0100 | [diff] [blame] | 86 | out_be32(&immap->reset.rcr, RCR_SWHR); |
Rafal Jaworowski | d3a02c3 | 2007-07-27 14:43:59 +0200 | [diff] [blame] | 87 | |
| 88 | /* Unreached... */ |
| 89 | return 1; |
| 90 | } |
| 91 | |
| 92 | |
| 93 | /* |
| 94 | * Get timebase clock frequency (like cpu_clk in Hz) |
| 95 | */ |
| 96 | unsigned long get_tbclk (void) |
| 97 | { |
Masahiro Yamada | 04cfea5 | 2016-09-06 22:17:38 +0900 | [diff] [blame] | 98 | return (gd->bus_clk + 3L) / 4L; |
Rafal Jaworowski | d3a02c3 | 2007-07-27 14:43:59 +0200 | [diff] [blame] | 99 | } |
| 100 | |
| 101 | |
| 102 | #if defined(CONFIG_WATCHDOG) |
| 103 | void watchdog_reset (void) |
| 104 | { |
| 105 | int re_enable = disable_interrupts (); |
| 106 | |
| 107 | /* Reset watchdog */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 108 | volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; |
Detlev Zundel | 00c2716 | 2010-01-21 17:55:58 +0100 | [diff] [blame] | 109 | out_be32(&immr->wdt.swsrr, 0x556c); |
| 110 | out_be32(&immr->wdt.swsrr, 0xaa39); |
Rafal Jaworowski | d3a02c3 | 2007-07-27 14:43:59 +0200 | [diff] [blame] | 111 | |
| 112 | if (re_enable) |
| 113 | enable_interrupts (); |
| 114 | } |
| 115 | #endif |
Grzegorz Bernacki | af554d8 | 2008-01-08 17:16:15 +0100 | [diff] [blame] | 116 | |
| 117 | #ifdef CONFIG_OF_LIBFDT |
John Rigby | d096f62 | 2008-08-05 17:38:57 -0600 | [diff] [blame] | 118 | |
| 119 | #ifdef CONFIG_OF_SUPPORT_OLD_DEVICE_TREES |
| 120 | /* |
| 121 | * fdt setup for old device trees |
| 122 | * fix up |
| 123 | * cpu clocks |
| 124 | * soc clocks |
| 125 | * ethernet addresses |
| 126 | */ |
| 127 | static void old_ft_cpu_setup(void *blob, bd_t *bd) |
Grzegorz Bernacki | af554d8 | 2008-01-08 17:16:15 +0100 | [diff] [blame] | 128 | { |
John Rigby | d096f62 | 2008-08-05 17:38:57 -0600 | [diff] [blame] | 129 | /* |
| 130 | * avoid fixing up by path because that |
| 131 | * produces scary error messages |
| 132 | */ |
Mike Frysinger | f4aa436 | 2009-02-11 19:18:41 -0500 | [diff] [blame] | 133 | uchar enetaddr[6]; |
John Rigby | d096f62 | 2008-08-05 17:38:57 -0600 | [diff] [blame] | 134 | |
| 135 | /* |
| 136 | * old device trees have ethernet nodes with |
| 137 | * device_type = "network" |
| 138 | */ |
Mike Frysinger | f4aa436 | 2009-02-11 19:18:41 -0500 | [diff] [blame] | 139 | eth_getenv_enetaddr("ethaddr", enetaddr); |
John Rigby | d096f62 | 2008-08-05 17:38:57 -0600 | [diff] [blame] | 140 | do_fixup_by_prop(blob, "device_type", "network", 8, |
Mike Frysinger | f4aa436 | 2009-02-11 19:18:41 -0500 | [diff] [blame] | 141 | "local-mac-address", enetaddr, 6, 0); |
John Rigby | d096f62 | 2008-08-05 17:38:57 -0600 | [diff] [blame] | 142 | do_fixup_by_prop(blob, "device_type", "network", 8, |
Mike Frysinger | f4aa436 | 2009-02-11 19:18:41 -0500 | [diff] [blame] | 143 | "address", enetaddr, 6, 0); |
John Rigby | d096f62 | 2008-08-05 17:38:57 -0600 | [diff] [blame] | 144 | /* |
| 145 | * old device trees have soc nodes with |
| 146 | * device_type = "soc" |
| 147 | */ |
| 148 | do_fixup_by_prop_u32(blob, "device_type", "soc", 4, |
| 149 | "bus-frequency", bd->bi_ipsfreq, 0); |
| 150 | } |
| 151 | #endif |
| 152 | |
| 153 | static void ft_clock_setup(void *blob, bd_t *bd) |
| 154 | { |
Martha Marx | fd449ab | 2008-05-29 14:23:25 -0400 | [diff] [blame] | 155 | char *cpu_path = "/cpus/" OF_CPU; |
Grzegorz Bernacki | af554d8 | 2008-01-08 17:16:15 +0100 | [diff] [blame] | 156 | |
John Rigby | d096f62 | 2008-08-05 17:38:57 -0600 | [diff] [blame] | 157 | /* |
| 158 | * fixup cpu clocks using path |
| 159 | */ |
| 160 | do_fixup_by_path_u32(blob, cpu_path, |
| 161 | "timebase-frequency", OF_TBCLK, 1); |
| 162 | do_fixup_by_path_u32(blob, cpu_path, |
| 163 | "bus-frequency", bd->bi_busfreq, 1); |
| 164 | do_fixup_by_path_u32(blob, cpu_path, |
| 165 | "clock-frequency", bd->bi_intfreq, 1); |
| 166 | /* |
| 167 | * fixup soc clocks using compatible |
| 168 | */ |
| 169 | do_fixup_by_compat_u32(blob, OF_SOC_COMPAT, |
| 170 | "bus-frequency", bd->bi_ipsfreq, 1); |
| 171 | } |
John Rigby | fc807c5 | 2008-01-30 13:36:57 -0700 | [diff] [blame] | 172 | |
John Rigby | d096f62 | 2008-08-05 17:38:57 -0600 | [diff] [blame] | 173 | void ft_cpu_setup(void *blob, bd_t *bd) |
| 174 | { |
| 175 | #ifdef CONFIG_OF_SUPPORT_OLD_DEVICE_TREES |
| 176 | old_ft_cpu_setup(blob, bd); |
| 177 | #endif |
| 178 | ft_clock_setup(blob, bd); |
| 179 | #ifdef CONFIG_HAS_ETH0 |
Kumar Gala | fabda92 | 2008-08-19 15:41:18 -0500 | [diff] [blame] | 180 | fdt_fixup_ethernet(blob); |
John Rigby | d096f62 | 2008-08-05 17:38:57 -0600 | [diff] [blame] | 181 | #endif |
Heiko Schocher | 733b48d | 2009-12-03 11:20:06 +0100 | [diff] [blame] | 182 | fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); |
Grzegorz Bernacki | af554d8 | 2008-01-08 17:16:15 +0100 | [diff] [blame] | 183 | } |
| 184 | #endif |
Ben Warren | b664dea | 2008-08-31 10:36:38 -0700 | [diff] [blame] | 185 | |
| 186 | #ifdef CONFIG_MPC512x_FEC |
| 187 | /* Default initializations for FEC controllers. To override, |
| 188 | * create a board-specific function called: |
| 189 | * int board_eth_init(bd_t *bis) |
| 190 | */ |
| 191 | |
| 192 | int cpu_eth_init(bd_t *bis) |
| 193 | { |
| 194 | return mpc512x_fec_initialize(bis); |
| 195 | } |
| 196 | #endif |