blob: b074cc6c51ebc2cdff14676ffefdf80fd5ee675f [file] [log] [blame]
Tom Rinie33610c2021-12-14 13:36:35 -05001config ARCH_MAP_SYSMEM
Tom Rini53320122022-04-06 09:21:25 -04002 depends on SANDBOX
Tom Rinie33610c2021-12-14 13:36:35 -05003 def_bool y
4
Masahiro Yamada58654502015-07-15 20:59:29 +09005config CREATE_ARCH_SYMLINK
6 bool
7
Masahiro Yamada332b8292016-06-28 10:48:42 +09008config HAVE_ARCH_IOREMAP
9 bool
10
Tom Rini3ef67ae2021-08-26 11:47:59 -040011config SYS_CACHE_SHIFT_4
12 bool
13
14config SYS_CACHE_SHIFT_5
15 bool
16
17config SYS_CACHE_SHIFT_6
18 bool
19
20config SYS_CACHE_SHIFT_7
21 bool
22
23config SYS_CACHELINE_SIZE
24 int
25 default 128 if SYS_CACHE_SHIFT_7
26 default 64 if SYS_CACHE_SHIFT_6
27 default 32 if SYS_CACHE_SHIFT_5
28 default 16 if SYS_CACHE_SHIFT_4
29 # Fall-back for MIPS
30 default 32 if MIPS
31
Simon Glassb87153c2020-12-16 21:20:06 -070032config LINKER_LIST_ALIGN
33 int
34 default 32 if SANDBOX
35 default 8 if ARM64 || X86
36 default 4
37 help
38 Force the each linker list to be aligned to this boundary. This
39 is required if ll_entry_get() is used, since otherwise the linker
40 may add padding into the table, thus breaking it.
41 See linker_lists.rst for full details.
42
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090043choice
44 prompt "Architecture select"
45 default SANDBOX
46
47config ARC
48 bool "ARC architecture"
Michal Simek84f3dec2018-07-23 15:55:13 +020049 select ARC_TIMER
Vlad Zakharova465df72017-03-21 14:49:49 +030050 select CLK
Michal Simekd5d59bd2020-08-19 10:44:20 +020051 select DM
Michal Simek84f3dec2018-07-23 15:55:13 +020052 select HAVE_PRIVATE_LIBGCC
53 select SUPPORT_OF_CONTROL
Tom Rini3ef67ae2021-08-26 11:47:59 -040054 select SYS_CACHE_SHIFT_7
Vlad Zakharova465df72017-03-21 14:49:49 +030055 select TIMER
Tom Rini7b7e0ad2022-07-31 21:08:23 -040056 select SYS_BIG_ENDIAN if CPU_BIG_ENDIAN
57 select SYS_LITTLE_ENDIAN if !CPU_BIG_ENDIAN
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090058
59config ARM
60 bool "ARM architecture"
Marek Behún4778a582021-05-20 13:24:22 +020061 select ARCH_SUPPORTS_LTO
Masahiro Yamada58654502015-07-15 20:59:29 +090062 select CREATE_ARCH_SYMLINK
Masahiro Yamada06280592015-07-03 16:13:09 +090063 select HAVE_PRIVATE_LIBGCC if !ARM64
Simon Glasse170f682021-12-01 09:02:38 -070064 select SUPPORT_ACPI
Masahiro Yamada9fadbc82014-09-22 19:59:05 +090065 select SUPPORT_OF_CONTROL
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090066
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090067config M68K
68 bool "M68000 architecture"
angelo@sysam.it5e798172015-12-06 17:47:59 +010069 select HAVE_PRIVATE_LIBGCC
Michal Simek27d66cf2020-11-04 15:33:20 +010070 select NEEDS_MANUAL_RELOC
Derald D. Woodseb730bd2018-01-22 17:17:10 -060071 select SYS_BOOT_GET_CMDLINE
72 select SYS_BOOT_GET_KBD
Tom Rini3ef67ae2021-08-26 11:47:59 -040073 select SYS_CACHE_SHIFT_4
Angelo Dureghelloe007b152019-03-13 21:46:51 +010074 select SUPPORT_OF_CONTROL
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090075
76config MICROBLAZE
77 bool "MicroBlaze architecture"
Masahiro Yamada9fadbc82014-09-22 19:59:05 +090078 select SUPPORT_OF_CONTROL
Michal Simeke8e52772022-06-24 14:16:32 +020079 imply CMD_TIMER
80 imply SPL_REGMAP if SPL
81 imply SPL_TIMER if SPL
82 imply TIMER
83 imply XILINX_TIMER
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090084
85config MIPS
86 bool "MIPS architecture"
Masahiro Yamada332b8292016-06-28 10:48:42 +090087 select HAVE_ARCH_IOREMAP
Masahiro Yamada9520b712014-10-24 01:30:43 +090088 select HAVE_PRIVATE_LIBGCC
Daniel Schwierzeckde5b6e22015-12-19 20:20:48 +010089 select SUPPORT_OF_CONTROL
Sean Anderson13871e12022-04-12 10:59:04 -040090 select SPL_SEPARATE_BSS if SPL
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090091
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090092config NIOS2
93 bool "Nios II architecture"
Thomas Chouc6170262015-10-21 21:34:57 +080094 select CPU
Michal Simek84f3dec2018-07-23 15:55:13 +020095 select DM
Simon Glassfc557362022-03-04 08:43:05 -070096 imply DM_EVENT
Michal Simek84f3dec2018-07-23 15:55:13 +020097 select OF_CONTROL
98 select SUPPORT_OF_CONTROL
Michal Simek2e7c8192018-07-23 15:55:14 +020099 imply CMD_DM
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900100
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900101config PPC
102 bool "PowerPC architecture"
Masahiro Yamada9520b712014-10-24 01:30:43 +0900103 select HAVE_PRIVATE_LIBGCC
Simon Glass90f83c82015-02-07 11:51:35 -0700104 select SUPPORT_OF_CONTROL
Derald D. Woodseb730bd2018-01-22 17:17:10 -0600105 select SYS_BOOT_GET_CMDLINE
106 select SYS_BOOT_GET_KBD
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900107
Rick Chen3301bfc2017-12-26 13:55:58 +0800108config RISCV
Bin Meng6b697752018-09-26 06:55:06 -0700109 bool "RISC-V architecture"
Anup Patel0af3e852019-02-25 08:14:04 +0000110 select CREATE_ARCH_SYMLINK
Rick Chen3301bfc2017-12-26 13:55:58 +0800111 select SUPPORT_OF_CONTROL
Bin Menga760eba2018-09-26 06:55:19 -0700112 select OF_CONTROL
113 select DM
Sean Anderson13871e12022-04-12 10:59:04 -0400114 select SPL_SEPARATE_BSS if SPL
Bin Meng3880c382018-09-26 06:55:20 -0700115 imply DM_SERIAL
Simon Glassfc557362022-03-04 08:43:05 -0700116 imply DM_EVENT
Bin Meng3880c382018-09-26 06:55:20 -0700117 imply DM_MMC
118 imply DM_SPI
119 imply DM_SPI_FLASH
120 imply BLK
121 imply CLK
122 imply MTD
123 imply TIMER
Bin Menga760eba2018-09-26 06:55:19 -0700124 imply CMD_DM
Lukas Auer396f0bd2019-08-21 21:14:45 +0200125 imply SPL_DM
126 imply SPL_OF_CONTROL
127 imply SPL_LIBCOMMON_SUPPORT
128 imply SPL_LIBGENERIC_SUPPORT
Simon Glassf4d60392021-08-08 12:20:12 -0600129 imply SPL_SERIAL
Lukas Auer396f0bd2019-08-21 21:14:45 +0200130 imply SPL_TIMER
Rick Chen3301bfc2017-12-26 13:55:58 +0800131
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900132config SANDBOX
133 bool "Sandbox"
Marek Behún72434932021-05-20 13:24:07 +0200134 select ARCH_SUPPORTS_LTO
Tom Rini22d567e2017-01-22 19:43:11 -0500135 select BOARD_LATE_INIT
Michael Walle8ffe86c2020-05-22 14:07:38 +0200136 select BZIP2
Heinrich Schuchardtfedf6562020-10-27 20:29:22 +0100137 select CMD_POWEROFF
Masahiro Yamada5ef5ccc2015-03-31 12:47:53 +0900138 select DM
Andrew Scull451b8b12022-05-30 10:00:12 +0000139 select DM_FUZZING_ENGINE
Michal Simek84f3dec2018-07-23 15:55:13 +0200140 select DM_GPIO
141 select DM_I2C
Masahiro Yamadab11b2352016-09-08 18:47:35 +0900142 select DM_KEYBOARD
Michal Simek84f3dec2018-07-23 15:55:13 +0200143 select DM_MMC
Masahiro Yamada5ef5ccc2015-03-31 12:47:53 +0900144 select DM_SERIAL
Masahiro Yamada5ef5ccc2015-03-31 12:47:53 +0900145 select DM_SPI
Michal Simek84f3dec2018-07-23 15:55:13 +0200146 select DM_SPI_FLASH
Michael Walle8ffe86c2020-05-22 14:07:38 +0200147 select GZIP_COMPRESSED
Tom Rini6a4a9082022-11-19 18:45:23 -0500148 select IO_TRACE
Tom Rinic20bb732017-07-22 18:36:16 -0400149 select LZO
Heinrich Schuchardta3fc9a42020-03-14 12:13:40 +0100150 select OF_BOARD_SETUP
Ramon Friedc64f19b2019-04-27 11:15:23 +0300151 select PCI_ENDPOINT
Michal Simek84f3dec2018-07-23 15:55:13 +0200152 select SPI
153 select SUPPORT_OF_CONTROL
Heinrich Schuchardtfedf6562020-10-27 20:29:22 +0100154 select SYSRESET_CMD_POWEROFF
Tom Rini3ef67ae2021-08-26 11:47:59 -0400155 select SYS_CACHE_SHIFT_4
Wasim Khan4dab60b2021-03-08 16:48:16 +0100156 select IRQ
Kory Maincent965a34f2021-05-04 19:31:23 +0200157 select SUPPORT_EXTENSION_SCAN
Simon Glassa6cee932021-12-01 09:02:36 -0700158 select SUPPORT_ACPI
Bin Meng0c0d9b02018-08-02 23:58:03 -0700159 imply BITREVERSE
Simon Glass78b0ef52018-11-15 18:43:53 -0700160 select BLOBLIST
Marek Behúnf8bd43f2021-05-20 13:24:08 +0200161 imply LTO
Michal Simek2e7c8192018-07-23 15:55:14 +0200162 imply CMD_DM
Heinrich Schuchardt0e298732020-11-12 00:29:59 +0100163 imply CMD_EXCEPTION
Simon Glassf4cb4742017-05-17 03:25:44 -0600164 imply CMD_GETTIME
Simon Glass027608e2017-05-17 03:25:25 -0600165 imply CMD_HASH
Simon Glass3bebbe62017-05-17 03:25:34 -0600166 imply CMD_IO
Simon Glass30daabc2017-05-17 03:25:36 -0600167 imply CMD_IOTRACE
Simon Glassbecaa8f2017-05-17 03:25:43 -0600168 imply CMD_LZMADEC
Tom Rinie5289a72019-05-29 17:01:28 -0400169 imply CMD_SF
Michal Simek84f3dec2018-07-23 15:55:13 +0200170 imply CMD_SF_TEST
Tom Rinid8532af2017-06-02 11:03:50 -0400171 imply CRC32_VERIFY
172 imply FAT_WRITE
Rajan Vajab3b2ddb2018-09-19 03:43:46 -0700173 imply FIRMWARE
Andrew Scull451b8b12022-05-30 10:00:12 +0000174 imply FUZZING_ENGINE_SANDBOX
Daniel Thompsona9e2c672017-05-19 17:26:58 +0100175 imply HASH_VERIFY
Tom Rinid8532af2017-06-02 11:03:50 -0400176 imply LZMA
Jens Wiklanderdca252d2018-09-25 16:40:17 +0200177 imply TEE
Jens Wiklanderf1edae92018-09-25 16:40:23 +0200178 imply AVB_VERIFY
179 imply LIBAVB
180 imply CMD_AVB
Heinrich Schuchardtce33bcd2022-01-16 13:04:06 +0100181 imply PARTITION_TYPE_GUID
Igor Opaniuk623369c2021-02-14 16:27:27 +0100182 imply SCP03
183 imply CMD_SCP03
Jens Wiklanderf1edae92018-09-25 16:40:23 +0200184 imply UDP_FUNCTION_FASTBOOT
Bin Meng1bb290d2018-10-15 02:21:26 -0700185 imply VIRTIO_MMIO
186 imply VIRTIO_PCI
187 imply VIRTIO_SANDBOX
188 imply VIRTIO_BLK
189 imply VIRTIO_NET
Simon Glass799b29b2018-12-10 10:37:31 -0700190 imply DM_SOUND
Ramon Friedc64f19b2019-04-27 11:15:23 +0300191 imply PCI_SANDBOX_EP
Simon Glass98d88f82019-02-16 20:24:49 -0700192 imply PCH
Alex Marginean0daa53a2019-06-03 19:12:28 +0300193 imply PHYLIB
194 imply DM_MDIO
Alex Marginean0649be52019-07-12 10:13:53 +0300195 imply DM_MDIO_MUX
Simon Glass8c501022019-12-06 21:41:54 -0700196 imply ACPI_PMC
197 imply ACPI_PMC_SANDBOX
198 imply CMD_PMC
John Chaufce6f982020-07-02 12:01:21 +0800199 imply CMD_CLONE
Simon Glass07a88862020-11-05 10:33:38 -0700200 imply SILENT_CONSOLE
Simon Glass529e2082020-11-05 10:33:48 -0700201 imply BOOTARGS_SUBST
Claudiu Manoild9eaa922021-03-14 20:14:57 +0800202 imply PHY_FIXED
203 imply DM_DSA
Kory Maincent965a34f2021-05-04 19:31:23 +0200204 imply CMD_EXTENSION
Simon Glass278efc682021-11-24 09:26:44 -0700205 imply KEYBOARD
Simon Glassef9e7622021-11-24 09:26:42 -0700206 imply PHYSMEM
Simon Glass29e64b52021-12-01 09:02:43 -0700207 imply GENERATE_ACPI_TABLE
Philippe Reynes462d1632022-03-28 22:56:53 +0200208 imply BINMAN
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900209
210config SH
211 bool "SuperH architecture"
Masahiro Yamada9520b712014-10-24 01:30:43 +0900212 select HAVE_PRIVATE_LIBGCC
Marek Vasut8fc9fa12019-08-31 18:27:58 +0200213 select SUPPORT_OF_CONTROL
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900214
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900215config X86
216 bool "x86 architecture"
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600217 select SUPPORT_SPL
218 select SUPPORT_TPL
Masahiro Yamada58654502015-07-15 20:59:29 +0900219 select CREATE_ARCH_SYMLINK
Masahiro Yamada5ef5ccc2015-03-31 12:47:53 +0900220 select DM
Bin Meng59c4aa42018-10-15 02:21:16 -0700221 select HAVE_ARCH_IOMAP
Michal Simek84f3dec2018-07-23 15:55:13 +0200222 select HAVE_PRIVATE_LIBGCC
223 select OF_CONTROL
Bin Meng0e0204d2017-07-30 06:23:16 -0700224 select PCI
Simon Glassa6cee932021-12-01 09:02:36 -0700225 select SUPPORT_ACPI
Michal Simek84f3dec2018-07-23 15:55:13 +0200226 select SUPPORT_OF_CONTROL
Tom Rini3ef67ae2021-08-26 11:47:59 -0400227 select SYS_CACHE_SHIFT_6
Bin Mengf0e1c3e2017-07-30 06:23:07 -0700228 select TIMER
Michal Simek84f3dec2018-07-23 15:55:13 +0200229 select USE_PRIVATE_LIBGCC
Bin Mengf0e1c3e2017-07-30 06:23:07 -0700230 select X86_TSC_TIMER
Wasim Khan4a7fef72021-03-08 16:48:15 +0100231 select IRQ
Simon Glassf69c0092020-07-19 13:55:52 -0600232 imply HAS_ROM if X86_RESET_VECTOR
Bin Meng73f5bc12017-07-30 19:24:02 -0700233 imply BLK
Michal Simek2e7c8192018-07-23 15:55:14 +0200234 imply CMD_DM
Michal Simek84f3dec2018-07-23 15:55:13 +0200235 imply CMD_FPGA_LOADMK
236 imply CMD_GETTIME
237 imply CMD_IO
238 imply CMD_IRQ
239 imply CMD_PCI
Tom Rinie5289a72019-05-29 17:01:28 -0400240 imply CMD_SF
Michal Simek84f3dec2018-07-23 15:55:13 +0200241 imply CMD_SF_TEST
242 imply CMD_ZBOOT
Simon Glassfc557362022-03-04 08:43:05 -0700243 imply DM_EVENT
Bin Meng0e0204d2017-07-30 06:23:16 -0700244 imply DM_GPIO
245 imply DM_KEYBOARD
Simon Glass828b7252017-07-30 19:24:01 -0700246 imply DM_MMC
Bin Meng0e0204d2017-07-30 06:23:16 -0700247 imply DM_RTC
Bin Meng73f5bc12017-07-30 19:24:02 -0700248 imply DM_SCSI
Michal Simek84f3dec2018-07-23 15:55:13 +0200249 imply DM_SERIAL
Bin Meng0e0204d2017-07-30 06:23:16 -0700250 imply DM_SPI
251 imply DM_SPI_FLASH
252 imply DM_USB
Simon Glass52cb5042022-10-18 07:46:31 -0600253 imply VIDEO
Bin Mengaf5b8d22018-07-19 03:07:33 -0700254 imply SYSRESET
Kever Yang525ea472019-04-02 20:41:25 +0800255 imply SPL_SYSRESET
Bin Mengaf5b8d22018-07-19 03:07:33 -0700256 imply SYSRESET_X86
Chris Packhamb110e112017-08-28 20:50:46 +1200257 imply USB_ETHER_ASIX
258 imply USB_ETHER_SMSC95XX
Michal Simek84f3dec2018-07-23 15:55:13 +0200259 imply USB_HOST_ETHER
Simon Glass98d88f82019-02-16 20:24:49 -0700260 imply PCH
Simon Glassef9e7622021-11-24 09:26:42 -0700261 imply PHYSMEM
Simon Glass56382fb2019-05-02 10:52:24 -0600262 imply RTC_MC146818
Simon Glassb0282282021-12-01 09:02:39 -0700263 imply ACPIGEN if !QEMU && !EFI_APP
Simon Glassbee77f62020-11-05 06:32:17 -0700264 imply SYSINFO if GENERATE_SMBIOS_TABLE
265 imply SYSINFO_SMBIOS if GENERATE_SMBIOS_TABLE
Simon Glass65831d92021-12-18 11:27:50 -0700266 imply TIMESTAMP
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900267
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600268 # Thing to enable for when SPL/TPL are enabled: SPL
269 imply SPL_DM
270 imply SPL_OF_LIBFDT
Simon Glass284cb9c2021-07-10 21:14:31 -0600271 imply SPL_DRIVERS_MISC
Simon Glass035939e2021-07-10 21:14:30 -0600272 imply SPL_GPIO
Simon Glass7b1ecb82019-12-06 21:42:51 -0700273 imply SPL_PINCTRL
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600274 imply SPL_LIBCOMMON_SUPPORT
275 imply SPL_LIBGENERIC_SUPPORT
Simon Glassf4d60392021-08-08 12:20:12 -0600276 imply SPL_SERIAL
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600277 imply SPL_SPI_FLASH_SUPPORT
Simon Glassa5820472021-08-08 12:20:14 -0600278 imply SPL_SPI
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600279 imply SPL_OF_CONTROL
280 imply SPL_TIMER
281 imply SPL_REGMAP
282 imply SPL_SYSCON
283 # TPL
284 imply TPL_DM
Simon Glass284cb9c2021-07-10 21:14:31 -0600285 imply TPL_DRIVERS_MISC
Simon Glass035939e2021-07-10 21:14:30 -0600286 imply TPL_GPIO
Simon Glass7b1ecb82019-12-06 21:42:51 -0700287 imply TPL_PINCTRL
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600288 imply TPL_LIBCOMMON_SUPPORT
289 imply TPL_LIBGENERIC_SUPPORT
Simon Glassf4d60392021-08-08 12:20:12 -0600290 imply TPL_SERIAL
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600291 imply TPL_OF_CONTROL
292 imply TPL_TIMER
293 imply TPL_REGMAP
294 imply TPL_SYSCON
295
Chris Zankel1387dab2016-08-10 18:36:44 +0300296config XTENSA
297 bool "Xtensa architecture"
298 select CREATE_ARCH_SYMLINK
299 select SUPPORT_OF_CONTROL
300
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900301endchoice
302
Masahiro Yamada52a5f972014-09-14 03:01:48 +0900303config SYS_ARCH
304 string
305 help
306 This option should contain the architecture name to build the
307 appropriate arch/<CONFIG_SYS_ARCH> directory.
308 All the architectures should specify this option correctly.
309
310config SYS_CPU
311 string
312 help
313 This option should contain the CPU name to build the correct
314 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory.
315
316 This is optional. For those targets without the CPU directory,
317 leave this option empty.
318
319config SYS_SOC
320 string
321 help
322 This option should contain the SoC name to build the directory
323 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>.
324
325 This is optional. For those targets without the SoC directory,
326 leave this option empty.
327
328config SYS_VENDOR
329 string
330 help
331 This option should contain the vendor name of the target board.
332 If it is set and
333 board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common
334 directory is compiled.
335 If CONFIG_SYS_BOARD is also set, the sources under
336 board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled.
337
338 This is optional. For those targets without the vendor directory,
339 leave this option empty.
340
341config SYS_BOARD
342 string
343 help
344 This option should contain the name of the target board.
345 If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD>
346 or board/<CONFIG_SYS_BOARD> directory is compiled depending on
347 whether CONFIG_SYS_VENDOR is set or not.
348
349 This is optional. For those targets without the board directory,
350 leave this option empty.
351
352config SYS_CONFIG_NAME
353 string
354 help
355 This option should contain the base name of board header file.
356 The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h
357 should be included from include/config.h.
358
Vignesh Raghavendra384c1412019-04-22 21:43:32 +0530359config SYS_DISABLE_DCACHE_OPS
360 bool
361 help
362 This option disables dcache flush and dcache invalidation
363 operations. For example, on coherent systems where cache
364 operatios are not required, enable this option to avoid them.
365 Note that, its up to the individual architectures to implement
366 this functionality.
367
Tom Rinie9269a02021-12-12 22:12:30 -0500368config SYS_IMMR
Tom Rini0c4dded2022-03-30 09:30:15 -0400369 hex "Address for the Internal Memory-Mapped Registers (IMMR) window"
Tom Rinie9269a02021-12-12 22:12:30 -0500370 depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A
371 default 0xFF000000 if MPC8xx
372 default 0xF0000000 if ARCH_MPC8313
373 default 0xE0000000 if MPC83xx && !ARCH_MPC8313
374 default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
Pali Rohárc68991e2022-05-02 18:29:25 +0200375 default 0xFFE00000 if ARCH_P1010 || ARCH_P1011 || ARCH_P1020 || \
376 ARCH_P1021 || ARCH_P1024 || ARCH_P1025 || \
377 ARCH_P2020
Tom Rinie9269a02021-12-12 22:12:30 -0500378 default SYS_CCSRBAR_DEFAULT
379 help
380 Address for the Internal Memory-Mapped Registers (IMMR) window used
381 to configure the features of many Freescale / NXP SoCs.
382
Tom Rinie1e85442021-08-27 21:18:30 -0400383config SKIP_LOWLEVEL_INIT
384 bool "Skip the calls to certain low level initialization functions"
Tom Rini53320122022-04-06 09:21:25 -0400385 depends on ARM || MIPS || RISCV
Tom Rinie1e85442021-08-27 21:18:30 -0400386 help
387 If enabled, then certain low level initializations (like setting up
388 the memory controller) are omitted and/or U-Boot does not relocate
389 itself into RAM.
390 Normally this variable MUST NOT be defined. The only exception is
391 when U-Boot is loaded (to RAM) by some other boot loader or by a
392 debugger which performs these initializations itself.
393
394config SPL_SKIP_LOWLEVEL_INIT
395 bool "Skip the calls to certain low level initialization functions"
Tom Rini53320122022-04-06 09:21:25 -0400396 depends on SPL && (ARM || MIPS || RISCV)
Tom Rinie1e85442021-08-27 21:18:30 -0400397 help
398 If enabled, then certain low level initializations (like setting up
399 the memory controller) are omitted and/or U-Boot does not relocate
400 itself into RAM.
401 Normally this variable MUST NOT be defined. The only exception is
402 when U-Boot is loaded (to RAM) by some other boot loader or by a
403 debugger which performs these initializations itself.
404
405config TPL_SKIP_LOWLEVEL_INIT
406 bool "Skip the calls to certain low level initialization functions"
407 depends on SPL && ARM
408 help
409 If enabled, then certain low level initializations (like setting up
410 the memory controller) are omitted and/or U-Boot does not relocate
411 itself into RAM.
412 Normally this variable MUST NOT be defined. The only exception is
413 when U-Boot is loaded (to RAM) by some other boot loader or by a
414 debugger which performs these initializations itself.
415
416config SKIP_LOWLEVEL_INIT_ONLY
417 bool "Skip the call to lowlevel_init during early boot ONLY"
418 depends on ARM
419 help
420 This allows just the call to lowlevel_init() to be skipped. The
421 normal CP15 init (such as enabling the instruction cache) is still
422 performed.
423
424config SPL_SKIP_LOWLEVEL_INIT_ONLY
425 bool "Skip the call to lowlevel_init during early boot ONLY"
426 depends on SPL && ARM
427 help
428 This allows just the call to lowlevel_init() to be skipped. The
429 normal CP15 init (such as enabling the instruction cache) is still
430 performed.
431
432config TPL_SKIP_LOWLEVEL_INIT_ONLY
433 bool "Skip the call to lowlevel_init during early boot ONLY"
434 depends on TPL && ARM
435 help
436 This allows just the call to lowlevel_init() to be skipped. The
437 normal CP15 init (such as enabling the instruction cache) is still
438 performed.
439
Tom Rini295ab162022-10-28 20:27:10 -0400440config SYS_HAS_NONCACHED_MEMORY
441 bool "Enable reserving a non-cached memory area for drivers"
442 depends on (ARM || MIPS) && (RTL8169 || MEDIATEK_ETH)
443 help
444 This is useful for drivers that would otherwise require a lot of
445 explicit cache maintenance. For some drivers it's also impossible to
446 properly maintain the cache. For example if the regions that need to
447 be flushed are not a multiple of the cache-line size, *and* padding
448 cannot be allocated between the regions to align them (i.e. if the
449 HW requires a contiguous array of regions, and the size of each
450 region is not cache-aligned), then a flush of one region may result
451 in overwriting data that hardware has written to another region in
452 the same cache-line. This can happen for example in network drivers
453 where descriptors for buffers are typically smaller than the CPU
454 cache-line (e.g. 16 bytes vs. 32 or 64 bytes).
455
456config SYS_NONCACHED_MEMORY
457 hex "Size in bytes of the non-cached memory area"
458 depends on SYS_HAS_NONCACHED_MEMORY
459 default 0x100000
460 help
461 Size of non-cached memory area. This area of memory will be typically
462 located right below the malloc() area and mapped uncached in the MMU.
463
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900464source "arch/arc/Kconfig"
465source "arch/arm/Kconfig"
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900466source "arch/m68k/Kconfig"
467source "arch/microblaze/Kconfig"
468source "arch/mips/Kconfig"
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900469source "arch/nios2/Kconfig"
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900470source "arch/powerpc/Kconfig"
471source "arch/sandbox/Kconfig"
472source "arch/sh/Kconfig"
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900473source "arch/x86/Kconfig"
Chris Zankel1387dab2016-08-10 18:36:44 +0300474source "arch/xtensa/Kconfig"
Rick Chen3301bfc2017-12-26 13:55:58 +0800475source "arch/riscv/Kconfig"
Tom Rinia67ff802022-03-23 17:19:55 -0400476
Tom Rinic4aecf62022-06-16 14:04:36 -0400477if ARM || M68K || PPC
478
479source "arch/Kconfig.nxp"
480
481endif
482
Tom Rinia67ff802022-03-23 17:19:55 -0400483source "board/keymile/Kconfig"
Michal Simek9599f8f2022-06-24 14:14:59 +0200484
Michal Simek1a2f7b82022-06-24 14:14:59 +0200485if MIPS || MICROBLAZE
Michal Simek9599f8f2022-06-24 14:14:59 +0200486
487choice
488 prompt "Endianness selection"
489 help
490 Some MIPS boards can be configured for either little or big endian
491 byte order. These modes require different U-Boot images. In general there
492 is one preferred byteorder for a particular system but some systems are
493 just as commonly used in the one or the other endianness.
494
495config SYS_BIG_ENDIAN
496 bool "Big endian"
Michal Simek1a2f7b82022-06-24 14:14:59 +0200497 depends on (SUPPORTS_BIG_ENDIAN && MIPS) || MICROBLAZE
Michal Simek9599f8f2022-06-24 14:14:59 +0200498
499config SYS_LITTLE_ENDIAN
500 bool "Little endian"
Michal Simek1a2f7b82022-06-24 14:14:59 +0200501 depends on (SUPPORTS_LITTLE_ENDIAN && MIPS) || MICROBLAZE
Michal Simek9599f8f2022-06-24 14:14:59 +0200502
503endchoice
504
505endif