blob: ffb8f5c8ecea5f17764b258060b814ceac109f46 [file] [log] [blame]
Tom Rinie33610c2021-12-14 13:36:35 -05001config ARCH_MAP_SYSMEM
2 depends on SANDBOX || NDS32
3 def_bool y
4
Masahiro Yamada58654502015-07-15 20:59:29 +09005config CREATE_ARCH_SYMLINK
6 bool
7
Masahiro Yamada332b8292016-06-28 10:48:42 +09008config HAVE_ARCH_IOREMAP
9 bool
10
Michal Simek27d66cf2020-11-04 15:33:20 +010011config NEEDS_MANUAL_RELOC
12 bool
13
Tom Rini3ef67ae2021-08-26 11:47:59 -040014config SYS_CACHE_SHIFT_4
15 bool
16
17config SYS_CACHE_SHIFT_5
18 bool
19
20config SYS_CACHE_SHIFT_6
21 bool
22
23config SYS_CACHE_SHIFT_7
24 bool
25
26config SYS_CACHELINE_SIZE
27 int
28 default 128 if SYS_CACHE_SHIFT_7
29 default 64 if SYS_CACHE_SHIFT_6
30 default 32 if SYS_CACHE_SHIFT_5
31 default 16 if SYS_CACHE_SHIFT_4
32 # Fall-back for MIPS
33 default 32 if MIPS
34
Simon Glassb87153c2020-12-16 21:20:06 -070035config LINKER_LIST_ALIGN
36 int
37 default 32 if SANDBOX
38 default 8 if ARM64 || X86
39 default 4
40 help
41 Force the each linker list to be aligned to this boundary. This
42 is required if ll_entry_get() is used, since otherwise the linker
43 may add padding into the table, thus breaking it.
44 See linker_lists.rst for full details.
45
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090046choice
47 prompt "Architecture select"
48 default SANDBOX
49
50config ARC
51 bool "ARC architecture"
Michal Simek84f3dec2018-07-23 15:55:13 +020052 select ARC_TIMER
Vlad Zakharova465df72017-03-21 14:49:49 +030053 select CLK
Michal Simekd5d59bd2020-08-19 10:44:20 +020054 select DM
Michal Simek84f3dec2018-07-23 15:55:13 +020055 select HAVE_PRIVATE_LIBGCC
56 select SUPPORT_OF_CONTROL
Tom Rini3ef67ae2021-08-26 11:47:59 -040057 select SYS_CACHE_SHIFT_7
Vlad Zakharova465df72017-03-21 14:49:49 +030058 select TIMER
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090059
60config ARM
61 bool "ARM architecture"
Marek BehĂșn4778a582021-05-20 13:24:22 +020062 select ARCH_SUPPORTS_LTO
Masahiro Yamada58654502015-07-15 20:59:29 +090063 select CREATE_ARCH_SYMLINK
Masahiro Yamada06280592015-07-03 16:13:09 +090064 select HAVE_PRIVATE_LIBGCC if !ARM64
Masahiro Yamada9fadbc82014-09-22 19:59:05 +090065 select SUPPORT_OF_CONTROL
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090066
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090067config M68K
68 bool "M68000 architecture"
angelo@sysam.it5e798172015-12-06 17:47:59 +010069 select HAVE_PRIVATE_LIBGCC
Michal Simek27d66cf2020-11-04 15:33:20 +010070 select NEEDS_MANUAL_RELOC
Derald D. Woodseb730bd2018-01-22 17:17:10 -060071 select SYS_BOOT_GET_CMDLINE
72 select SYS_BOOT_GET_KBD
Tom Rini3ef67ae2021-08-26 11:47:59 -040073 select SYS_CACHE_SHIFT_4
Angelo Dureghelloe007b152019-03-13 21:46:51 +010074 select SUPPORT_OF_CONTROL
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090075
76config MICROBLAZE
77 bool "MicroBlaze architecture"
Michal Simek27d66cf2020-11-04 15:33:20 +010078 select NEEDS_MANUAL_RELOC
Masahiro Yamada9fadbc82014-09-22 19:59:05 +090079 select SUPPORT_OF_CONTROL
Simon Glass4c3a6202017-05-17 03:25:39 -060080 imply CMD_IRQ
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090081
82config MIPS
83 bool "MIPS architecture"
Masahiro Yamada332b8292016-06-28 10:48:42 +090084 select HAVE_ARCH_IOREMAP
Masahiro Yamada9520b712014-10-24 01:30:43 +090085 select HAVE_PRIVATE_LIBGCC
Daniel Schwierzeckde5b6e22015-12-19 20:20:48 +010086 select SUPPORT_OF_CONTROL
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090087
88config NDS32
89 bool "NDS32 architecture"
rick2492bfc2017-04-17 14:41:58 +080090 select SUPPORT_OF_CONTROL
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090091
92config NIOS2
93 bool "Nios II architecture"
Thomas Chouc6170262015-10-21 21:34:57 +080094 select CPU
Michal Simek84f3dec2018-07-23 15:55:13 +020095 select DM
96 select OF_CONTROL
97 select SUPPORT_OF_CONTROL
Michal Simek2e7c8192018-07-23 15:55:14 +020098 imply CMD_DM
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090099
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900100config PPC
101 bool "PowerPC architecture"
Masahiro Yamada9520b712014-10-24 01:30:43 +0900102 select HAVE_PRIVATE_LIBGCC
Simon Glass90f83c82015-02-07 11:51:35 -0700103 select SUPPORT_OF_CONTROL
Derald D. Woodseb730bd2018-01-22 17:17:10 -0600104 select SYS_BOOT_GET_CMDLINE
105 select SYS_BOOT_GET_KBD
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900106
Rick Chen3301bfc2017-12-26 13:55:58 +0800107config RISCV
Bin Meng6b697752018-09-26 06:55:06 -0700108 bool "RISC-V architecture"
Anup Patel0af3e852019-02-25 08:14:04 +0000109 select CREATE_ARCH_SYMLINK
Rick Chen3301bfc2017-12-26 13:55:58 +0800110 select SUPPORT_OF_CONTROL
Bin Menga760eba2018-09-26 06:55:19 -0700111 select OF_CONTROL
112 select DM
Bin Meng3880c382018-09-26 06:55:20 -0700113 imply DM_SERIAL
114 imply DM_ETH
115 imply DM_MMC
116 imply DM_SPI
117 imply DM_SPI_FLASH
118 imply BLK
119 imply CLK
120 imply MTD
121 imply TIMER
Bin Menga760eba2018-09-26 06:55:19 -0700122 imply CMD_DM
Lukas Auer396f0bd2019-08-21 21:14:45 +0200123 imply SPL_DM
124 imply SPL_OF_CONTROL
125 imply SPL_LIBCOMMON_SUPPORT
126 imply SPL_LIBGENERIC_SUPPORT
Simon Glassf4d60392021-08-08 12:20:12 -0600127 imply SPL_SERIAL
Lukas Auer396f0bd2019-08-21 21:14:45 +0200128 imply SPL_TIMER
Rick Chen3301bfc2017-12-26 13:55:58 +0800129
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900130config SANDBOX
131 bool "Sandbox"
Marek BehĂșn72434932021-05-20 13:24:07 +0200132 select ARCH_SUPPORTS_LTO
Tom Rini22d567e2017-01-22 19:43:11 -0500133 select BOARD_LATE_INIT
Michael Walle8ffe86c2020-05-22 14:07:38 +0200134 select BZIP2
Heinrich Schuchardtfedf6562020-10-27 20:29:22 +0100135 select CMD_POWEROFF
Masahiro Yamada5ef5ccc2015-03-31 12:47:53 +0900136 select DM
Michal Simek84f3dec2018-07-23 15:55:13 +0200137 select DM_GPIO
138 select DM_I2C
Masahiro Yamadab11b2352016-09-08 18:47:35 +0900139 select DM_KEYBOARD
Michal Simek84f3dec2018-07-23 15:55:13 +0200140 select DM_MMC
Masahiro Yamada5ef5ccc2015-03-31 12:47:53 +0900141 select DM_SERIAL
Masahiro Yamada5ef5ccc2015-03-31 12:47:53 +0900142 select DM_SPI
Michal Simek84f3dec2018-07-23 15:55:13 +0200143 select DM_SPI_FLASH
Michael Walle8ffe86c2020-05-22 14:07:38 +0200144 select GZIP_COMPRESSED
Adam Fordb10ba902018-02-06 12:43:56 -0600145 select HAVE_BLOCK_DEVICE
Tom Rinic20bb732017-07-22 18:36:16 -0400146 select LZO
Heinrich Schuchardta3fc9a42020-03-14 12:13:40 +0100147 select OF_BOARD_SETUP
Ramon Friedc64f19b2019-04-27 11:15:23 +0300148 select PCI_ENDPOINT
Michal Simek84f3dec2018-07-23 15:55:13 +0200149 select SPI
150 select SUPPORT_OF_CONTROL
Heinrich Schuchardtfedf6562020-10-27 20:29:22 +0100151 select SYSRESET_CMD_POWEROFF
Tom Rini3ef67ae2021-08-26 11:47:59 -0400152 select SYS_CACHE_SHIFT_4
Wasim Khan4dab60b2021-03-08 16:48:16 +0100153 select IRQ
Kory Maincent965a34f2021-05-04 19:31:23 +0200154 select SUPPORT_EXTENSION_SCAN
Bin Meng0c0d9b02018-08-02 23:58:03 -0700155 imply BITREVERSE
Simon Glass78b0ef52018-11-15 18:43:53 -0700156 select BLOBLIST
Marek BehĂșnf8bd43f2021-05-20 13:24:08 +0200157 imply LTO
Michal Simek2e7c8192018-07-23 15:55:14 +0200158 imply CMD_DM
Heinrich Schuchardt0e298732020-11-12 00:29:59 +0100159 imply CMD_EXCEPTION
Simon Glassf4cb4742017-05-17 03:25:44 -0600160 imply CMD_GETTIME
Simon Glass027608e2017-05-17 03:25:25 -0600161 imply CMD_HASH
Simon Glass3bebbe62017-05-17 03:25:34 -0600162 imply CMD_IO
Simon Glass30daabc2017-05-17 03:25:36 -0600163 imply CMD_IOTRACE
Simon Glassbecaa8f2017-05-17 03:25:43 -0600164 imply CMD_LZMADEC
Michal Simek84f3dec2018-07-23 15:55:13 +0200165 imply CMD_SATA
Tom Rinie5289a72019-05-29 17:01:28 -0400166 imply CMD_SF
Michal Simek84f3dec2018-07-23 15:55:13 +0200167 imply CMD_SF_TEST
Tom Rinid8532af2017-06-02 11:03:50 -0400168 imply CRC32_VERIFY
169 imply FAT_WRITE
Rajan Vajab3b2ddb2018-09-19 03:43:46 -0700170 imply FIRMWARE
Daniel Thompsona9e2c672017-05-19 17:26:58 +0100171 imply HASH_VERIFY
Tom Rinid8532af2017-06-02 11:03:50 -0400172 imply LZMA
Simon Glass0e5faf02017-06-14 21:28:21 -0600173 imply SCSI
Jens Wiklanderdca252d2018-09-25 16:40:17 +0200174 imply TEE
Jens Wiklanderf1edae92018-09-25 16:40:23 +0200175 imply AVB_VERIFY
176 imply LIBAVB
177 imply CMD_AVB
Heinrich Schuchardtce33bcd2022-01-16 13:04:06 +0100178 imply PARTITION_TYPE_GUID
Igor Opaniuk623369c2021-02-14 16:27:27 +0100179 imply SCP03
180 imply CMD_SCP03
Jens Wiklanderf1edae92018-09-25 16:40:23 +0200181 imply UDP_FUNCTION_FASTBOOT
Bin Meng1bb290d2018-10-15 02:21:26 -0700182 imply VIRTIO_MMIO
183 imply VIRTIO_PCI
184 imply VIRTIO_SANDBOX
185 imply VIRTIO_BLK
186 imply VIRTIO_NET
Simon Glass799b29b2018-12-10 10:37:31 -0700187 imply DM_SOUND
Ramon Friedc64f19b2019-04-27 11:15:23 +0300188 imply PCI_SANDBOX_EP
Simon Glass98d88f82019-02-16 20:24:49 -0700189 imply PCH
Alex Marginean0daa53a2019-06-03 19:12:28 +0300190 imply PHYLIB
191 imply DM_MDIO
Alex Marginean0649be52019-07-12 10:13:53 +0300192 imply DM_MDIO_MUX
Simon Glass8c501022019-12-06 21:41:54 -0700193 imply ACPI_PMC
194 imply ACPI_PMC_SANDBOX
195 imply CMD_PMC
John Chaufce6f982020-07-02 12:01:21 +0800196 imply CMD_CLONE
Simon Glass07a88862020-11-05 10:33:38 -0700197 imply SILENT_CONSOLE
Simon Glass529e2082020-11-05 10:33:48 -0700198 imply BOOTARGS_SUBST
Claudiu Manoild9eaa922021-03-14 20:14:57 +0800199 imply PHY_FIXED
200 imply DM_DSA
Kory Maincent965a34f2021-05-04 19:31:23 +0200201 imply CMD_EXTENSION
Simon Glass278efc682021-11-24 09:26:44 -0700202 imply KEYBOARD
Simon Glassef9e7622021-11-24 09:26:42 -0700203 imply PHYSMEM
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900204
205config SH
206 bool "SuperH architecture"
Masahiro Yamada9520b712014-10-24 01:30:43 +0900207 select HAVE_PRIVATE_LIBGCC
Marek Vasut8fc9fa12019-08-31 18:27:58 +0200208 select SUPPORT_OF_CONTROL
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900209
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900210config X86
211 bool "x86 architecture"
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600212 select SUPPORT_SPL
213 select SUPPORT_TPL
Masahiro Yamada58654502015-07-15 20:59:29 +0900214 select CREATE_ARCH_SYMLINK
Masahiro Yamada5ef5ccc2015-03-31 12:47:53 +0900215 select DM
Bin Meng59c4aa42018-10-15 02:21:16 -0700216 select HAVE_ARCH_IOMAP
Michal Simek84f3dec2018-07-23 15:55:13 +0200217 select HAVE_PRIVATE_LIBGCC
218 select OF_CONTROL
Bin Meng0e0204d2017-07-30 06:23:16 -0700219 select PCI
Michal Simek84f3dec2018-07-23 15:55:13 +0200220 select SUPPORT_OF_CONTROL
Tom Rini3ef67ae2021-08-26 11:47:59 -0400221 select SYS_CACHE_SHIFT_6
Bin Mengf0e1c3e2017-07-30 06:23:07 -0700222 select TIMER
Michal Simek84f3dec2018-07-23 15:55:13 +0200223 select USE_PRIVATE_LIBGCC
Bin Mengf0e1c3e2017-07-30 06:23:07 -0700224 select X86_TSC_TIMER
Wasim Khan4a7fef72021-03-08 16:48:15 +0100225 select IRQ
Simon Glassf69c0092020-07-19 13:55:52 -0600226 imply HAS_ROM if X86_RESET_VECTOR
Bin Meng73f5bc12017-07-30 19:24:02 -0700227 imply BLK
Michal Simek2e7c8192018-07-23 15:55:14 +0200228 imply CMD_DM
Michal Simek84f3dec2018-07-23 15:55:13 +0200229 imply CMD_FPGA_LOADMK
230 imply CMD_GETTIME
231 imply CMD_IO
232 imply CMD_IRQ
233 imply CMD_PCI
Tom Rinie5289a72019-05-29 17:01:28 -0400234 imply CMD_SF
Michal Simek84f3dec2018-07-23 15:55:13 +0200235 imply CMD_SF_TEST
236 imply CMD_ZBOOT
Bin Meng0e0204d2017-07-30 06:23:16 -0700237 imply DM_ETH
238 imply DM_GPIO
239 imply DM_KEYBOARD
Simon Glass828b7252017-07-30 19:24:01 -0700240 imply DM_MMC
Bin Meng0e0204d2017-07-30 06:23:16 -0700241 imply DM_RTC
Bin Meng73f5bc12017-07-30 19:24:02 -0700242 imply DM_SCSI
Michal Simek84f3dec2018-07-23 15:55:13 +0200243 imply DM_SERIAL
Bin Meng0e0204d2017-07-30 06:23:16 -0700244 imply DM_SPI
245 imply DM_SPI_FLASH
246 imply DM_USB
247 imply DM_VIDEO
Bin Mengaf5b8d22018-07-19 03:07:33 -0700248 imply SYSRESET
Kever Yang525ea472019-04-02 20:41:25 +0800249 imply SPL_SYSRESET
Bin Mengaf5b8d22018-07-19 03:07:33 -0700250 imply SYSRESET_X86
Chris Packhamb110e112017-08-28 20:50:46 +1200251 imply USB_ETHER_ASIX
252 imply USB_ETHER_SMSC95XX
Michal Simek84f3dec2018-07-23 15:55:13 +0200253 imply USB_HOST_ETHER
Simon Glass98d88f82019-02-16 20:24:49 -0700254 imply PCH
Simon Glassef9e7622021-11-24 09:26:42 -0700255 imply PHYSMEM
Simon Glass56382fb2019-05-02 10:52:24 -0600256 imply RTC_MC146818
Simon Glass55f3cde2020-07-16 21:22:39 -0600257 imply ACPIGEN if !QEMU
Simon Glassbee77f62020-11-05 06:32:17 -0700258 imply SYSINFO if GENERATE_SMBIOS_TABLE
259 imply SYSINFO_SMBIOS if GENERATE_SMBIOS_TABLE
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900260
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600261 # Thing to enable for when SPL/TPL are enabled: SPL
262 imply SPL_DM
263 imply SPL_OF_LIBFDT
Simon Glass284cb9c2021-07-10 21:14:31 -0600264 imply SPL_DRIVERS_MISC
Simon Glass035939e2021-07-10 21:14:30 -0600265 imply SPL_GPIO
Simon Glass7b1ecb82019-12-06 21:42:51 -0700266 imply SPL_PINCTRL
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600267 imply SPL_LIBCOMMON_SUPPORT
268 imply SPL_LIBGENERIC_SUPPORT
Simon Glassf4d60392021-08-08 12:20:12 -0600269 imply SPL_SERIAL
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600270 imply SPL_SPI_FLASH_SUPPORT
Simon Glassa5820472021-08-08 12:20:14 -0600271 imply SPL_SPI
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600272 imply SPL_OF_CONTROL
273 imply SPL_TIMER
274 imply SPL_REGMAP
275 imply SPL_SYSCON
276 # TPL
277 imply TPL_DM
Simon Glass284cb9c2021-07-10 21:14:31 -0600278 imply TPL_DRIVERS_MISC
Simon Glass035939e2021-07-10 21:14:30 -0600279 imply TPL_GPIO
Simon Glass7b1ecb82019-12-06 21:42:51 -0700280 imply TPL_PINCTRL
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600281 imply TPL_LIBCOMMON_SUPPORT
282 imply TPL_LIBGENERIC_SUPPORT
Simon Glassf4d60392021-08-08 12:20:12 -0600283 imply TPL_SERIAL
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600284 imply TPL_OF_CONTROL
285 imply TPL_TIMER
286 imply TPL_REGMAP
287 imply TPL_SYSCON
288
Chris Zankel1387dab2016-08-10 18:36:44 +0300289config XTENSA
290 bool "Xtensa architecture"
291 select CREATE_ARCH_SYMLINK
292 select SUPPORT_OF_CONTROL
293
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900294endchoice
295
Masahiro Yamada52a5f972014-09-14 03:01:48 +0900296config SYS_ARCH
297 string
298 help
299 This option should contain the architecture name to build the
300 appropriate arch/<CONFIG_SYS_ARCH> directory.
301 All the architectures should specify this option correctly.
302
303config SYS_CPU
304 string
305 help
306 This option should contain the CPU name to build the correct
307 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory.
308
309 This is optional. For those targets without the CPU directory,
310 leave this option empty.
311
312config SYS_SOC
313 string
314 help
315 This option should contain the SoC name to build the directory
316 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>.
317
318 This is optional. For those targets without the SoC directory,
319 leave this option empty.
320
321config SYS_VENDOR
322 string
323 help
324 This option should contain the vendor name of the target board.
325 If it is set and
326 board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common
327 directory is compiled.
328 If CONFIG_SYS_BOARD is also set, the sources under
329 board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled.
330
331 This is optional. For those targets without the vendor directory,
332 leave this option empty.
333
334config SYS_BOARD
335 string
336 help
337 This option should contain the name of the target board.
338 If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD>
339 or board/<CONFIG_SYS_BOARD> directory is compiled depending on
340 whether CONFIG_SYS_VENDOR is set or not.
341
342 This is optional. For those targets without the board directory,
343 leave this option empty.
344
345config SYS_CONFIG_NAME
346 string
347 help
348 This option should contain the base name of board header file.
349 The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h
350 should be included from include/config.h.
351
Vignesh Raghavendra384c1412019-04-22 21:43:32 +0530352config SYS_DISABLE_DCACHE_OPS
353 bool
354 help
355 This option disables dcache flush and dcache invalidation
356 operations. For example, on coherent systems where cache
357 operatios are not required, enable this option to avoid them.
358 Note that, its up to the individual architectures to implement
359 this functionality.
360
Tom Rinie9269a02021-12-12 22:12:30 -0500361config SYS_IMMR
362 hex
363 depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A
364 default 0xFF000000 if MPC8xx
365 default 0xF0000000 if ARCH_MPC8313
366 default 0xE0000000 if MPC83xx && !ARCH_MPC8313
367 default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
368 default SYS_CCSRBAR_DEFAULT
369 help
370 Address for the Internal Memory-Mapped Registers (IMMR) window used
371 to configure the features of many Freescale / NXP SoCs.
372
Tom Rinie1e85442021-08-27 21:18:30 -0400373config SKIP_LOWLEVEL_INIT
374 bool "Skip the calls to certain low level initialization functions"
375 depends on ARM || NDS32 || MIPS || RISCV
376 help
377 If enabled, then certain low level initializations (like setting up
378 the memory controller) are omitted and/or U-Boot does not relocate
379 itself into RAM.
380 Normally this variable MUST NOT be defined. The only exception is
381 when U-Boot is loaded (to RAM) by some other boot loader or by a
382 debugger which performs these initializations itself.
383
384config SPL_SKIP_LOWLEVEL_INIT
385 bool "Skip the calls to certain low level initialization functions"
386 depends on SPL && (ARM || NDS32 || MIPS || RISCV)
387 help
388 If enabled, then certain low level initializations (like setting up
389 the memory controller) are omitted and/or U-Boot does not relocate
390 itself into RAM.
391 Normally this variable MUST NOT be defined. The only exception is
392 when U-Boot is loaded (to RAM) by some other boot loader or by a
393 debugger which performs these initializations itself.
394
395config TPL_SKIP_LOWLEVEL_INIT
396 bool "Skip the calls to certain low level initialization functions"
397 depends on SPL && ARM
398 help
399 If enabled, then certain low level initializations (like setting up
400 the memory controller) are omitted and/or U-Boot does not relocate
401 itself into RAM.
402 Normally this variable MUST NOT be defined. The only exception is
403 when U-Boot is loaded (to RAM) by some other boot loader or by a
404 debugger which performs these initializations itself.
405
406config SKIP_LOWLEVEL_INIT_ONLY
407 bool "Skip the call to lowlevel_init during early boot ONLY"
408 depends on ARM
409 help
410 This allows just the call to lowlevel_init() to be skipped. The
411 normal CP15 init (such as enabling the instruction cache) is still
412 performed.
413
414config SPL_SKIP_LOWLEVEL_INIT_ONLY
415 bool "Skip the call to lowlevel_init during early boot ONLY"
416 depends on SPL && ARM
417 help
418 This allows just the call to lowlevel_init() to be skipped. The
419 normal CP15 init (such as enabling the instruction cache) is still
420 performed.
421
422config TPL_SKIP_LOWLEVEL_INIT_ONLY
423 bool "Skip the call to lowlevel_init during early boot ONLY"
424 depends on TPL && ARM
425 help
426 This allows just the call to lowlevel_init() to be skipped. The
427 normal CP15 init (such as enabling the instruction cache) is still
428 performed.
429
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900430source "arch/arc/Kconfig"
431source "arch/arm/Kconfig"
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900432source "arch/m68k/Kconfig"
433source "arch/microblaze/Kconfig"
434source "arch/mips/Kconfig"
435source "arch/nds32/Kconfig"
436source "arch/nios2/Kconfig"
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900437source "arch/powerpc/Kconfig"
438source "arch/sandbox/Kconfig"
439source "arch/sh/Kconfig"
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900440source "arch/x86/Kconfig"
Chris Zankel1387dab2016-08-10 18:36:44 +0300441source "arch/xtensa/Kconfig"
Rick Chen3301bfc2017-12-26 13:55:58 +0800442source "arch/riscv/Kconfig"