Masahiro Yamada | 5865450 | 2015-07-15 20:59:29 +0900 | [diff] [blame] | 1 | config CREATE_ARCH_SYMLINK |
| 2 | bool |
| 3 | |
Masahiro Yamada | 332b829 | 2016-06-28 10:48:42 +0900 | [diff] [blame] | 4 | config HAVE_ARCH_IOREMAP |
| 5 | bool |
| 6 | |
Michal Simek | 27d66cf | 2020-11-04 15:33:20 +0100 | [diff] [blame] | 7 | config NEEDS_MANUAL_RELOC |
| 8 | bool |
| 9 | |
Tom Rini | 3ef67ae | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 10 | config SYS_CACHE_SHIFT_4 |
| 11 | bool |
| 12 | |
| 13 | config SYS_CACHE_SHIFT_5 |
| 14 | bool |
| 15 | |
| 16 | config SYS_CACHE_SHIFT_6 |
| 17 | bool |
| 18 | |
| 19 | config SYS_CACHE_SHIFT_7 |
| 20 | bool |
| 21 | |
| 22 | config SYS_CACHELINE_SIZE |
| 23 | int |
| 24 | default 128 if SYS_CACHE_SHIFT_7 |
| 25 | default 64 if SYS_CACHE_SHIFT_6 |
| 26 | default 32 if SYS_CACHE_SHIFT_5 |
| 27 | default 16 if SYS_CACHE_SHIFT_4 |
| 28 | # Fall-back for MIPS |
| 29 | default 32 if MIPS |
| 30 | |
Simon Glass | b87153c | 2020-12-16 21:20:06 -0700 | [diff] [blame] | 31 | config LINKER_LIST_ALIGN |
| 32 | int |
| 33 | default 32 if SANDBOX |
| 34 | default 8 if ARM64 || X86 |
| 35 | default 4 |
| 36 | help |
| 37 | Force the each linker list to be aligned to this boundary. This |
| 38 | is required if ll_entry_get() is used, since otherwise the linker |
| 39 | may add padding into the table, thus breaking it. |
| 40 | See linker_lists.rst for full details. |
| 41 | |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 42 | choice |
| 43 | prompt "Architecture select" |
| 44 | default SANDBOX |
| 45 | |
| 46 | config ARC |
| 47 | bool "ARC architecture" |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 48 | select ARC_TIMER |
Vlad Zakharov | a465df7 | 2017-03-21 14:49:49 +0300 | [diff] [blame] | 49 | select CLK |
Michal Simek | d5d59bd | 2020-08-19 10:44:20 +0200 | [diff] [blame] | 50 | select DM |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 51 | select HAVE_PRIVATE_LIBGCC |
| 52 | select SUPPORT_OF_CONTROL |
Tom Rini | 3ef67ae | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 53 | select SYS_CACHE_SHIFT_7 |
Vlad Zakharov | a465df7 | 2017-03-21 14:49:49 +0300 | [diff] [blame] | 54 | select TIMER |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 55 | |
| 56 | config ARM |
| 57 | bool "ARM architecture" |
Marek BehĂșn | 4778a58 | 2021-05-20 13:24:22 +0200 | [diff] [blame] | 58 | select ARCH_SUPPORTS_LTO |
Masahiro Yamada | 5865450 | 2015-07-15 20:59:29 +0900 | [diff] [blame] | 59 | select CREATE_ARCH_SYMLINK |
Masahiro Yamada | 0628059 | 2015-07-03 16:13:09 +0900 | [diff] [blame] | 60 | select HAVE_PRIVATE_LIBGCC if !ARM64 |
Masahiro Yamada | 9fadbc8 | 2014-09-22 19:59:05 +0900 | [diff] [blame] | 61 | select SUPPORT_OF_CONTROL |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 62 | |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 63 | config M68K |
| 64 | bool "M68000 architecture" |
angelo@sysam.it | 5e79817 | 2015-12-06 17:47:59 +0100 | [diff] [blame] | 65 | select HAVE_PRIVATE_LIBGCC |
Michal Simek | 27d66cf | 2020-11-04 15:33:20 +0100 | [diff] [blame] | 66 | select NEEDS_MANUAL_RELOC |
Derald D. Woods | eb730bd | 2018-01-22 17:17:10 -0600 | [diff] [blame] | 67 | select SYS_BOOT_GET_CMDLINE |
| 68 | select SYS_BOOT_GET_KBD |
Tom Rini | 3ef67ae | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 69 | select SYS_CACHE_SHIFT_4 |
Angelo Dureghello | e007b15 | 2019-03-13 21:46:51 +0100 | [diff] [blame] | 70 | select SUPPORT_OF_CONTROL |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 71 | |
| 72 | config MICROBLAZE |
| 73 | bool "MicroBlaze architecture" |
Michal Simek | 27d66cf | 2020-11-04 15:33:20 +0100 | [diff] [blame] | 74 | select NEEDS_MANUAL_RELOC |
Masahiro Yamada | 9fadbc8 | 2014-09-22 19:59:05 +0900 | [diff] [blame] | 75 | select SUPPORT_OF_CONTROL |
Simon Glass | 4c3a620 | 2017-05-17 03:25:39 -0600 | [diff] [blame] | 76 | imply CMD_IRQ |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 77 | |
| 78 | config MIPS |
| 79 | bool "MIPS architecture" |
Masahiro Yamada | 332b829 | 2016-06-28 10:48:42 +0900 | [diff] [blame] | 80 | select HAVE_ARCH_IOREMAP |
Masahiro Yamada | 9520b71 | 2014-10-24 01:30:43 +0900 | [diff] [blame] | 81 | select HAVE_PRIVATE_LIBGCC |
Daniel Schwierzeck | de5b6e2 | 2015-12-19 20:20:48 +0100 | [diff] [blame] | 82 | select SUPPORT_OF_CONTROL |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 83 | |
| 84 | config NDS32 |
| 85 | bool "NDS32 architecture" |
rick | 2492bfc | 2017-04-17 14:41:58 +0800 | [diff] [blame] | 86 | select SUPPORT_OF_CONTROL |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 87 | |
| 88 | config NIOS2 |
| 89 | bool "Nios II architecture" |
Thomas Chou | c617026 | 2015-10-21 21:34:57 +0800 | [diff] [blame] | 90 | select CPU |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 91 | select DM |
| 92 | select OF_CONTROL |
| 93 | select SUPPORT_OF_CONTROL |
Michal Simek | 2e7c819 | 2018-07-23 15:55:14 +0200 | [diff] [blame] | 94 | imply CMD_DM |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 95 | |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 96 | config PPC |
| 97 | bool "PowerPC architecture" |
Masahiro Yamada | 9520b71 | 2014-10-24 01:30:43 +0900 | [diff] [blame] | 98 | select HAVE_PRIVATE_LIBGCC |
Simon Glass | 90f83c8 | 2015-02-07 11:51:35 -0700 | [diff] [blame] | 99 | select SUPPORT_OF_CONTROL |
Derald D. Woods | eb730bd | 2018-01-22 17:17:10 -0600 | [diff] [blame] | 100 | select SYS_BOOT_GET_CMDLINE |
| 101 | select SYS_BOOT_GET_KBD |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 102 | |
Rick Chen | 3301bfc | 2017-12-26 13:55:58 +0800 | [diff] [blame] | 103 | config RISCV |
Bin Meng | 6b69775 | 2018-09-26 06:55:06 -0700 | [diff] [blame] | 104 | bool "RISC-V architecture" |
Anup Patel | 0af3e85 | 2019-02-25 08:14:04 +0000 | [diff] [blame] | 105 | select CREATE_ARCH_SYMLINK |
Rick Chen | 3301bfc | 2017-12-26 13:55:58 +0800 | [diff] [blame] | 106 | select SUPPORT_OF_CONTROL |
Bin Meng | a760eba | 2018-09-26 06:55:19 -0700 | [diff] [blame] | 107 | select OF_CONTROL |
| 108 | select DM |
Bin Meng | 3880c38 | 2018-09-26 06:55:20 -0700 | [diff] [blame] | 109 | imply DM_SERIAL |
| 110 | imply DM_ETH |
| 111 | imply DM_MMC |
| 112 | imply DM_SPI |
| 113 | imply DM_SPI_FLASH |
| 114 | imply BLK |
| 115 | imply CLK |
| 116 | imply MTD |
| 117 | imply TIMER |
Bin Meng | a760eba | 2018-09-26 06:55:19 -0700 | [diff] [blame] | 118 | imply CMD_DM |
Lukas Auer | 396f0bd | 2019-08-21 21:14:45 +0200 | [diff] [blame] | 119 | imply SPL_DM |
| 120 | imply SPL_OF_CONTROL |
| 121 | imply SPL_LIBCOMMON_SUPPORT |
| 122 | imply SPL_LIBGENERIC_SUPPORT |
Simon Glass | f4d6039 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 123 | imply SPL_SERIAL |
Lukas Auer | 396f0bd | 2019-08-21 21:14:45 +0200 | [diff] [blame] | 124 | imply SPL_TIMER |
Rick Chen | 3301bfc | 2017-12-26 13:55:58 +0800 | [diff] [blame] | 125 | |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 126 | config SANDBOX |
| 127 | bool "Sandbox" |
Marek BehĂșn | 7243493 | 2021-05-20 13:24:07 +0200 | [diff] [blame] | 128 | select ARCH_SUPPORTS_LTO |
Tom Rini | 22d567e | 2017-01-22 19:43:11 -0500 | [diff] [blame] | 129 | select BOARD_LATE_INIT |
Michael Walle | 8ffe86c | 2020-05-22 14:07:38 +0200 | [diff] [blame] | 130 | select BZIP2 |
Heinrich Schuchardt | fedf656 | 2020-10-27 20:29:22 +0100 | [diff] [blame] | 131 | select CMD_POWEROFF |
Masahiro Yamada | 5ef5ccc | 2015-03-31 12:47:53 +0900 | [diff] [blame] | 132 | select DM |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 133 | select DM_GPIO |
| 134 | select DM_I2C |
Masahiro Yamada | b11b235 | 2016-09-08 18:47:35 +0900 | [diff] [blame] | 135 | select DM_KEYBOARD |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 136 | select DM_MMC |
Masahiro Yamada | 5ef5ccc | 2015-03-31 12:47:53 +0900 | [diff] [blame] | 137 | select DM_SERIAL |
Masahiro Yamada | 5ef5ccc | 2015-03-31 12:47:53 +0900 | [diff] [blame] | 138 | select DM_SPI |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 139 | select DM_SPI_FLASH |
Michael Walle | 8ffe86c | 2020-05-22 14:07:38 +0200 | [diff] [blame] | 140 | select GZIP_COMPRESSED |
Adam Ford | b10ba90 | 2018-02-06 12:43:56 -0600 | [diff] [blame] | 141 | select HAVE_BLOCK_DEVICE |
Tom Rini | c20bb73 | 2017-07-22 18:36:16 -0400 | [diff] [blame] | 142 | select LZO |
Heinrich Schuchardt | a3fc9a4 | 2020-03-14 12:13:40 +0100 | [diff] [blame] | 143 | select OF_BOARD_SETUP |
Ramon Fried | c64f19b | 2019-04-27 11:15:23 +0300 | [diff] [blame] | 144 | select PCI_ENDPOINT |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 145 | select SPI |
| 146 | select SUPPORT_OF_CONTROL |
Heinrich Schuchardt | fedf656 | 2020-10-27 20:29:22 +0100 | [diff] [blame] | 147 | select SYSRESET_CMD_POWEROFF |
Tom Rini | 3ef67ae | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 148 | select SYS_CACHE_SHIFT_4 |
Wasim Khan | 4dab60b | 2021-03-08 16:48:16 +0100 | [diff] [blame] | 149 | select IRQ |
Kory Maincent | 965a34f | 2021-05-04 19:31:23 +0200 | [diff] [blame] | 150 | select SUPPORT_EXTENSION_SCAN |
Bin Meng | 0c0d9b0 | 2018-08-02 23:58:03 -0700 | [diff] [blame] | 151 | imply BITREVERSE |
Simon Glass | 78b0ef5 | 2018-11-15 18:43:53 -0700 | [diff] [blame] | 152 | select BLOBLIST |
Marek BehĂșn | f8bd43f | 2021-05-20 13:24:08 +0200 | [diff] [blame] | 153 | imply LTO |
Michal Simek | 2e7c819 | 2018-07-23 15:55:14 +0200 | [diff] [blame] | 154 | imply CMD_DM |
Heinrich Schuchardt | 0e29873 | 2020-11-12 00:29:59 +0100 | [diff] [blame] | 155 | imply CMD_EXCEPTION |
Simon Glass | f4cb474 | 2017-05-17 03:25:44 -0600 | [diff] [blame] | 156 | imply CMD_GETTIME |
Simon Glass | 027608e | 2017-05-17 03:25:25 -0600 | [diff] [blame] | 157 | imply CMD_HASH |
Simon Glass | 3bebbe6 | 2017-05-17 03:25:34 -0600 | [diff] [blame] | 158 | imply CMD_IO |
Simon Glass | 30daabc | 2017-05-17 03:25:36 -0600 | [diff] [blame] | 159 | imply CMD_IOTRACE |
Simon Glass | becaa8f | 2017-05-17 03:25:43 -0600 | [diff] [blame] | 160 | imply CMD_LZMADEC |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 161 | imply CMD_SATA |
Tom Rini | e5289a7 | 2019-05-29 17:01:28 -0400 | [diff] [blame] | 162 | imply CMD_SF |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 163 | imply CMD_SF_TEST |
Tom Rini | d8532af | 2017-06-02 11:03:50 -0400 | [diff] [blame] | 164 | imply CRC32_VERIFY |
| 165 | imply FAT_WRITE |
Rajan Vaja | b3b2ddb | 2018-09-19 03:43:46 -0700 | [diff] [blame] | 166 | imply FIRMWARE |
Daniel Thompson | a9e2c67 | 2017-05-19 17:26:58 +0100 | [diff] [blame] | 167 | imply HASH_VERIFY |
Tom Rini | d8532af | 2017-06-02 11:03:50 -0400 | [diff] [blame] | 168 | imply LZMA |
Simon Glass | 0e5faf0 | 2017-06-14 21:28:21 -0600 | [diff] [blame] | 169 | imply SCSI |
Jens Wiklander | dca252d | 2018-09-25 16:40:17 +0200 | [diff] [blame] | 170 | imply TEE |
Jens Wiklander | f1edae9 | 2018-09-25 16:40:23 +0200 | [diff] [blame] | 171 | imply AVB_VERIFY |
| 172 | imply LIBAVB |
| 173 | imply CMD_AVB |
Igor Opaniuk | 623369c | 2021-02-14 16:27:27 +0100 | [diff] [blame] | 174 | imply SCP03 |
| 175 | imply CMD_SCP03 |
Jens Wiklander | f1edae9 | 2018-09-25 16:40:23 +0200 | [diff] [blame] | 176 | imply UDP_FUNCTION_FASTBOOT |
Bin Meng | 1bb290d | 2018-10-15 02:21:26 -0700 | [diff] [blame] | 177 | imply VIRTIO_MMIO |
| 178 | imply VIRTIO_PCI |
| 179 | imply VIRTIO_SANDBOX |
| 180 | imply VIRTIO_BLK |
| 181 | imply VIRTIO_NET |
Simon Glass | 799b29b | 2018-12-10 10:37:31 -0700 | [diff] [blame] | 182 | imply DM_SOUND |
Ramon Fried | c64f19b | 2019-04-27 11:15:23 +0300 | [diff] [blame] | 183 | imply PCI_SANDBOX_EP |
Simon Glass | 98d88f8 | 2019-02-16 20:24:49 -0700 | [diff] [blame] | 184 | imply PCH |
Alex Marginean | 0daa53a | 2019-06-03 19:12:28 +0300 | [diff] [blame] | 185 | imply PHYLIB |
| 186 | imply DM_MDIO |
Alex Marginean | 0649be5 | 2019-07-12 10:13:53 +0300 | [diff] [blame] | 187 | imply DM_MDIO_MUX |
Simon Glass | 8c50102 | 2019-12-06 21:41:54 -0700 | [diff] [blame] | 188 | imply ACPI_PMC |
| 189 | imply ACPI_PMC_SANDBOX |
| 190 | imply CMD_PMC |
John Chau | fce6f98 | 2020-07-02 12:01:21 +0800 | [diff] [blame] | 191 | imply CMD_CLONE |
Simon Glass | 07a8886 | 2020-11-05 10:33:38 -0700 | [diff] [blame] | 192 | imply SILENT_CONSOLE |
Simon Glass | 529e208 | 2020-11-05 10:33:48 -0700 | [diff] [blame] | 193 | imply BOOTARGS_SUBST |
Claudiu Manoil | d9eaa92 | 2021-03-14 20:14:57 +0800 | [diff] [blame] | 194 | imply PHY_FIXED |
| 195 | imply DM_DSA |
Kory Maincent | 965a34f | 2021-05-04 19:31:23 +0200 | [diff] [blame] | 196 | imply CMD_EXTENSION |
Simon Glass | 278efc68 | 2021-11-24 09:26:44 -0700 | [diff] [blame] | 197 | imply KEYBOARD |
Simon Glass | ef9e762 | 2021-11-24 09:26:42 -0700 | [diff] [blame^] | 198 | imply PHYSMEM |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 199 | |
| 200 | config SH |
| 201 | bool "SuperH architecture" |
Masahiro Yamada | 9520b71 | 2014-10-24 01:30:43 +0900 | [diff] [blame] | 202 | select HAVE_PRIVATE_LIBGCC |
Marek Vasut | 8fc9fa1 | 2019-08-31 18:27:58 +0200 | [diff] [blame] | 203 | select SUPPORT_OF_CONTROL |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 204 | |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 205 | config X86 |
| 206 | bool "x86 architecture" |
Simon Glass | c9ae1ae | 2019-04-25 21:58:45 -0600 | [diff] [blame] | 207 | select SUPPORT_SPL |
| 208 | select SUPPORT_TPL |
Masahiro Yamada | 5865450 | 2015-07-15 20:59:29 +0900 | [diff] [blame] | 209 | select CREATE_ARCH_SYMLINK |
Masahiro Yamada | 5ef5ccc | 2015-03-31 12:47:53 +0900 | [diff] [blame] | 210 | select DM |
Bin Meng | 59c4aa4 | 2018-10-15 02:21:16 -0700 | [diff] [blame] | 211 | select HAVE_ARCH_IOMAP |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 212 | select HAVE_PRIVATE_LIBGCC |
| 213 | select OF_CONTROL |
Bin Meng | 0e0204d | 2017-07-30 06:23:16 -0700 | [diff] [blame] | 214 | select PCI |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 215 | select SUPPORT_OF_CONTROL |
Tom Rini | 3ef67ae | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 216 | select SYS_CACHE_SHIFT_6 |
Bin Meng | f0e1c3e | 2017-07-30 06:23:07 -0700 | [diff] [blame] | 217 | select TIMER |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 218 | select USE_PRIVATE_LIBGCC |
Bin Meng | f0e1c3e | 2017-07-30 06:23:07 -0700 | [diff] [blame] | 219 | select X86_TSC_TIMER |
Wasim Khan | 4a7fef7 | 2021-03-08 16:48:15 +0100 | [diff] [blame] | 220 | select IRQ |
Simon Glass | f69c009 | 2020-07-19 13:55:52 -0600 | [diff] [blame] | 221 | imply HAS_ROM if X86_RESET_VECTOR |
Bin Meng | 73f5bc1 | 2017-07-30 19:24:02 -0700 | [diff] [blame] | 222 | imply BLK |
Michal Simek | 2e7c819 | 2018-07-23 15:55:14 +0200 | [diff] [blame] | 223 | imply CMD_DM |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 224 | imply CMD_FPGA_LOADMK |
| 225 | imply CMD_GETTIME |
| 226 | imply CMD_IO |
| 227 | imply CMD_IRQ |
| 228 | imply CMD_PCI |
Tom Rini | e5289a7 | 2019-05-29 17:01:28 -0400 | [diff] [blame] | 229 | imply CMD_SF |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 230 | imply CMD_SF_TEST |
| 231 | imply CMD_ZBOOT |
Bin Meng | 0e0204d | 2017-07-30 06:23:16 -0700 | [diff] [blame] | 232 | imply DM_ETH |
| 233 | imply DM_GPIO |
| 234 | imply DM_KEYBOARD |
Simon Glass | 828b725 | 2017-07-30 19:24:01 -0700 | [diff] [blame] | 235 | imply DM_MMC |
Bin Meng | 0e0204d | 2017-07-30 06:23:16 -0700 | [diff] [blame] | 236 | imply DM_RTC |
Bin Meng | 73f5bc1 | 2017-07-30 19:24:02 -0700 | [diff] [blame] | 237 | imply DM_SCSI |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 238 | imply DM_SERIAL |
Bin Meng | 0e0204d | 2017-07-30 06:23:16 -0700 | [diff] [blame] | 239 | imply DM_SPI |
| 240 | imply DM_SPI_FLASH |
| 241 | imply DM_USB |
| 242 | imply DM_VIDEO |
Bin Meng | af5b8d2 | 2018-07-19 03:07:33 -0700 | [diff] [blame] | 243 | imply SYSRESET |
Kever Yang | 525ea47 | 2019-04-02 20:41:25 +0800 | [diff] [blame] | 244 | imply SPL_SYSRESET |
Bin Meng | af5b8d2 | 2018-07-19 03:07:33 -0700 | [diff] [blame] | 245 | imply SYSRESET_X86 |
Chris Packham | b110e11 | 2017-08-28 20:50:46 +1200 | [diff] [blame] | 246 | imply USB_ETHER_ASIX |
| 247 | imply USB_ETHER_SMSC95XX |
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 248 | imply USB_HOST_ETHER |
Simon Glass | 98d88f8 | 2019-02-16 20:24:49 -0700 | [diff] [blame] | 249 | imply PCH |
Simon Glass | ef9e762 | 2021-11-24 09:26:42 -0700 | [diff] [blame^] | 250 | imply PHYSMEM |
Simon Glass | 56382fb | 2019-05-02 10:52:24 -0600 | [diff] [blame] | 251 | imply RTC_MC146818 |
Simon Glass | 55f3cde | 2020-07-16 21:22:39 -0600 | [diff] [blame] | 252 | imply ACPIGEN if !QEMU |
Simon Glass | bee77f6 | 2020-11-05 06:32:17 -0700 | [diff] [blame] | 253 | imply SYSINFO if GENERATE_SMBIOS_TABLE |
| 254 | imply SYSINFO_SMBIOS if GENERATE_SMBIOS_TABLE |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 255 | |
Simon Glass | c9ae1ae | 2019-04-25 21:58:45 -0600 | [diff] [blame] | 256 | # Thing to enable for when SPL/TPL are enabled: SPL |
| 257 | imply SPL_DM |
| 258 | imply SPL_OF_LIBFDT |
Simon Glass | 284cb9c | 2021-07-10 21:14:31 -0600 | [diff] [blame] | 259 | imply SPL_DRIVERS_MISC |
Simon Glass | 035939e | 2021-07-10 21:14:30 -0600 | [diff] [blame] | 260 | imply SPL_GPIO |
Simon Glass | 7b1ecb8 | 2019-12-06 21:42:51 -0700 | [diff] [blame] | 261 | imply SPL_PINCTRL |
Simon Glass | c9ae1ae | 2019-04-25 21:58:45 -0600 | [diff] [blame] | 262 | imply SPL_LIBCOMMON_SUPPORT |
| 263 | imply SPL_LIBGENERIC_SUPPORT |
Simon Glass | f4d6039 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 264 | imply SPL_SERIAL |
Simon Glass | c9ae1ae | 2019-04-25 21:58:45 -0600 | [diff] [blame] | 265 | imply SPL_SPI_FLASH_SUPPORT |
Simon Glass | a582047 | 2021-08-08 12:20:14 -0600 | [diff] [blame] | 266 | imply SPL_SPI |
Simon Glass | c9ae1ae | 2019-04-25 21:58:45 -0600 | [diff] [blame] | 267 | imply SPL_OF_CONTROL |
| 268 | imply SPL_TIMER |
| 269 | imply SPL_REGMAP |
| 270 | imply SPL_SYSCON |
| 271 | # TPL |
| 272 | imply TPL_DM |
Simon Glass | 284cb9c | 2021-07-10 21:14:31 -0600 | [diff] [blame] | 273 | imply TPL_DRIVERS_MISC |
Simon Glass | 035939e | 2021-07-10 21:14:30 -0600 | [diff] [blame] | 274 | imply TPL_GPIO |
Simon Glass | 7b1ecb8 | 2019-12-06 21:42:51 -0700 | [diff] [blame] | 275 | imply TPL_PINCTRL |
Simon Glass | c9ae1ae | 2019-04-25 21:58:45 -0600 | [diff] [blame] | 276 | imply TPL_LIBCOMMON_SUPPORT |
| 277 | imply TPL_LIBGENERIC_SUPPORT |
Simon Glass | f4d6039 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 278 | imply TPL_SERIAL |
Simon Glass | c9ae1ae | 2019-04-25 21:58:45 -0600 | [diff] [blame] | 279 | imply TPL_OF_CONTROL |
| 280 | imply TPL_TIMER |
| 281 | imply TPL_REGMAP |
| 282 | imply TPL_SYSCON |
| 283 | |
Chris Zankel | 1387dab | 2016-08-10 18:36:44 +0300 | [diff] [blame] | 284 | config XTENSA |
| 285 | bool "Xtensa architecture" |
| 286 | select CREATE_ARCH_SYMLINK |
| 287 | select SUPPORT_OF_CONTROL |
| 288 | |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 289 | endchoice |
| 290 | |
Masahiro Yamada | 52a5f97 | 2014-09-14 03:01:48 +0900 | [diff] [blame] | 291 | config SYS_ARCH |
| 292 | string |
| 293 | help |
| 294 | This option should contain the architecture name to build the |
| 295 | appropriate arch/<CONFIG_SYS_ARCH> directory. |
| 296 | All the architectures should specify this option correctly. |
| 297 | |
| 298 | config SYS_CPU |
| 299 | string |
| 300 | help |
| 301 | This option should contain the CPU name to build the correct |
| 302 | arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory. |
| 303 | |
| 304 | This is optional. For those targets without the CPU directory, |
| 305 | leave this option empty. |
| 306 | |
| 307 | config SYS_SOC |
| 308 | string |
| 309 | help |
| 310 | This option should contain the SoC name to build the directory |
| 311 | arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>. |
| 312 | |
| 313 | This is optional. For those targets without the SoC directory, |
| 314 | leave this option empty. |
| 315 | |
| 316 | config SYS_VENDOR |
| 317 | string |
| 318 | help |
| 319 | This option should contain the vendor name of the target board. |
| 320 | If it is set and |
| 321 | board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common |
| 322 | directory is compiled. |
| 323 | If CONFIG_SYS_BOARD is also set, the sources under |
| 324 | board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled. |
| 325 | |
| 326 | This is optional. For those targets without the vendor directory, |
| 327 | leave this option empty. |
| 328 | |
| 329 | config SYS_BOARD |
| 330 | string |
| 331 | help |
| 332 | This option should contain the name of the target board. |
| 333 | If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> |
| 334 | or board/<CONFIG_SYS_BOARD> directory is compiled depending on |
| 335 | whether CONFIG_SYS_VENDOR is set or not. |
| 336 | |
| 337 | This is optional. For those targets without the board directory, |
| 338 | leave this option empty. |
| 339 | |
| 340 | config SYS_CONFIG_NAME |
| 341 | string |
| 342 | help |
| 343 | This option should contain the base name of board header file. |
| 344 | The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h |
| 345 | should be included from include/config.h. |
| 346 | |
Vignesh Raghavendra | 384c141 | 2019-04-22 21:43:32 +0530 | [diff] [blame] | 347 | config SYS_DISABLE_DCACHE_OPS |
| 348 | bool |
| 349 | help |
| 350 | This option disables dcache flush and dcache invalidation |
| 351 | operations. For example, on coherent systems where cache |
| 352 | operatios are not required, enable this option to avoid them. |
| 353 | Note that, its up to the individual architectures to implement |
| 354 | this functionality. |
| 355 | |
Tom Rini | e1e8544 | 2021-08-27 21:18:30 -0400 | [diff] [blame] | 356 | config SKIP_LOWLEVEL_INIT |
| 357 | bool "Skip the calls to certain low level initialization functions" |
| 358 | depends on ARM || NDS32 || MIPS || RISCV |
| 359 | help |
| 360 | If enabled, then certain low level initializations (like setting up |
| 361 | the memory controller) are omitted and/or U-Boot does not relocate |
| 362 | itself into RAM. |
| 363 | Normally this variable MUST NOT be defined. The only exception is |
| 364 | when U-Boot is loaded (to RAM) by some other boot loader or by a |
| 365 | debugger which performs these initializations itself. |
| 366 | |
| 367 | config SPL_SKIP_LOWLEVEL_INIT |
| 368 | bool "Skip the calls to certain low level initialization functions" |
| 369 | depends on SPL && (ARM || NDS32 || MIPS || RISCV) |
| 370 | help |
| 371 | If enabled, then certain low level initializations (like setting up |
| 372 | the memory controller) are omitted and/or U-Boot does not relocate |
| 373 | itself into RAM. |
| 374 | Normally this variable MUST NOT be defined. The only exception is |
| 375 | when U-Boot is loaded (to RAM) by some other boot loader or by a |
| 376 | debugger which performs these initializations itself. |
| 377 | |
| 378 | config TPL_SKIP_LOWLEVEL_INIT |
| 379 | bool "Skip the calls to certain low level initialization functions" |
| 380 | depends on SPL && ARM |
| 381 | help |
| 382 | If enabled, then certain low level initializations (like setting up |
| 383 | the memory controller) are omitted and/or U-Boot does not relocate |
| 384 | itself into RAM. |
| 385 | Normally this variable MUST NOT be defined. The only exception is |
| 386 | when U-Boot is loaded (to RAM) by some other boot loader or by a |
| 387 | debugger which performs these initializations itself. |
| 388 | |
| 389 | config SKIP_LOWLEVEL_INIT_ONLY |
| 390 | bool "Skip the call to lowlevel_init during early boot ONLY" |
| 391 | depends on ARM |
| 392 | help |
| 393 | This allows just the call to lowlevel_init() to be skipped. The |
| 394 | normal CP15 init (such as enabling the instruction cache) is still |
| 395 | performed. |
| 396 | |
| 397 | config SPL_SKIP_LOWLEVEL_INIT_ONLY |
| 398 | bool "Skip the call to lowlevel_init during early boot ONLY" |
| 399 | depends on SPL && ARM |
| 400 | help |
| 401 | This allows just the call to lowlevel_init() to be skipped. The |
| 402 | normal CP15 init (such as enabling the instruction cache) is still |
| 403 | performed. |
| 404 | |
| 405 | config TPL_SKIP_LOWLEVEL_INIT_ONLY |
| 406 | bool "Skip the call to lowlevel_init during early boot ONLY" |
| 407 | depends on TPL && ARM |
| 408 | help |
| 409 | This allows just the call to lowlevel_init() to be skipped. The |
| 410 | normal CP15 init (such as enabling the instruction cache) is still |
| 411 | performed. |
| 412 | |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 413 | source "arch/arc/Kconfig" |
| 414 | source "arch/arm/Kconfig" |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 415 | source "arch/m68k/Kconfig" |
| 416 | source "arch/microblaze/Kconfig" |
| 417 | source "arch/mips/Kconfig" |
| 418 | source "arch/nds32/Kconfig" |
| 419 | source "arch/nios2/Kconfig" |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 420 | source "arch/powerpc/Kconfig" |
| 421 | source "arch/sandbox/Kconfig" |
| 422 | source "arch/sh/Kconfig" |
Masahiro Yamada | 804bc5e | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 423 | source "arch/x86/Kconfig" |
Chris Zankel | 1387dab | 2016-08-10 18:36:44 +0300 | [diff] [blame] | 424 | source "arch/xtensa/Kconfig" |
Rick Chen | 3301bfc | 2017-12-26 13:55:58 +0800 | [diff] [blame] | 425 | source "arch/riscv/Kconfig" |