Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2004-2008 Texas Instruments |
| 4 | * |
| 5 | * (C) Copyright 2002 |
| 6 | * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 7 | */ |
| 8 | |
Marc Zyngier | c0451ec | 2014-07-12 14:24:02 +0100 | [diff] [blame] | 9 | #include <config.h> |
Chen-Yu Tsai | a00f85d | 2016-06-19 12:38:36 +0800 | [diff] [blame] | 10 | #include <asm/psci.h> |
Marc Zyngier | c0451ec | 2014-07-12 14:24:02 +0100 | [diff] [blame] | 11 | |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 12 | OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") |
| 13 | OUTPUT_ARCH(arm) |
| 14 | ENTRY(_start) |
| 15 | SECTIONS |
| 16 | { |
Wang Dongsheng | 7eab3a6 | 2016-01-18 11:02:40 +0800 | [diff] [blame] | 17 | #if defined(CONFIG_ARMV7_SECURE_BASE) && defined(CONFIG_ARMV7_NONSEC) |
Peng Fan | 2e9e9a8 | 2015-10-23 10:13:03 +0800 | [diff] [blame] | 18 | /* |
Wang Dongsheng | 7eab3a6 | 2016-01-18 11:02:40 +0800 | [diff] [blame] | 19 | * If CONFIG_ARMV7_SECURE_BASE is true, secure code will not |
| 20 | * bundle with u-boot, and code offsets are fixed. Secure zone |
| 21 | * only needs to be copied from the loading address to |
| 22 | * CONFIG_ARMV7_SECURE_BASE, which is the linking and running |
| 23 | * address for secure code. |
Peng Fan | 2e9e9a8 | 2015-10-23 10:13:03 +0800 | [diff] [blame] | 24 | * |
Wang Dongsheng | 7eab3a6 | 2016-01-18 11:02:40 +0800 | [diff] [blame] | 25 | * If CONFIG_ARMV7_SECURE_BASE is undefined, the secure zone will |
| 26 | * be included in u-boot address space, and some absolute address |
| 27 | * were used in secure code. The absolute addresses of the secure |
| 28 | * code also needs to be relocated along with the accompanying u-boot |
| 29 | * code. |
| 30 | * |
| 31 | * So DISCARD is only for CONFIG_ARMV7_SECURE_BASE. |
Peng Fan | 2e9e9a8 | 2015-10-23 10:13:03 +0800 | [diff] [blame] | 32 | */ |
| 33 | /DISCARD/ : { *(.rel._secure*) } |
Wang Dongsheng | 7eab3a6 | 2016-01-18 11:02:40 +0800 | [diff] [blame] | 34 | #endif |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 35 | . = 0x00000000; |
| 36 | |
| 37 | . = ALIGN(4); |
| 38 | .text : |
| 39 | { |
Albert ARIBAUD | c53687e | 2013-06-11 14:17:33 +0200 | [diff] [blame] | 40 | *(.__image_copy_start) |
Albert ARIBAUD | 9852cc6 | 2014-04-15 16:13:51 +0200 | [diff] [blame] | 41 | *(.vectors) |
Stephen Warren | adddf45 | 2012-10-22 06:19:32 +0000 | [diff] [blame] | 42 | CPUDIR/start.o (.text*) |
Alexander Graf | 94a10f2 | 2018-06-12 07:48:37 +0200 | [diff] [blame] | 43 | } |
| 44 | |
| 45 | /* This needs to come before *(.text*) */ |
| 46 | .__efi_runtime_start : { |
| 47 | *(.__efi_runtime_start) |
| 48 | } |
| 49 | |
| 50 | .efi_runtime : { |
| 51 | *(.text.efi_runtime*) |
| 52 | *(.rodata.efi_runtime*) |
| 53 | *(.data.efi_runtime*) |
| 54 | } |
| 55 | |
| 56 | .__efi_runtime_stop : { |
| 57 | *(.__efi_runtime_stop) |
| 58 | } |
| 59 | |
| 60 | .text_rest : |
| 61 | { |
Stephen Warren | adddf45 | 2012-10-22 06:19:32 +0000 | [diff] [blame] | 62 | *(.text*) |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 63 | } |
Marc Zyngier | c0451ec | 2014-07-12 14:24:02 +0100 | [diff] [blame] | 64 | |
Jan Kiszka | ac31b5a | 2015-04-21 07:18:24 +0200 | [diff] [blame] | 65 | #ifdef CONFIG_ARMV7_NONSEC |
Marc Zyngier | c0451ec | 2014-07-12 14:24:02 +0100 | [diff] [blame] | 66 | |
Chen-Yu Tsai | 277a8f6 | 2016-06-19 12:38:34 +0800 | [diff] [blame] | 67 | /* Align the secure section only if we're going to use it in situ */ |
Chen-Yu Tsai | a7eb9d3 | 2018-09-06 11:56:28 +0800 | [diff] [blame] | 68 | .__secure_start |
Chen-Yu Tsai | 277a8f6 | 2016-06-19 12:38:34 +0800 | [diff] [blame] | 69 | #ifndef CONFIG_ARMV7_SECURE_BASE |
| 70 | ALIGN(CONSTANT(COMMONPAGESIZE)) |
| 71 | #endif |
Chen-Yu Tsai | a7eb9d3 | 2018-09-06 11:56:28 +0800 | [diff] [blame] | 72 | : { |
Chen-Yu Tsai | 277a8f6 | 2016-06-19 12:38:34 +0800 | [diff] [blame] | 73 | KEEP(*(.__secure_start)) |
| 74 | } |
| 75 | |
Marc Zyngier | c0451ec | 2014-07-12 14:24:02 +0100 | [diff] [blame] | 76 | #ifndef CONFIG_ARMV7_SECURE_BASE |
Tom Rini | a17db83 | 2023-01-10 11:19:31 -0500 | [diff] [blame] | 77 | #define __ARMV7_SECURE_BASE |
Chen-Yu Tsai | 72a4800 | 2016-06-07 10:54:27 +0800 | [diff] [blame] | 78 | #define __ARMV7_PSCI_STACK_IN_RAM |
Tom Rini | a17db83 | 2023-01-10 11:19:31 -0500 | [diff] [blame] | 79 | #else |
| 80 | #define __ARMV7_SECURE_BASE CONFIG_ARMV7_SECURE_BASE |
Marc Zyngier | c0451ec | 2014-07-12 14:24:02 +0100 | [diff] [blame] | 81 | #endif |
| 82 | |
Tom Rini | a17db83 | 2023-01-10 11:19:31 -0500 | [diff] [blame] | 83 | .secure_text __ARMV7_SECURE_BASE : |
Marc Zyngier | c0451ec | 2014-07-12 14:24:02 +0100 | [diff] [blame] | 84 | AT(ADDR(.__secure_start) + SIZEOF(.__secure_start)) |
| 85 | { |
| 86 | *(._secure.text) |
| 87 | } |
| 88 | |
Chen-Yu Tsai | 5ed0387 | 2016-07-05 21:45:06 +0800 | [diff] [blame] | 89 | .secure_data : AT(LOADADDR(.secure_text) + SIZEOF(.secure_text)) |
| 90 | { |
| 91 | *(._secure.data) |
| 92 | } |
| 93 | |
Masahiro Yamada | 2aa46c0 | 2016-09-26 14:21:30 +0900 | [diff] [blame] | 94 | #ifdef CONFIG_ARMV7_PSCI |
Chen-Yu Tsai | 5ed0387 | 2016-07-05 21:45:06 +0800 | [diff] [blame] | 95 | .secure_stack ALIGN(ADDR(.secure_data) + SIZEOF(.secure_data), |
Chen-Yu Tsai | a00f85d | 2016-06-19 12:38:36 +0800 | [diff] [blame] | 96 | CONSTANT(COMMONPAGESIZE)) (NOLOAD) : |
Chen-Yu Tsai | 72a4800 | 2016-06-07 10:54:27 +0800 | [diff] [blame] | 97 | #ifdef __ARMV7_PSCI_STACK_IN_RAM |
Chen-Yu Tsai | a00f85d | 2016-06-19 12:38:36 +0800 | [diff] [blame] | 98 | AT(ADDR(.secure_stack)) |
| 99 | #else |
Chen-Yu Tsai | 5ed0387 | 2016-07-05 21:45:06 +0800 | [diff] [blame] | 100 | AT(LOADADDR(.secure_data) + SIZEOF(.secure_data)) |
Chen-Yu Tsai | a00f85d | 2016-06-19 12:38:36 +0800 | [diff] [blame] | 101 | #endif |
| 102 | { |
| 103 | KEEP(*(.__secure_stack_start)) |
Masahiro Yamada | 2aa46c0 | 2016-09-26 14:21:30 +0900 | [diff] [blame] | 104 | |
Chen-Yu Tsai | a00f85d | 2016-06-19 12:38:36 +0800 | [diff] [blame] | 105 | /* Skip addreses for stack */ |
| 106 | . = . + CONFIG_ARMV7_PSCI_NR_CPUS * ARM_PSCI_STACK_SIZE; |
Masahiro Yamada | 2aa46c0 | 2016-09-26 14:21:30 +0900 | [diff] [blame] | 107 | |
Chen-Yu Tsai | a00f85d | 2016-06-19 12:38:36 +0800 | [diff] [blame] | 108 | /* Align end of stack section to page boundary */ |
| 109 | . = ALIGN(CONSTANT(COMMONPAGESIZE)); |
| 110 | |
| 111 | KEEP(*(.__secure_stack_end)) |
Chen-Yu Tsai | 3de210c | 2016-06-19 12:38:39 +0800 | [diff] [blame] | 112 | |
| 113 | #ifdef CONFIG_ARMV7_SECURE_MAX_SIZE |
| 114 | /* |
| 115 | * We are not checking (__secure_end - __secure_start) here, |
| 116 | * as these are the load addresses, and do not include the |
| 117 | * stack section. Instead, use the end of the stack section |
| 118 | * and the start of the text section. |
| 119 | */ |
| 120 | ASSERT((. - ADDR(.secure_text)) <= CONFIG_ARMV7_SECURE_MAX_SIZE, |
| 121 | "Error: secure section exceeds secure memory size"); |
| 122 | #endif |
Chen-Yu Tsai | a00f85d | 2016-06-19 12:38:36 +0800 | [diff] [blame] | 123 | } |
| 124 | |
| 125 | #ifndef __ARMV7_PSCI_STACK_IN_RAM |
| 126 | /* Reset VMA but don't allocate space if we have secure SRAM */ |
| 127 | . = LOADADDR(.secure_stack); |
Chen-Yu Tsai | 72a4800 | 2016-06-07 10:54:27 +0800 | [diff] [blame] | 128 | #endif |
| 129 | |
Masahiro Yamada | 2aa46c0 | 2016-09-26 14:21:30 +0900 | [diff] [blame] | 130 | #endif |
| 131 | |
Chen-Yu Tsai | a00f85d | 2016-06-19 12:38:36 +0800 | [diff] [blame] | 132 | .__secure_end : AT(ADDR(.__secure_end)) { |
Marc Zyngier | c0451ec | 2014-07-12 14:24:02 +0100 | [diff] [blame] | 133 | *(.__secure_end) |
| 134 | LONG(0x1d1071c); /* Must output something to reset LMA */ |
| 135 | } |
| 136 | #endif |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 137 | |
| 138 | . = ALIGN(4); |
| 139 | .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } |
| 140 | |
| 141 | . = ALIGN(4); |
| 142 | .data : { |
Stephen Warren | adddf45 | 2012-10-22 06:19:32 +0000 | [diff] [blame] | 143 | *(.data*) |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 144 | } |
| 145 | |
| 146 | . = ALIGN(4); |
| 147 | |
| 148 | . = .; |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 149 | |
| 150 | . = ALIGN(4); |
Andrew Scull | 5a9095c | 2022-05-30 10:00:04 +0000 | [diff] [blame] | 151 | __u_boot_list : { |
| 152 | KEEP(*(SORT(__u_boot_list*))); |
Marek Vasut | 607092a | 2012-10-12 10:27:03 +0000 | [diff] [blame] | 153 | } |
| 154 | |
| 155 | . = ALIGN(4); |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 156 | |
Alexander Graf | 0bd425a | 2016-03-04 01:10:01 +0100 | [diff] [blame] | 157 | .efi_runtime_rel_start : |
| 158 | { |
| 159 | *(.__efi_runtime_rel_start) |
| 160 | } |
| 161 | |
| 162 | .efi_runtime_rel : { |
Alexander Graf | 94a10f2 | 2018-06-12 07:48:37 +0200 | [diff] [blame] | 163 | *(.rel*.efi_runtime) |
| 164 | *(.rel*.efi_runtime.*) |
Alexander Graf | 0bd425a | 2016-03-04 01:10:01 +0100 | [diff] [blame] | 165 | } |
| 166 | |
| 167 | .efi_runtime_rel_stop : |
| 168 | { |
| 169 | *(.__efi_runtime_rel_stop) |
| 170 | } |
| 171 | |
Tom Rini | 06ca0cf | 2017-06-14 09:13:21 -0400 | [diff] [blame] | 172 | . = ALIGN(4); |
Alexander Graf | 0bd425a | 2016-03-04 01:10:01 +0100 | [diff] [blame] | 173 | |
Albert ARIBAUD | c53687e | 2013-06-11 14:17:33 +0200 | [diff] [blame] | 174 | .image_copy_end : |
| 175 | { |
| 176 | *(.__image_copy_end) |
| 177 | } |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 178 | |
Albert ARIBAUD | af3ff16 | 2013-06-11 14:17:34 +0200 | [diff] [blame] | 179 | .rel_dyn_start : |
| 180 | { |
| 181 | *(.__rel_dyn_start) |
| 182 | } |
| 183 | |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 184 | .rel.dyn : { |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 185 | *(.rel*) |
Albert ARIBAUD | af3ff16 | 2013-06-11 14:17:34 +0200 | [diff] [blame] | 186 | } |
| 187 | |
| 188 | .rel_dyn_end : |
| 189 | { |
| 190 | *(.__rel_dyn_end) |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 191 | } |
| 192 | |
Albert ARIBAUD | 9d25fa4 | 2014-02-22 17:53:42 +0100 | [diff] [blame] | 193 | .end : |
| 194 | { |
| 195 | *(.__end) |
| 196 | } |
| 197 | |
| 198 | _image_binary_end = .; |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 199 | |
| 200 | /* |
| 201 | * Deprecated: this MMU section is used by pxa at present but |
| 202 | * should not be used by new boards/CPUs. |
| 203 | */ |
| 204 | . = ALIGN(4096); |
| 205 | .mmutable : { |
| 206 | *(.mmutable) |
| 207 | } |
| 208 | |
Albert ARIBAUD | ba5662d | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 209 | /* |
| 210 | * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c |
| 211 | * __bss_base and __bss_limit are for linker only (overlay ordering) |
| 212 | */ |
| 213 | |
Albert ARIBAUD | 436f632 | 2013-02-25 00:58:59 +0000 | [diff] [blame] | 214 | .bss_start __rel_dyn_start (OVERLAY) : { |
| 215 | KEEP(*(.__bss_start)); |
Albert ARIBAUD | ba5662d | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 216 | __bss_base = .; |
Albert ARIBAUD | 436f632 | 2013-02-25 00:58:59 +0000 | [diff] [blame] | 217 | } |
| 218 | |
Albert ARIBAUD | ba5662d | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 219 | .bss __bss_base (OVERLAY) : { |
Stephen Warren | adddf45 | 2012-10-22 06:19:32 +0000 | [diff] [blame] | 220 | *(.bss*) |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 221 | . = ALIGN(4); |
Albert ARIBAUD | ba5662d | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 222 | __bss_limit = .; |
Albert ARIBAUD | 436f632 | 2013-02-25 00:58:59 +0000 | [diff] [blame] | 223 | } |
Tom Rini | 19aac97 | 2013-03-18 12:31:00 -0400 | [diff] [blame] | 224 | |
Albert ARIBAUD | ba5662d | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 225 | .bss_end __bss_limit (OVERLAY) : { |
| 226 | KEEP(*(.__bss_end)); |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 227 | } |
| 228 | |
Albert ARIBAUD | 9d25fa4 | 2014-02-22 17:53:42 +0100 | [diff] [blame] | 229 | .dynsym _image_binary_end : { *(.dynsym) } |
Albert ARIBAUD | 95fc6d6 | 2013-11-07 14:21:46 +0100 | [diff] [blame] | 230 | .dynbss : { *(.dynbss) } |
| 231 | .dynstr : { *(.dynstr*) } |
| 232 | .dynamic : { *(.dynamic*) } |
| 233 | .plt : { *(.plt*) } |
| 234 | .interp : { *(.interp*) } |
Andreas Färber | 438a167 | 2014-01-27 05:48:11 +0100 | [diff] [blame] | 235 | .gnu.hash : { *(.gnu.hash) } |
Albert ARIBAUD | 95fc6d6 | 2013-11-07 14:21:46 +0100 | [diff] [blame] | 236 | .gnu : { *(.gnu*) } |
| 237 | .ARM.exidx : { *(.ARM.exidx*) } |
Albert ARIBAUD | ddadbed | 2014-01-13 14:57:05 +0100 | [diff] [blame] | 238 | .gnu.linkonce.armexidx : { *(.gnu.linkonce.armexidx.*) } |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 239 | } |