blob: 7724c9332c3b012d08b7df05612ae28e5aa528e6 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Simon Glass437e2b82012-02-23 03:28:41 +00002/*
3 * Copyright (c) 2004-2008 Texas Instruments
4 *
5 * (C) Copyright 2002
6 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
Simon Glass437e2b82012-02-23 03:28:41 +00007 */
8
Marc Zyngierc0451ec2014-07-12 14:24:02 +01009#include <config.h>
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +080010#include <asm/psci.h>
Marc Zyngierc0451ec2014-07-12 14:24:02 +010011
Simon Glass437e2b82012-02-23 03:28:41 +000012OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
13OUTPUT_ARCH(arm)
14ENTRY(_start)
15SECTIONS
16{
Wang Dongsheng7eab3a62016-01-18 11:02:40 +080017#if defined(CONFIG_ARMV7_SECURE_BASE) && defined(CONFIG_ARMV7_NONSEC)
Peng Fan2e9e9a82015-10-23 10:13:03 +080018 /*
Wang Dongsheng7eab3a62016-01-18 11:02:40 +080019 * If CONFIG_ARMV7_SECURE_BASE is true, secure code will not
20 * bundle with u-boot, and code offsets are fixed. Secure zone
21 * only needs to be copied from the loading address to
22 * CONFIG_ARMV7_SECURE_BASE, which is the linking and running
23 * address for secure code.
Peng Fan2e9e9a82015-10-23 10:13:03 +080024 *
Wang Dongsheng7eab3a62016-01-18 11:02:40 +080025 * If CONFIG_ARMV7_SECURE_BASE is undefined, the secure zone will
26 * be included in u-boot address space, and some absolute address
27 * were used in secure code. The absolute addresses of the secure
28 * code also needs to be relocated along with the accompanying u-boot
29 * code.
30 *
31 * So DISCARD is only for CONFIG_ARMV7_SECURE_BASE.
Peng Fan2e9e9a82015-10-23 10:13:03 +080032 */
33 /DISCARD/ : { *(.rel._secure*) }
Wang Dongsheng7eab3a62016-01-18 11:02:40 +080034#endif
Simon Glass437e2b82012-02-23 03:28:41 +000035 . = 0x00000000;
36
37 . = ALIGN(4);
38 .text :
39 {
Albert ARIBAUDc53687e2013-06-11 14:17:33 +020040 *(.__image_copy_start)
Albert ARIBAUD9852cc62014-04-15 16:13:51 +020041 *(.vectors)
Stephen Warrenadddf452012-10-22 06:19:32 +000042 CPUDIR/start.o (.text*)
Alexander Graf94a10f22018-06-12 07:48:37 +020043 }
44
45 /* This needs to come before *(.text*) */
46 .__efi_runtime_start : {
47 *(.__efi_runtime_start)
48 }
49
50 .efi_runtime : {
51 *(.text.efi_runtime*)
52 *(.rodata.efi_runtime*)
53 *(.data.efi_runtime*)
54 }
55
56 .__efi_runtime_stop : {
57 *(.__efi_runtime_stop)
58 }
59
60 .text_rest :
61 {
Stephen Warrenadddf452012-10-22 06:19:32 +000062 *(.text*)
Simon Glass437e2b82012-02-23 03:28:41 +000063 }
Marc Zyngierc0451ec2014-07-12 14:24:02 +010064
Jan Kiszkaac31b5a2015-04-21 07:18:24 +020065#ifdef CONFIG_ARMV7_NONSEC
Marc Zyngierc0451ec2014-07-12 14:24:02 +010066
Chen-Yu Tsai277a8f62016-06-19 12:38:34 +080067 /* Align the secure section only if we're going to use it in situ */
Chen-Yu Tsaia7eb9d32018-09-06 11:56:28 +080068 .__secure_start
Chen-Yu Tsai277a8f62016-06-19 12:38:34 +080069#ifndef CONFIG_ARMV7_SECURE_BASE
70 ALIGN(CONSTANT(COMMONPAGESIZE))
71#endif
Chen-Yu Tsaia7eb9d32018-09-06 11:56:28 +080072 : {
Chen-Yu Tsai277a8f62016-06-19 12:38:34 +080073 KEEP(*(.__secure_start))
74 }
75
Marc Zyngierc0451ec2014-07-12 14:24:02 +010076#ifndef CONFIG_ARMV7_SECURE_BASE
Tom Rinia17db832023-01-10 11:19:31 -050077#define __ARMV7_SECURE_BASE
Chen-Yu Tsai72a48002016-06-07 10:54:27 +080078#define __ARMV7_PSCI_STACK_IN_RAM
Tom Rinia17db832023-01-10 11:19:31 -050079#else
80#define __ARMV7_SECURE_BASE CONFIG_ARMV7_SECURE_BASE
Marc Zyngierc0451ec2014-07-12 14:24:02 +010081#endif
82
Tom Rinia17db832023-01-10 11:19:31 -050083 .secure_text __ARMV7_SECURE_BASE :
Marc Zyngierc0451ec2014-07-12 14:24:02 +010084 AT(ADDR(.__secure_start) + SIZEOF(.__secure_start))
85 {
86 *(._secure.text)
87 }
88
Chen-Yu Tsai5ed03872016-07-05 21:45:06 +080089 .secure_data : AT(LOADADDR(.secure_text) + SIZEOF(.secure_text))
90 {
91 *(._secure.data)
92 }
93
Masahiro Yamada2aa46c02016-09-26 14:21:30 +090094#ifdef CONFIG_ARMV7_PSCI
Chen-Yu Tsai5ed03872016-07-05 21:45:06 +080095 .secure_stack ALIGN(ADDR(.secure_data) + SIZEOF(.secure_data),
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +080096 CONSTANT(COMMONPAGESIZE)) (NOLOAD) :
Chen-Yu Tsai72a48002016-06-07 10:54:27 +080097#ifdef __ARMV7_PSCI_STACK_IN_RAM
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +080098 AT(ADDR(.secure_stack))
99#else
Chen-Yu Tsai5ed03872016-07-05 21:45:06 +0800100 AT(LOADADDR(.secure_data) + SIZEOF(.secure_data))
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +0800101#endif
102 {
103 KEEP(*(.__secure_stack_start))
Masahiro Yamada2aa46c02016-09-26 14:21:30 +0900104
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +0800105 /* Skip addreses for stack */
106 . = . + CONFIG_ARMV7_PSCI_NR_CPUS * ARM_PSCI_STACK_SIZE;
Masahiro Yamada2aa46c02016-09-26 14:21:30 +0900107
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +0800108 /* Align end of stack section to page boundary */
109 . = ALIGN(CONSTANT(COMMONPAGESIZE));
110
111 KEEP(*(.__secure_stack_end))
Chen-Yu Tsai3de210c2016-06-19 12:38:39 +0800112
113#ifdef CONFIG_ARMV7_SECURE_MAX_SIZE
114 /*
115 * We are not checking (__secure_end - __secure_start) here,
116 * as these are the load addresses, and do not include the
117 * stack section. Instead, use the end of the stack section
118 * and the start of the text section.
119 */
120 ASSERT((. - ADDR(.secure_text)) <= CONFIG_ARMV7_SECURE_MAX_SIZE,
121 "Error: secure section exceeds secure memory size");
122#endif
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +0800123 }
124
125#ifndef __ARMV7_PSCI_STACK_IN_RAM
126 /* Reset VMA but don't allocate space if we have secure SRAM */
127 . = LOADADDR(.secure_stack);
Chen-Yu Tsai72a48002016-06-07 10:54:27 +0800128#endif
129
Masahiro Yamada2aa46c02016-09-26 14:21:30 +0900130#endif
131
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +0800132 .__secure_end : AT(ADDR(.__secure_end)) {
Marc Zyngierc0451ec2014-07-12 14:24:02 +0100133 *(.__secure_end)
134 LONG(0x1d1071c); /* Must output something to reset LMA */
135 }
136#endif
Simon Glass437e2b82012-02-23 03:28:41 +0000137
138 . = ALIGN(4);
139 .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
140
141 . = ALIGN(4);
142 .data : {
Stephen Warrenadddf452012-10-22 06:19:32 +0000143 *(.data*)
Simon Glass437e2b82012-02-23 03:28:41 +0000144 }
145
146 . = ALIGN(4);
147
148 . = .;
Simon Glass437e2b82012-02-23 03:28:41 +0000149
150 . = ALIGN(4);
Andrew Scull5a9095c2022-05-30 10:00:04 +0000151 __u_boot_list : {
152 KEEP(*(SORT(__u_boot_list*)));
Marek Vasut607092a2012-10-12 10:27:03 +0000153 }
154
155 . = ALIGN(4);
Simon Glass437e2b82012-02-23 03:28:41 +0000156
Alexander Graf0bd425a2016-03-04 01:10:01 +0100157 .efi_runtime_rel_start :
158 {
159 *(.__efi_runtime_rel_start)
160 }
161
162 .efi_runtime_rel : {
Alexander Graf94a10f22018-06-12 07:48:37 +0200163 *(.rel*.efi_runtime)
164 *(.rel*.efi_runtime.*)
Alexander Graf0bd425a2016-03-04 01:10:01 +0100165 }
166
167 .efi_runtime_rel_stop :
168 {
169 *(.__efi_runtime_rel_stop)
170 }
171
Tom Rini06ca0cf2017-06-14 09:13:21 -0400172 . = ALIGN(4);
Alexander Graf0bd425a2016-03-04 01:10:01 +0100173
Albert ARIBAUDc53687e2013-06-11 14:17:33 +0200174 .image_copy_end :
175 {
176 *(.__image_copy_end)
177 }
Simon Glass437e2b82012-02-23 03:28:41 +0000178
Albert ARIBAUDaf3ff162013-06-11 14:17:34 +0200179 .rel_dyn_start :
180 {
181 *(.__rel_dyn_start)
182 }
183
Simon Glass437e2b82012-02-23 03:28:41 +0000184 .rel.dyn : {
Simon Glass437e2b82012-02-23 03:28:41 +0000185 *(.rel*)
Albert ARIBAUDaf3ff162013-06-11 14:17:34 +0200186 }
187
188 .rel_dyn_end :
189 {
190 *(.__rel_dyn_end)
Simon Glass437e2b82012-02-23 03:28:41 +0000191 }
192
Albert ARIBAUD9d25fa42014-02-22 17:53:42 +0100193 .end :
194 {
195 *(.__end)
196 }
197
198 _image_binary_end = .;
Simon Glass437e2b82012-02-23 03:28:41 +0000199
200 /*
201 * Deprecated: this MMU section is used by pxa at present but
202 * should not be used by new boards/CPUs.
203 */
204 . = ALIGN(4096);
205 .mmutable : {
206 *(.mmutable)
207 }
208
Albert ARIBAUDba5662d2013-04-11 05:43:21 +0000209/*
210 * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
211 * __bss_base and __bss_limit are for linker only (overlay ordering)
212 */
213
Albert ARIBAUD436f6322013-02-25 00:58:59 +0000214 .bss_start __rel_dyn_start (OVERLAY) : {
215 KEEP(*(.__bss_start));
Albert ARIBAUDba5662d2013-04-11 05:43:21 +0000216 __bss_base = .;
Albert ARIBAUD436f6322013-02-25 00:58:59 +0000217 }
218
Albert ARIBAUDba5662d2013-04-11 05:43:21 +0000219 .bss __bss_base (OVERLAY) : {
Stephen Warrenadddf452012-10-22 06:19:32 +0000220 *(.bss*)
Simon Glass437e2b82012-02-23 03:28:41 +0000221 . = ALIGN(4);
Albert ARIBAUDba5662d2013-04-11 05:43:21 +0000222 __bss_limit = .;
Albert ARIBAUD436f6322013-02-25 00:58:59 +0000223 }
Tom Rini19aac972013-03-18 12:31:00 -0400224
Albert ARIBAUDba5662d2013-04-11 05:43:21 +0000225 .bss_end __bss_limit (OVERLAY) : {
226 KEEP(*(.__bss_end));
Simon Glass437e2b82012-02-23 03:28:41 +0000227 }
228
Albert ARIBAUD9d25fa42014-02-22 17:53:42 +0100229 .dynsym _image_binary_end : { *(.dynsym) }
Albert ARIBAUD95fc6d62013-11-07 14:21:46 +0100230 .dynbss : { *(.dynbss) }
231 .dynstr : { *(.dynstr*) }
232 .dynamic : { *(.dynamic*) }
233 .plt : { *(.plt*) }
234 .interp : { *(.interp*) }
Andreas Färber438a1672014-01-27 05:48:11 +0100235 .gnu.hash : { *(.gnu.hash) }
Albert ARIBAUD95fc6d62013-11-07 14:21:46 +0100236 .gnu : { *(.gnu*) }
237 .ARM.exidx : { *(.ARM.exidx*) }
Albert ARIBAUDddadbed2014-01-13 14:57:05 +0100238 .gnu.linkonce.armexidx : { *(.gnu.linkonce.armexidx.*) }
Simon Glass437e2b82012-02-23 03:28:41 +0000239}