Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2004-2008 Texas Instruments |
| 3 | * |
| 4 | * (C) Copyright 2002 |
| 5 | * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> |
| 6 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 7 | * SPDX-License-Identifier: GPL-2.0+ |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 8 | */ |
| 9 | |
Marc Zyngier | c0451ec | 2014-07-12 14:24:02 +0100 | [diff] [blame] | 10 | #include <config.h> |
Chen-Yu Tsai | a00f85d | 2016-06-19 12:38:36 +0800 | [diff] [blame] | 11 | #include <asm/psci.h> |
Marc Zyngier | c0451ec | 2014-07-12 14:24:02 +0100 | [diff] [blame] | 12 | |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 13 | OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") |
| 14 | OUTPUT_ARCH(arm) |
| 15 | ENTRY(_start) |
| 16 | SECTIONS |
| 17 | { |
Simon Glass | 3e2c91c | 2016-03-13 19:07:29 -0600 | [diff] [blame] | 18 | #ifndef CONFIG_CMDLINE |
| 19 | /DISCARD/ : { *(.u_boot_list_2_cmd_*) } |
| 20 | #endif |
Wang Dongsheng | 7eab3a6 | 2016-01-18 11:02:40 +0800 | [diff] [blame] | 21 | #if defined(CONFIG_ARMV7_SECURE_BASE) && defined(CONFIG_ARMV7_NONSEC) |
Peng Fan | 2e9e9a8 | 2015-10-23 10:13:03 +0800 | [diff] [blame] | 22 | /* |
Wang Dongsheng | 7eab3a6 | 2016-01-18 11:02:40 +0800 | [diff] [blame] | 23 | * If CONFIG_ARMV7_SECURE_BASE is true, secure code will not |
| 24 | * bundle with u-boot, and code offsets are fixed. Secure zone |
| 25 | * only needs to be copied from the loading address to |
| 26 | * CONFIG_ARMV7_SECURE_BASE, which is the linking and running |
| 27 | * address for secure code. |
Peng Fan | 2e9e9a8 | 2015-10-23 10:13:03 +0800 | [diff] [blame] | 28 | * |
Wang Dongsheng | 7eab3a6 | 2016-01-18 11:02:40 +0800 | [diff] [blame] | 29 | * If CONFIG_ARMV7_SECURE_BASE is undefined, the secure zone will |
| 30 | * be included in u-boot address space, and some absolute address |
| 31 | * were used in secure code. The absolute addresses of the secure |
| 32 | * code also needs to be relocated along with the accompanying u-boot |
| 33 | * code. |
| 34 | * |
| 35 | * So DISCARD is only for CONFIG_ARMV7_SECURE_BASE. |
Peng Fan | 2e9e9a8 | 2015-10-23 10:13:03 +0800 | [diff] [blame] | 36 | */ |
| 37 | /DISCARD/ : { *(.rel._secure*) } |
Wang Dongsheng | 7eab3a6 | 2016-01-18 11:02:40 +0800 | [diff] [blame] | 38 | #endif |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 39 | . = 0x00000000; |
| 40 | |
| 41 | . = ALIGN(4); |
| 42 | .text : |
| 43 | { |
Albert ARIBAUD | c53687e | 2013-06-11 14:17:33 +0200 | [diff] [blame] | 44 | *(.__image_copy_start) |
Albert ARIBAUD | 9852cc6 | 2014-04-15 16:13:51 +0200 | [diff] [blame] | 45 | *(.vectors) |
Stephen Warren | adddf45 | 2012-10-22 06:19:32 +0000 | [diff] [blame] | 46 | CPUDIR/start.o (.text*) |
| 47 | *(.text*) |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 48 | } |
Marc Zyngier | c0451ec | 2014-07-12 14:24:02 +0100 | [diff] [blame] | 49 | |
Jan Kiszka | ac31b5a | 2015-04-21 07:18:24 +0200 | [diff] [blame] | 50 | #ifdef CONFIG_ARMV7_NONSEC |
Marc Zyngier | c0451ec | 2014-07-12 14:24:02 +0100 | [diff] [blame] | 51 | |
Chen-Yu Tsai | 277a8f6 | 2016-06-19 12:38:34 +0800 | [diff] [blame] | 52 | /* Align the secure section only if we're going to use it in situ */ |
| 53 | .__secure_start : |
| 54 | #ifndef CONFIG_ARMV7_SECURE_BASE |
| 55 | ALIGN(CONSTANT(COMMONPAGESIZE)) |
| 56 | #endif |
| 57 | { |
| 58 | KEEP(*(.__secure_start)) |
| 59 | } |
| 60 | |
Marc Zyngier | c0451ec | 2014-07-12 14:24:02 +0100 | [diff] [blame] | 61 | #ifndef CONFIG_ARMV7_SECURE_BASE |
| 62 | #define CONFIG_ARMV7_SECURE_BASE |
Chen-Yu Tsai | 72a4800 | 2016-06-07 10:54:27 +0800 | [diff] [blame] | 63 | #define __ARMV7_PSCI_STACK_IN_RAM |
Marc Zyngier | c0451ec | 2014-07-12 14:24:02 +0100 | [diff] [blame] | 64 | #endif |
| 65 | |
Marc Zyngier | c0451ec | 2014-07-12 14:24:02 +0100 | [diff] [blame] | 66 | .secure_text CONFIG_ARMV7_SECURE_BASE : |
| 67 | AT(ADDR(.__secure_start) + SIZEOF(.__secure_start)) |
| 68 | { |
| 69 | *(._secure.text) |
| 70 | } |
| 71 | |
Chen-Yu Tsai | 5ed0387 | 2016-07-05 21:45:06 +0800 | [diff] [blame^] | 72 | .secure_data : AT(LOADADDR(.secure_text) + SIZEOF(.secure_text)) |
| 73 | { |
| 74 | *(._secure.data) |
| 75 | } |
| 76 | |
| 77 | .secure_stack ALIGN(ADDR(.secure_data) + SIZEOF(.secure_data), |
Chen-Yu Tsai | a00f85d | 2016-06-19 12:38:36 +0800 | [diff] [blame] | 78 | CONSTANT(COMMONPAGESIZE)) (NOLOAD) : |
Chen-Yu Tsai | 72a4800 | 2016-06-07 10:54:27 +0800 | [diff] [blame] | 79 | #ifdef __ARMV7_PSCI_STACK_IN_RAM |
Chen-Yu Tsai | a00f85d | 2016-06-19 12:38:36 +0800 | [diff] [blame] | 80 | AT(ADDR(.secure_stack)) |
| 81 | #else |
Chen-Yu Tsai | 5ed0387 | 2016-07-05 21:45:06 +0800 | [diff] [blame^] | 82 | AT(LOADADDR(.secure_data) + SIZEOF(.secure_data)) |
Chen-Yu Tsai | a00f85d | 2016-06-19 12:38:36 +0800 | [diff] [blame] | 83 | #endif |
| 84 | { |
| 85 | KEEP(*(.__secure_stack_start)) |
| 86 | |
| 87 | /* Skip addreses for stack */ |
| 88 | . = . + CONFIG_ARMV7_PSCI_NR_CPUS * ARM_PSCI_STACK_SIZE; |
| 89 | |
| 90 | /* Align end of stack section to page boundary */ |
| 91 | . = ALIGN(CONSTANT(COMMONPAGESIZE)); |
| 92 | |
| 93 | KEEP(*(.__secure_stack_end)) |
Chen-Yu Tsai | 3de210c | 2016-06-19 12:38:39 +0800 | [diff] [blame] | 94 | |
| 95 | #ifdef CONFIG_ARMV7_SECURE_MAX_SIZE |
| 96 | /* |
| 97 | * We are not checking (__secure_end - __secure_start) here, |
| 98 | * as these are the load addresses, and do not include the |
| 99 | * stack section. Instead, use the end of the stack section |
| 100 | * and the start of the text section. |
| 101 | */ |
| 102 | ASSERT((. - ADDR(.secure_text)) <= CONFIG_ARMV7_SECURE_MAX_SIZE, |
| 103 | "Error: secure section exceeds secure memory size"); |
| 104 | #endif |
Chen-Yu Tsai | a00f85d | 2016-06-19 12:38:36 +0800 | [diff] [blame] | 105 | } |
| 106 | |
| 107 | #ifndef __ARMV7_PSCI_STACK_IN_RAM |
| 108 | /* Reset VMA but don't allocate space if we have secure SRAM */ |
| 109 | . = LOADADDR(.secure_stack); |
Chen-Yu Tsai | 72a4800 | 2016-06-07 10:54:27 +0800 | [diff] [blame] | 110 | #endif |
| 111 | |
Chen-Yu Tsai | a00f85d | 2016-06-19 12:38:36 +0800 | [diff] [blame] | 112 | .__secure_end : AT(ADDR(.__secure_end)) { |
Marc Zyngier | c0451ec | 2014-07-12 14:24:02 +0100 | [diff] [blame] | 113 | *(.__secure_end) |
| 114 | LONG(0x1d1071c); /* Must output something to reset LMA */ |
| 115 | } |
| 116 | #endif |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 117 | |
| 118 | . = ALIGN(4); |
| 119 | .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } |
| 120 | |
| 121 | . = ALIGN(4); |
| 122 | .data : { |
Stephen Warren | adddf45 | 2012-10-22 06:19:32 +0000 | [diff] [blame] | 123 | *(.data*) |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 124 | } |
| 125 | |
| 126 | . = ALIGN(4); |
| 127 | |
| 128 | . = .; |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 129 | |
| 130 | . = ALIGN(4); |
Marek Vasut | 607092a | 2012-10-12 10:27:03 +0000 | [diff] [blame] | 131 | .u_boot_list : { |
Albert ARIBAUD | c24895e | 2013-02-25 00:59:00 +0000 | [diff] [blame] | 132 | KEEP(*(SORT(.u_boot_list*))); |
Marek Vasut | 607092a | 2012-10-12 10:27:03 +0000 | [diff] [blame] | 133 | } |
| 134 | |
| 135 | . = ALIGN(4); |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 136 | |
Alexander Graf | 0bd425a | 2016-03-04 01:10:01 +0100 | [diff] [blame] | 137 | .__efi_runtime_start : { |
| 138 | *(.__efi_runtime_start) |
| 139 | } |
| 140 | |
| 141 | .efi_runtime : { |
| 142 | *(efi_runtime_text) |
| 143 | *(efi_runtime_data) |
| 144 | } |
| 145 | |
| 146 | .__efi_runtime_stop : { |
| 147 | *(.__efi_runtime_stop) |
| 148 | } |
| 149 | |
| 150 | .efi_runtime_rel_start : |
| 151 | { |
| 152 | *(.__efi_runtime_rel_start) |
| 153 | } |
| 154 | |
| 155 | .efi_runtime_rel : { |
| 156 | *(.relefi_runtime_text) |
| 157 | *(.relefi_runtime_data) |
| 158 | } |
| 159 | |
| 160 | .efi_runtime_rel_stop : |
| 161 | { |
| 162 | *(.__efi_runtime_rel_stop) |
| 163 | } |
| 164 | |
| 165 | . = ALIGN(4); |
| 166 | |
Albert ARIBAUD | c53687e | 2013-06-11 14:17:33 +0200 | [diff] [blame] | 167 | .image_copy_end : |
| 168 | { |
| 169 | *(.__image_copy_end) |
| 170 | } |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 171 | |
Albert ARIBAUD | af3ff16 | 2013-06-11 14:17:34 +0200 | [diff] [blame] | 172 | .rel_dyn_start : |
| 173 | { |
| 174 | *(.__rel_dyn_start) |
| 175 | } |
| 176 | |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 177 | .rel.dyn : { |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 178 | *(.rel*) |
Albert ARIBAUD | af3ff16 | 2013-06-11 14:17:34 +0200 | [diff] [blame] | 179 | } |
| 180 | |
| 181 | .rel_dyn_end : |
| 182 | { |
| 183 | *(.__rel_dyn_end) |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 184 | } |
| 185 | |
Albert ARIBAUD | 9d25fa4 | 2014-02-22 17:53:42 +0100 | [diff] [blame] | 186 | .end : |
| 187 | { |
| 188 | *(.__end) |
| 189 | } |
| 190 | |
| 191 | _image_binary_end = .; |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 192 | |
| 193 | /* |
| 194 | * Deprecated: this MMU section is used by pxa at present but |
| 195 | * should not be used by new boards/CPUs. |
| 196 | */ |
| 197 | . = ALIGN(4096); |
| 198 | .mmutable : { |
| 199 | *(.mmutable) |
| 200 | } |
| 201 | |
Albert ARIBAUD | ba5662d | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 202 | /* |
| 203 | * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c |
| 204 | * __bss_base and __bss_limit are for linker only (overlay ordering) |
| 205 | */ |
| 206 | |
Albert ARIBAUD | 436f632 | 2013-02-25 00:58:59 +0000 | [diff] [blame] | 207 | .bss_start __rel_dyn_start (OVERLAY) : { |
| 208 | KEEP(*(.__bss_start)); |
Albert ARIBAUD | ba5662d | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 209 | __bss_base = .; |
Albert ARIBAUD | 436f632 | 2013-02-25 00:58:59 +0000 | [diff] [blame] | 210 | } |
| 211 | |
Albert ARIBAUD | ba5662d | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 212 | .bss __bss_base (OVERLAY) : { |
Stephen Warren | adddf45 | 2012-10-22 06:19:32 +0000 | [diff] [blame] | 213 | *(.bss*) |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 214 | . = ALIGN(4); |
Albert ARIBAUD | ba5662d | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 215 | __bss_limit = .; |
Albert ARIBAUD | 436f632 | 2013-02-25 00:58:59 +0000 | [diff] [blame] | 216 | } |
Tom Rini | 19aac97 | 2013-03-18 12:31:00 -0400 | [diff] [blame] | 217 | |
Albert ARIBAUD | ba5662d | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 218 | .bss_end __bss_limit (OVERLAY) : { |
| 219 | KEEP(*(.__bss_end)); |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 220 | } |
| 221 | |
Albert ARIBAUD | 9d25fa4 | 2014-02-22 17:53:42 +0100 | [diff] [blame] | 222 | .dynsym _image_binary_end : { *(.dynsym) } |
Albert ARIBAUD | 95fc6d6 | 2013-11-07 14:21:46 +0100 | [diff] [blame] | 223 | .dynbss : { *(.dynbss) } |
| 224 | .dynstr : { *(.dynstr*) } |
| 225 | .dynamic : { *(.dynamic*) } |
| 226 | .plt : { *(.plt*) } |
| 227 | .interp : { *(.interp*) } |
Andreas Färber | 438a167 | 2014-01-27 05:48:11 +0100 | [diff] [blame] | 228 | .gnu.hash : { *(.gnu.hash) } |
Albert ARIBAUD | 95fc6d6 | 2013-11-07 14:21:46 +0100 | [diff] [blame] | 229 | .gnu : { *(.gnu*) } |
| 230 | .ARM.exidx : { *(.ARM.exidx*) } |
Albert ARIBAUD | ddadbed | 2014-01-13 14:57:05 +0100 | [diff] [blame] | 231 | .gnu.linkonce.armexidx : { *(.gnu.linkonce.armexidx.*) } |
Simon Glass | 437e2b8 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 232 | } |