David Feng | 3b5458c | 2013-12-14 11:47:37 +0800 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2013 |
| 3 | * David Feng <fenghua@phytium.com.cn> |
| 4 | * Sharma Bhupesh <bhupesh.sharma@freescale.com> |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0+ |
| 7 | */ |
| 8 | #include <common.h> |
Simon Glass | 11c89f3 | 2017-05-17 17:18:03 -0600 | [diff] [blame] | 9 | #include <dm.h> |
David Feng | 3b5458c | 2013-12-14 11:47:37 +0800 | [diff] [blame] | 10 | #include <malloc.h> |
| 11 | #include <errno.h> |
| 12 | #include <netdev.h> |
| 13 | #include <asm/io.h> |
| 14 | #include <linux/compiler.h> |
David Feng | ab33c2c | 2015-01-31 11:55:29 +0800 | [diff] [blame] | 15 | #include <dm/platform_data/serial_pl01x.h> |
Liviu Dudau | 8d1fdc3 | 2015-10-19 11:08:32 +0100 | [diff] [blame] | 16 | #include "pcie.h" |
Alexander Graf | 5889e39 | 2016-03-04 01:09:51 +0100 | [diff] [blame] | 17 | #include <asm/armv8/mmu.h> |
David Feng | 3b5458c | 2013-12-14 11:47:37 +0800 | [diff] [blame] | 18 | |
| 19 | DECLARE_GLOBAL_DATA_PTR; |
| 20 | |
David Feng | ab33c2c | 2015-01-31 11:55:29 +0800 | [diff] [blame] | 21 | static const struct pl01x_serial_platdata serial_platdata = { |
| 22 | .base = V2M_UART0, |
| 23 | .type = TYPE_PL011, |
Linus Walleij | 31e476e | 2015-04-14 10:01:35 +0200 | [diff] [blame] | 24 | .clock = CONFIG_PL011_CLOCK, |
David Feng | ab33c2c | 2015-01-31 11:55:29 +0800 | [diff] [blame] | 25 | }; |
| 26 | |
| 27 | U_BOOT_DEVICE(vexpress_serials) = { |
| 28 | .name = "serial_pl01x", |
| 29 | .platdata = &serial_platdata, |
| 30 | }; |
| 31 | |
Alexander Graf | 5889e39 | 2016-03-04 01:09:51 +0100 | [diff] [blame] | 32 | static struct mm_region vexpress64_mem_map[] = { |
| 33 | { |
York Sun | c7104e5 | 2016-06-24 16:46:22 -0700 | [diff] [blame] | 34 | .virt = 0x0UL, |
| 35 | .phys = 0x0UL, |
Alexander Graf | 5889e39 | 2016-03-04 01:09:51 +0100 | [diff] [blame] | 36 | .size = 0x80000000UL, |
| 37 | .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | |
| 38 | PTE_BLOCK_NON_SHARE | |
| 39 | PTE_BLOCK_PXN | PTE_BLOCK_UXN |
| 40 | }, { |
York Sun | c7104e5 | 2016-06-24 16:46:22 -0700 | [diff] [blame] | 41 | .virt = 0x80000000UL, |
| 42 | .phys = 0x80000000UL, |
Alexander Graf | 5889e39 | 2016-03-04 01:09:51 +0100 | [diff] [blame] | 43 | .size = 0xff80000000UL, |
| 44 | .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | |
| 45 | PTE_BLOCK_INNER_SHARE |
| 46 | }, { |
| 47 | /* List terminator */ |
| 48 | 0, |
| 49 | } |
| 50 | }; |
| 51 | |
| 52 | struct mm_region *mem_map = vexpress64_mem_map; |
| 53 | |
Ryan Harkin | 8961d50 | 2015-11-18 10:39:06 +0000 | [diff] [blame] | 54 | /* This function gets replaced by platforms supporting PCIe. |
| 55 | * The replacement function, eg. on Juno, initialises the PCIe bus. |
| 56 | */ |
| 57 | __weak void vexpress64_pcie_init(void) |
| 58 | { |
| 59 | } |
| 60 | |
David Feng | 3b5458c | 2013-12-14 11:47:37 +0800 | [diff] [blame] | 61 | int board_init(void) |
| 62 | { |
Liviu Dudau | 8d1fdc3 | 2015-10-19 11:08:32 +0100 | [diff] [blame] | 63 | vexpress64_pcie_init(); |
David Feng | 3b5458c | 2013-12-14 11:47:37 +0800 | [diff] [blame] | 64 | return 0; |
| 65 | } |
| 66 | |
| 67 | int dram_init(void) |
| 68 | { |
David Feng | 3b5458c | 2013-12-14 11:47:37 +0800 | [diff] [blame] | 69 | gd->ram_size = PHYS_SDRAM_1_SIZE; |
| 70 | return 0; |
| 71 | } |
| 72 | |
Simon Glass | 2f949c3 | 2017-03-31 08:40:32 -0600 | [diff] [blame] | 73 | int dram_init_banksize(void) |
Liviu Dudau | 086c977 | 2015-10-19 11:08:31 +0100 | [diff] [blame] | 74 | { |
| 75 | gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
| 76 | gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; |
Ryan Harkin | 98d2fff | 2015-11-18 10:39:07 +0000 | [diff] [blame] | 77 | #ifdef PHYS_SDRAM_2 |
Liviu Dudau | 086c977 | 2015-10-19 11:08:31 +0100 | [diff] [blame] | 78 | gd->bd->bi_dram[1].start = PHYS_SDRAM_2; |
| 79 | gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; |
Ryan Harkin | 98d2fff | 2015-11-18 10:39:07 +0000 | [diff] [blame] | 80 | #endif |
Simon Glass | 2f949c3 | 2017-03-31 08:40:32 -0600 | [diff] [blame] | 81 | |
| 82 | return 0; |
Liviu Dudau | 086c977 | 2015-10-19 11:08:31 +0100 | [diff] [blame] | 83 | } |
| 84 | |
David Feng | 3b5458c | 2013-12-14 11:47:37 +0800 | [diff] [blame] | 85 | /* |
| 86 | * Board specific reset that is system reset. |
| 87 | */ |
| 88 | void reset_cpu(ulong addr) |
| 89 | { |
Darwin Rambo | d32d411 | 2014-06-09 11:12:59 -0700 | [diff] [blame] | 90 | } |
| 91 | |
David Feng | 3b5458c | 2013-12-14 11:47:37 +0800 | [diff] [blame] | 92 | /* |
| 93 | * Board specific ethernet initialization routine. |
| 94 | */ |
| 95 | int board_eth_init(bd_t *bis) |
| 96 | { |
| 97 | int rc = 0; |
| 98 | #ifdef CONFIG_SMC91111 |
| 99 | rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); |
| 100 | #endif |
Linus Walleij | 48b4755 | 2015-02-17 11:35:25 +0100 | [diff] [blame] | 101 | #ifdef CONFIG_SMC911X |
| 102 | rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); |
| 103 | #endif |
David Feng | 3b5458c | 2013-12-14 11:47:37 +0800 | [diff] [blame] | 104 | return rc; |
| 105 | } |