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David Feng3b5458c2013-12-14 11:47:37 +08001/*
2 * (C) Copyright 2013
3 * David Feng <fenghua@phytium.com.cn>
4 * Sharma Bhupesh <bhupesh.sharma@freescale.com>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8#include <common.h>
9#include <malloc.h>
10#include <errno.h>
11#include <netdev.h>
12#include <asm/io.h>
13#include <linux/compiler.h>
David Fengab33c2c2015-01-31 11:55:29 +080014#include <dm/platdata.h>
15#include <dm/platform_data/serial_pl01x.h>
David Feng3b5458c2013-12-14 11:47:37 +080016
17DECLARE_GLOBAL_DATA_PTR;
18
David Fengab33c2c2015-01-31 11:55:29 +080019static const struct pl01x_serial_platdata serial_platdata = {
20 .base = V2M_UART0,
21 .type = TYPE_PL011,
Linus Walleij31e476e2015-04-14 10:01:35 +020022 .clock = CONFIG_PL011_CLOCK,
David Fengab33c2c2015-01-31 11:55:29 +080023};
24
25U_BOOT_DEVICE(vexpress_serials) = {
26 .name = "serial_pl01x",
27 .platdata = &serial_platdata,
28};
29
David Feng3b5458c2013-12-14 11:47:37 +080030int board_init(void)
31{
32 return 0;
33}
34
35int dram_init(void)
36{
David Feng3b5458c2013-12-14 11:47:37 +080037 gd->ram_size = PHYS_SDRAM_1_SIZE;
38 return 0;
39}
40
Liviu Dudau086c9772015-10-19 11:08:31 +010041void dram_init_banksize(void)
42{
43 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
44 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
45 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
46 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
47}
48
David Feng3b5458c2013-12-14 11:47:37 +080049/*
50 * Board specific reset that is system reset.
51 */
52void reset_cpu(ulong addr)
53{
Darwin Rambod32d4112014-06-09 11:12:59 -070054}
55
David Feng3b5458c2013-12-14 11:47:37 +080056/*
57 * Board specific ethernet initialization routine.
58 */
59int board_eth_init(bd_t *bis)
60{
61 int rc = 0;
62#ifdef CONFIG_SMC91111
63 rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
64#endif
Linus Walleij48b47552015-02-17 11:35:25 +010065#ifdef CONFIG_SMC911X
66 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
67#endif
David Feng3b5458c2013-12-14 11:47:37 +080068 return rc;
69}