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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Marek Vasutad43cd32017-07-21 23:15:21 +02002/*
3 * board/renesas/ulcb/ulcb.c
4 * This file is ULCB board support.
5 *
6 * Copyright (C) 2017 Renesas Electronics Corporation
Marek Vasutad43cd32017-07-21 23:15:21 +02007 */
8
9#include <common.h>
Simon Glass2dc9c342020-05-10 11:40:01 -060010#include <image.h>
Simon Glass97589732020-05-10 11:40:02 -060011#include <init.h>
Marek Vasutad43cd32017-07-21 23:15:21 +020012#include <malloc.h>
13#include <netdev.h>
14#include <dm.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060015#include <asm/global_data.h>
Marek Vasutad43cd32017-07-21 23:15:21 +020016#include <dm/platform_data/serial_sh.h>
17#include <asm/processor.h>
18#include <asm/mach-types.h>
19#include <asm/io.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060020#include <linux/bitops.h>
Marek Vasutad43cd32017-07-21 23:15:21 +020021#include <linux/errno.h>
22#include <asm/arch/sys_proto.h>
23#include <asm/gpio.h>
24#include <asm/arch/gpio.h>
25#include <asm/arch/rmobile.h>
26#include <asm/arch/rcar-mstp.h>
27#include <asm/arch/sh_sdhi.h>
28#include <i2c.h>
29#include <mmc.h>
30
31DECLARE_GLOBAL_DATA_PTR;
32
Marek Vasutad43cd32017-07-21 23:15:21 +020033#define DVFS_MSTP926 BIT(26)
Marek Vasutcea5c8f2017-09-12 19:07:22 +020034#define HSUSB_MSTP704 BIT(4) /* HSUSB */
Marek Vasutad43cd32017-07-21 23:15:21 +020035
Marek Vasutad43cd32017-07-21 23:15:21 +020036int board_early_init_f(void)
37{
Tom Rini52b2e262021-08-18 23:12:24 -040038#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
Marek Vasutad43cd32017-07-21 23:15:21 +020039 /* DVFS for reset */
Hiroyuki Yokoyama7e172912018-09-26 16:00:09 +090040 mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
Marek Vasutad43cd32017-07-21 23:15:21 +020041#endif
42 return 0;
43}
44
Marek Vasutcea5c8f2017-09-12 19:07:22 +020045/* HSUSB block registers */
46#define HSUSB_REG_LPSTS 0xE6590102
47#define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14)
48#define HSUSB_REG_UGCTRL2 0xE6590184
49#define HSUSB_REG_UGCTRL2_USB0SEL 0x30
50#define HSUSB_REG_UGCTRL2_USB0SEL_EHCI 0x10
51
Marek Vasutad43cd32017-07-21 23:15:21 +020052int board_init(void)
53{
Marek Vasutad43cd32017-07-21 23:15:21 +020054 /* USB1 pull-up */
55 setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN);
56
Marek Vasutcea5c8f2017-09-12 19:07:22 +020057 /* Configure the HSUSB block */
Hiroyuki Yokoyama7e172912018-09-26 16:00:09 +090058 mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704);
Marek Vasutcea5c8f2017-09-12 19:07:22 +020059 /* Choice USB0SEL */
60 clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL,
61 HSUSB_REG_UGCTRL2_USB0SEL_EHCI);
62 /* low power status */
63 setbits_le16(HSUSB_REG_LPSTS, HSUSB_REG_LPSTS_SUSPM_NORMAL);
64
Marek Vasut7cf1c7f2017-08-20 17:13:48 +020065 return 0;
Marek Vasutad43cd32017-07-21 23:15:21 +020066}
Marek Vasutad43cd32017-07-21 23:15:21 +020067
Marek Vasut4726f062018-12-04 01:44:34 +010068#ifdef CONFIG_MULTI_DTB_FIT
69int board_fit_config_name_match(const char *name)
70{
71 /* PRR driver is not available yet */
72 u32 cpu_type = rmobile_get_cpu_type();
73
74 if ((cpu_type == RMOBILE_CPU_TYPE_R8A7795) &&
Marek Vasutadaa0162020-04-04 16:12:48 +020075 !strcmp(name, "r8a77950-ulcb-u-boot"))
Marek Vasut4726f062018-12-04 01:44:34 +010076 return 0;
77
78 if ((cpu_type == RMOBILE_CPU_TYPE_R8A7796) &&
Marek Vasutadaa0162020-04-04 16:12:48 +020079 !strcmp(name, "r8a77960-ulcb-u-boot"))
Marek Vasut4726f062018-12-04 01:44:34 +010080 return 0;
81
Marek Vasut5d611db2019-03-04 12:34:50 +010082 if ((cpu_type == RMOBILE_CPU_TYPE_R8A77965) &&
Marek Vasutadaa0162020-04-04 16:12:48 +020083 !strcmp(name, "r8a77965-ulcb-u-boot"))
Marek Vasut5d611db2019-03-04 12:34:50 +010084 return 0;
85
Marek Vasut4726f062018-12-04 01:44:34 +010086 return -1;
87}
88#endif