blob: 4553329b250577bd89f1b22942061526f5d18e18 [file] [log] [blame]
Tom Rini8b0c8a12018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01004 */
Patrice Chotard879cde52019-02-12 16:50:40 +01005#include <common.h>
6#include <adc.h>
Patrick Delaunay500401f2019-06-21 15:26:40 +02007#include <bootm.h>
Patrice Chotard204079b2018-08-10 17:12:14 +02008#include <clk.h>
Patrick Delaunay266bf102019-07-30 19:16:44 +02009#include <config.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020010#include <dm.h>
Simon Glassdb229612019-08-01 09:46:42 -060011#include <env.h>
Simon Glass9d1f6192019-08-02 09:44:25 -060012#include <env_internal.h>
Simon Glass2dc9c342020-05-10 11:40:01 -060013#include <fdt_support.h>
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +010014#include <g_dnl.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020015#include <generic-phy.h>
Simon Glassf11478f2019-12-28 10:45:07 -070016#include <hang.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010017#include <i2c.h>
Simon Glassa7b51302019-11-14 12:57:46 -070018#include <init.h>
Patrick Delaunay92dc1022019-02-12 11:44:41 +010019#include <led.h>
Simon Glass0f2af882020-05-10 11:40:05 -060020#include <log.h>
Simon Glass9bc15642020-02-03 07:36:16 -070021#include <malloc.h>
Patrick Delaunay92dc1022019-02-12 11:44:41 +010022#include <misc.h>
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020023#include <mtd_node.h>
Simon Glass274e0b02020-05-10 11:39:56 -060024#include <net.h>
Patrick Delaunaybff66f92019-08-01 11:29:03 +020025#include <netdev.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020026#include <phy.h>
Patrick Delaunayc17d7252019-08-02 15:07:20 +020027#include <remoteproc.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020028#include <reset.h>
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010029#include <syscon.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010030#include <usb.h>
Patrick Delaunayae0931d02019-07-30 19:16:39 +020031#include <watchdog.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020032#include <asm/io.h>
Patrick Delaunayf2a7b872019-02-27 17:01:18 +010033#include <asm/gpio.h>
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010034#include <asm/arch/stm32.h>
Patrice Chotarddad97bf2019-05-02 18:36:01 +020035#include <asm/arch/sys_proto.h>
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020036#include <jffs2/load_kernel.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060037#include <linux/bitops.h>
Simon Glassdbd79542020-05-10 11:40:11 -060038#include <linux/delay.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070039#include <linux/err.h>
Patrick Delaunay181298e2020-04-22 14:29:16 +020040#include <linux/iopoll.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020041#include <power/regulator.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010042#include <usb/dwc2_udc.h>
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010043
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010044/* SYSCFG registers */
45#define SYSCFG_BOOTR 0x00
46#define SYSCFG_PMCSETR 0x04
47#define SYSCFG_IOCTRLSETR 0x18
48#define SYSCFG_ICNR 0x1C
49#define SYSCFG_CMPCR 0x20
50#define SYSCFG_CMPENSETR 0x24
51#define SYSCFG_PMCCLRR 0x44
52
53#define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
54#define SYSCFG_BOOTR_BOOTPD_SHIFT 4
55
56#define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
57#define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
58#define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
59#define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
60#define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
61
62#define SYSCFG_CMPCR_SW_CTRL BIT(1)
63#define SYSCFG_CMPCR_READY BIT(8)
64
65#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
66
67#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
68#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
69
70#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
71
72#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
Christophe Roullier69ac3f52019-05-17 15:08:43 +020073#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
74#define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
75#define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010076
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010077/*
78 * Get a global data pointer
79 */
80DECLARE_GLOBAL_DATA_PTR;
81
Patrice Chotardcded32f2019-04-30 18:09:38 +020082#define USB_LOW_THRESHOLD_UV 200000
Patrice Chotard879cde52019-02-12 16:50:40 +010083#define USB_WARNING_LOW_THRESHOLD_UV 660000
84#define USB_START_LOW_THRESHOLD_UV 1230000
Patrice Chotardcded32f2019-04-30 18:09:38 +020085#define USB_START_HIGH_THRESHOLD_UV 2150000
Patrice Chotard879cde52019-02-12 16:50:40 +010086
Patrick Delaunay92dc1022019-02-12 11:44:41 +010087int checkboard(void)
88{
89 int ret;
90 char *mode;
91 u32 otp;
92 struct udevice *dev;
93 const char *fdt_compat;
94 int fdt_compat_len;
95
Patrick Delaunay472407a2020-03-18 09:22:49 +010096 if (IS_ENABLED(CONFIG_TFABOOT))
Patrick Delaunay92dc1022019-02-12 11:44:41 +010097 mode = "trusted";
98 else
99 mode = "basic";
100
101 printf("Board: stm32mp1 in %s mode", mode);
102 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
103 &fdt_compat_len);
104 if (fdt_compat && fdt_compat_len)
105 printf(" (%s)", fdt_compat);
106 puts("\n");
107
Patrick Delaunay52163d92020-03-24 09:05:00 +0100108 /* display the STMicroelectronics board identification */
Patrick Delaunay0885c232020-02-12 19:37:42 +0100109 if (CONFIG_IS_ENABLED(CMD_STBOARD)) {
110 ret = uclass_get_device_by_driver(UCLASS_MISC,
111 DM_GET_DRIVER(stm32mp_bsec),
112 &dev);
113 if (!ret)
114 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
115 &otp, sizeof(otp));
116 if (ret > 0 && otp)
117 printf("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
118 otp >> 16,
119 (otp >> 12) & 0xF,
120 (otp >> 4) & 0xF,
121 ((otp >> 8) & 0xF) - 1 + 'A',
122 otp & 0xF);
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100123 }
124
125 return 0;
126}
127
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100128static void board_key_check(void)
129{
130#if defined(CONFIG_FASTBOOT) || defined(CONFIG_CMD_STM32PROG)
131 ofnode node;
132 struct gpio_desc gpio;
133 enum forced_boot_mode boot_mode = BOOT_NORMAL;
134
135 node = ofnode_path("/config");
136 if (!ofnode_valid(node)) {
137 debug("%s: no /config node?\n", __func__);
138 return;
139 }
140#ifdef CONFIG_FASTBOOT
141 if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
142 &gpio, GPIOD_IS_IN)) {
143 debug("%s: could not find a /config/st,fastboot-gpios\n",
144 __func__);
145 } else {
146 if (dm_gpio_get_value(&gpio)) {
147 puts("Fastboot key pressed, ");
148 boot_mode = BOOT_FASTBOOT;
149 }
150
151 dm_gpio_free(NULL, &gpio);
152 }
153#endif
154#ifdef CONFIG_CMD_STM32PROG
155 if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
156 &gpio, GPIOD_IS_IN)) {
157 debug("%s: could not find a /config/st,stm32prog-gpios\n",
158 __func__);
159 } else {
160 if (dm_gpio_get_value(&gpio)) {
161 puts("STM32Programmer key pressed, ");
162 boot_mode = BOOT_STM32PROG;
163 }
164 dm_gpio_free(NULL, &gpio);
165 }
166#endif
167
168 if (boot_mode != BOOT_NORMAL) {
169 puts("entering download mode...\n");
170 clrsetbits_le32(TAMP_BOOT_CONTEXT,
171 TAMP_BOOT_FORCED_MASK,
172 boot_mode);
173 }
174#endif
175}
176
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100177#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
Patrice Chotard204079b2018-08-10 17:12:14 +0200178
Patrick Delaunay7f3384d2019-03-29 15:42:24 +0100179/* STMicroelectronics STUSB1600 Type-C controller */
180#define STUSB1600_CC_CONNECTION_STATUS 0x0E
181
182/* STUSB1600_CC_CONNECTION_STATUS bitfields */
183#define STUSB1600_CC_ATTACH BIT(0)
184
185static int stusb1600_init(struct udevice **dev_stusb1600)
186{
187 ofnode node;
188 struct udevice *dev, *bus;
189 int ret;
190 u32 chip_addr;
191
192 *dev_stusb1600 = NULL;
193
194 /* if node stusb1600 is present, means DK1 or DK2 board */
195 node = ofnode_by_compatible(ofnode_null(), "st,stusb1600");
196 if (!ofnode_valid(node))
197 return -ENODEV;
198
199 ret = ofnode_read_u32(node, "reg", &chip_addr);
200 if (ret)
201 return -EINVAL;
202
203 ret = uclass_get_device_by_ofnode(UCLASS_I2C, ofnode_get_parent(node),
204 &bus);
205 if (ret) {
206 printf("bus for stusb1600 not found\n");
207 return -ENODEV;
208 }
209
210 ret = dm_i2c_probe(bus, chip_addr, 0, &dev);
211 if (!ret)
212 *dev_stusb1600 = dev;
213
214 return ret;
215}
216
217static int stusb1600_cable_connected(struct udevice *dev)
218{
219 u8 status;
220
221 if (dm_i2c_read(dev, STUSB1600_CC_CONNECTION_STATUS, &status, 1))
222 return 0;
223
224 return status & STUSB1600_CC_ATTACH;
225}
226
227#include <usb/dwc2_udc.h>
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100228int g_dnl_board_usb_cable_connected(void)
Patrice Chotard204079b2018-08-10 17:12:14 +0200229{
Patrick Delaunay7f3384d2019-03-29 15:42:24 +0100230 struct udevice *stusb1600;
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100231 struct udevice *dwc2_udc_otg;
Patrice Chotard204079b2018-08-10 17:12:14 +0200232 int ret;
233
Patrick Delaunay7f3384d2019-03-29 15:42:24 +0100234 if (!stusb1600_init(&stusb1600))
235 return stusb1600_cable_connected(stusb1600);
236
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100237 ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
238 DM_GET_DRIVER(dwc2_udc_otg),
239 &dwc2_udc_otg);
240 if (!ret)
241 debug("dwc2_udc_otg init failed\n");
Patrice Chotard204079b2018-08-10 17:12:14 +0200242
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100243 return dwc2_udc_B_session_valid(dwc2_udc_otg);
Patrice Chotard879cde52019-02-12 16:50:40 +0100244}
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200245
246#define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11
247#define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb
248
249int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
250{
251 if (!strcmp(name, "usb_dnl_dfu"))
252 put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct);
253 else if (!strcmp(name, "usb_dnl_fastboot"))
254 put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM,
255 &dev->idProduct);
256 else
257 put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
258
259 return 0;
260}
261
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100262#endif /* CONFIG_USB_GADGET */
Patrice Chotard879cde52019-02-12 16:50:40 +0100263
264static int get_led(struct udevice **dev, char *led_string)
265{
266 char *led_name;
267 int ret;
268
269 led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
270 if (!led_name) {
271 pr_debug("%s: could not find %s config string\n",
272 __func__, led_string);
273 return -ENOENT;
274 }
275 ret = led_get_by_label(led_name, dev);
276 if (ret) {
277 debug("%s: get=%d\n", __func__, ret);
278 return ret;
279 }
280
281 return 0;
282}
283
284static int setup_led(enum led_state_t cmd)
285{
286 struct udevice *dev;
287 int ret;
288
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200289 if (!CONFIG_IS_ENABLED(LED))
290 return 0;
291
Patrice Chotard879cde52019-02-12 16:50:40 +0100292 ret = get_led(&dev, "u-boot,boot-led");
293 if (ret)
294 return ret;
295
296 ret = led_set_state(dev, cmd);
Patrice Chotard204079b2018-08-10 17:12:14 +0200297 return ret;
298}
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200299
300static void __maybe_unused led_error_blink(u32 nb_blink)
301{
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200302 int ret;
303 struct udevice *led;
304 u32 i;
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200305
306 if (!nb_blink)
307 return;
308
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200309 if (CONFIG_IS_ENABLED(LED)) {
310 ret = get_led(&led, "u-boot,error-led");
311 if (!ret) {
312 /* make u-boot,error-led blinking */
313 /* if U32_MAX and 125ms interval, for 17.02 years */
314 for (i = 0; i < 2 * nb_blink; i++) {
315 led_set_state(led, LEDST_TOGGLE);
316 mdelay(125);
317 WATCHDOG_RESET();
318 }
319 led_set_state(led, LEDST_ON);
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200320 }
321 }
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200322
323 /* infinite: the boot process must be stopped */
324 if (nb_blink == U32_MAX)
325 hang();
326}
Patrice Chotard204079b2018-08-10 17:12:14 +0200327
Patrick Delaunayf6626e72019-07-30 19:16:43 +0200328#ifdef CONFIG_ADC
Patrice Chotard879cde52019-02-12 16:50:40 +0100329static int board_check_usb_power(void)
330{
331 struct ofnode_phandle_args adc_args;
332 struct udevice *adc;
Patrice Chotard879cde52019-02-12 16:50:40 +0100333 ofnode node;
334 unsigned int raw;
335 int max_uV = 0;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200336 int min_uV = USB_START_HIGH_THRESHOLD_UV;
Patrice Chotard879cde52019-02-12 16:50:40 +0100337 int ret, uV, adc_count;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200338 u32 nb_blink;
339 u8 i;
Patrice Chotard879cde52019-02-12 16:50:40 +0100340 node = ofnode_path("/config");
341 if (!ofnode_valid(node)) {
342 debug("%s: no /config node?\n", __func__);
343 return -ENOENT;
344 }
345
346 /*
347 * Retrieve the ADC channels devices and get measurement
348 * for each of them
349 */
350 adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
351 "#io-channel-cells");
352 if (adc_count < 0) {
353 if (adc_count == -ENOENT)
354 return 0;
355
356 pr_err("%s: can't find adc channel (%d)\n", __func__,
357 adc_count);
358
359 return adc_count;
360 }
361
362 for (i = 0; i < adc_count; i++) {
363 if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
364 "#io-channel-cells", 0, i,
365 &adc_args)) {
366 pr_debug("%s: can't find /config/st,adc_usb_pd\n",
367 __func__);
368 return 0;
369 }
370
371 ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
372 &adc);
373
374 if (ret) {
375 pr_err("%s: Can't get adc device(%d)\n", __func__,
376 ret);
377 return ret;
378 }
379
380 ret = adc_channel_single_shot(adc->name, adc_args.args[0],
381 &raw);
382 if (ret) {
383 pr_err("%s: single shot failed for %s[%d]!\n",
384 __func__, adc->name, adc_args.args[0]);
385 return ret;
386 }
387 /* Convert to uV */
388 if (!adc_raw_to_uV(adc, raw, &uV)) {
389 if (uV > max_uV)
390 max_uV = uV;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200391 if (uV < min_uV)
392 min_uV = uV;
Patrice Chotard879cde52019-02-12 16:50:40 +0100393 pr_debug("%s: %s[%02d] = %u, %d uV\n", __func__,
394 adc->name, adc_args.args[0], raw, uV);
395 } else {
396 pr_err("%s: Can't get uV value for %s[%d]\n",
397 __func__, adc->name, adc_args.args[0]);
398 }
399 }
400
401 /*
402 * If highest value is inside 1.23 Volts and 2.10 Volts, that means
403 * board is plugged on an USB-C 3A power supply and boot process can
404 * continue.
405 */
406 if (max_uV > USB_START_LOW_THRESHOLD_UV &&
Patrice Chotardcded32f2019-04-30 18:09:38 +0200407 max_uV <= USB_START_HIGH_THRESHOLD_UV &&
408 min_uV <= USB_LOW_THRESHOLD_UV)
Patrice Chotard879cde52019-02-12 16:50:40 +0100409 return 0;
410
Patrice Chotardcded32f2019-04-30 18:09:38 +0200411 pr_err("****************************************************\n");
412
413 /*
414 * If highest and lowest value are either both below
415 * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
416 * means USB TYPE-C is in unattached mode, this is an issue, make
417 * u-boot,error-led blinking and stop boot process.
418 */
419 if ((max_uV > USB_LOW_THRESHOLD_UV &&
420 min_uV > USB_LOW_THRESHOLD_UV) ||
421 (max_uV <= USB_LOW_THRESHOLD_UV &&
422 min_uV <= USB_LOW_THRESHOLD_UV)) {
423 pr_err("* ERROR USB TYPE-C connection in unattached mode *\n");
424 pr_err("* Check that USB TYPE-C cable is correctly plugged *\n");
425 /* with 125ms interval, led will blink for 17.02 years ....*/
426 nb_blink = U32_MAX;
427 }
Patrice Chotard879cde52019-02-12 16:50:40 +0100428
Patrice Chotardcded32f2019-04-30 18:09:38 +0200429 if (max_uV > USB_LOW_THRESHOLD_UV &&
430 max_uV <= USB_WARNING_LOW_THRESHOLD_UV &&
431 min_uV <= USB_LOW_THRESHOLD_UV) {
432 pr_err("* WARNING 500mA power supply detected *\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100433 nb_blink = 2;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200434 }
435
436 if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
437 max_uV <= USB_START_LOW_THRESHOLD_UV &&
438 min_uV <= USB_LOW_THRESHOLD_UV) {
Patrice Chotard2d583f92020-04-30 18:41:05 +0200439 pr_err("* WARNING 1.5A power supply detected *\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100440 nb_blink = 3;
441 }
442
Patrice Chotardcded32f2019-04-30 18:09:38 +0200443 /*
444 * If highest value is above 2.15 Volts that means that the USB TypeC
445 * supplies more than 3 Amp, this is not compliant with TypeC specification
446 */
447 if (max_uV > USB_START_HIGH_THRESHOLD_UV) {
448 pr_err("* USB TYPE-C charger not compliant with *\n");
449 pr_err("* specification *\n");
450 pr_err("****************************************************\n\n");
451 /* with 125ms interval, led will blink for 17.02 years ....*/
452 nb_blink = U32_MAX;
453 } else {
454 pr_err("* Current too low, use a 3A power supply! *\n");
455 pr_err("****************************************************\n\n");
456 }
Patrice Chotard879cde52019-02-12 16:50:40 +0100457
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200458 led_error_blink(nb_blink);
Patrice Chotard879cde52019-02-12 16:50:40 +0100459
460 return 0;
461}
Patrick Delaunayf6626e72019-07-30 19:16:43 +0200462#endif /* CONFIG_ADC */
Patrice Chotard879cde52019-02-12 16:50:40 +0100463
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100464static void sysconf_init(void)
465{
Patrick Delaunayf8fe21d2020-04-01 09:07:33 +0200466#ifndef CONFIG_TFABOOT
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100467 u8 *syscfg;
468#ifdef CONFIG_DM_REGULATOR
469 struct udevice *pwr_dev;
470 struct udevice *pwr_reg;
471 struct udevice *dev;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100472 u32 otp = 0;
473#endif
Patrick Delaunay181298e2020-04-22 14:29:16 +0200474 int ret;
475 u32 bootr, val;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100476
477 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
478
479 /* interconnect update : select master using the port 1 */
480 /* LTDC = AXI_M9 */
481 /* GPU = AXI_M8 */
482 /* today information is hardcoded in U-Boot */
483 writel(BIT(9), syscfg + SYSCFG_ICNR);
484
485 /* disable Pull-Down for boot pin connected to VDD */
486 bootr = readl(syscfg + SYSCFG_BOOTR);
487 bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
488 bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
489 writel(bootr, syscfg + SYSCFG_BOOTR);
490
491#ifdef CONFIG_DM_REGULATOR
492 /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
493 * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
494 * The customer will have to disable this for low frequencies
495 * or if AFMUX is selected but the function not used, typically for
496 * TRACE. Otherwise, impact on power consumption.
497 *
498 * WARNING:
499 * enabling High Speed mode while VDD>2.7V
500 * with the OTP product_below_2v5 (OTP 18, BIT 13)
501 * erroneously set to 1 can damage the IC!
502 * => U-Boot set the register only if VDD < 2.7V (in DT)
503 * but this value need to be consistent with board design
504 */
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200505 ret = uclass_get_device_by_driver(UCLASS_PMIC,
506 DM_GET_DRIVER(stm32mp_pwr_pmic),
507 &pwr_dev);
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100508 if (!ret) {
509 ret = uclass_get_device_by_driver(UCLASS_MISC,
510 DM_GET_DRIVER(stm32mp_bsec),
511 &dev);
512 if (ret) {
513 pr_err("Can't find stm32mp_bsec driver\n");
514 return;
515 }
516
517 ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
Patrick Delaunayceb82e32019-08-02 13:08:06 +0200518 if (ret > 0)
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100519 otp = otp & BIT(13);
520
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200521 /* get VDD = vdd-supply */
522 ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100523 &pwr_reg);
524
525 /* check if VDD is Low Voltage */
526 if (!ret) {
527 if (regulator_get_value(pwr_reg) < 2700000) {
528 writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
529 SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
530 SYSCFG_IOCTRLSETR_HSLVEN_ETH |
531 SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
532 SYSCFG_IOCTRLSETR_HSLVEN_SPI,
533 syscfg + SYSCFG_IOCTRLSETR);
534
535 if (!otp)
536 pr_err("product_below_2v5=0: HSLVEN protected by HW\n");
537 } else {
538 if (otp)
539 pr_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
540 }
541 } else {
542 debug("VDD unknown");
543 }
544 }
545#endif
546
547 /* activate automatic I/O compensation
548 * warning: need to ensure CSI enabled and ready in clock driver
549 */
550 writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
551
Patrick Delaunay181298e2020-04-22 14:29:16 +0200552 /* poll until ready (1s timeout) */
553 ret = readl_poll_timeout(syscfg + SYSCFG_CMPCR, val,
554 val & SYSCFG_CMPCR_READY,
555 1000000);
556 if (ret) {
557 pr_err("SYSCFG: I/O compensation failed, timeout.\n");
558 led_error_blink(10);
559 }
560
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100561 clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
562#endif
563}
564
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200565#ifdef CONFIG_DM_REGULATOR
566/* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
567static int dk2_i2c1_fix(void)
568{
569 ofnode node;
570 struct gpio_desc hdmi, audio;
571 int ret = 0;
572
573 node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
574 if (!ofnode_valid(node)) {
575 pr_debug("%s: no hdmi-transmitter@39 ?\n", __func__);
576 return -ENOENT;
577 }
578
579 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
580 &hdmi, GPIOD_IS_OUT)) {
581 pr_debug("%s: could not find reset-gpios\n",
582 __func__);
583 return -ENOENT;
584 }
585
586 node = ofnode_path("/soc/i2c@40012000/cs42l51@4a");
587 if (!ofnode_valid(node)) {
588 pr_debug("%s: no cs42l51@4a ?\n", __func__);
589 return -ENOENT;
590 }
591
592 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
593 &audio, GPIOD_IS_OUT)) {
594 pr_debug("%s: could not find reset-gpios\n",
595 __func__);
596 return -ENOENT;
597 }
598
599 /* before power up, insure that HDMI and AUDIO IC is under reset */
600 ret = dm_gpio_set_value(&hdmi, 1);
601 if (ret) {
602 pr_err("%s: can't set_value for hdmi_nrst gpio", __func__);
603 goto error;
604 }
605 ret = dm_gpio_set_value(&audio, 1);
606 if (ret) {
607 pr_err("%s: can't set_value for audio_nrst gpio", __func__);
608 goto error;
609 }
610
611 /* power-up audio IC */
612 regulator_autoset_by_name("v1v8_audio", NULL);
613
614 /* power-up HDMI IC */
615 regulator_autoset_by_name("v1v2_hdmi", NULL);
616 regulator_autoset_by_name("v3v3_hdmi", NULL);
617
618error:
619 return ret;
620}
621
622static bool board_is_dk2(void)
623{
Patrick Delaunay310aa8a2020-01-13 15:17:42 +0100624 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200625 of_machine_is_compatible("st,stm32mp157c-dk2"))
626 return true;
627
628 return false;
629}
630#endif
631
Patrick Delaunay486ae962020-04-22 14:29:13 +0200632static bool board_is_ev1(void)
633{
634 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
635 (of_machine_is_compatible("st,stm32mp157a-ev1") ||
636 of_machine_is_compatible("st,stm32mp157c-ev1") ||
637 of_machine_is_compatible("st,stm32mp157d-ev1") ||
638 of_machine_is_compatible("st,stm32mp157f-ev1")))
639 return true;
640
641 return false;
642}
643
644/* touchscreen driver: only used for pincontrol configuration */
645static const struct udevice_id goodix_ids[] = {
646 { .compatible = "goodix,gt9147", },
647 { }
648};
649
650U_BOOT_DRIVER(goodix) = {
651 .name = "goodix",
652 .id = UCLASS_NOP,
653 .of_match = goodix_ids,
654};
655
656static void board_ev1_init(void)
657{
658 struct udevice *dev;
659
660 /* configure IRQ line on EV1 for touchscreen before LCD reset */
661 uclass_get_device_by_driver(UCLASS_NOP, DM_GET_DRIVER(goodix), &dev);
662}
663
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100664/* board dependent setup after realloc */
665int board_init(void)
666{
Patrice Chotard972723a2019-03-11 11:13:17 +0100667 struct udevice *dev;
668
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100669 /* address of boot parameters */
670 gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
671
Patrice Chotard972723a2019-03-11 11:13:17 +0100672 /* probe all PINCTRL for hog */
673 for (uclass_first_device(UCLASS_PINCTRL, &dev);
674 dev;
675 uclass_next_device(&dev)) {
676 pr_debug("probe pincontrol = %s\n", dev->name);
677 }
678
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100679 board_key_check();
680
Patrick Delaunay486ae962020-04-22 14:29:13 +0200681 if (board_is_ev1())
682 board_ev1_init();
683
Patrick Delaunay6519e442019-07-05 17:20:09 +0200684#ifdef CONFIG_DM_REGULATOR
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200685 if (board_is_dk2())
686 dk2_i2c1_fix();
687
Patrick Delaunay6519e442019-07-05 17:20:09 +0200688 regulators_enable_boot_on(_DEBUG);
689#endif
690
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100691 sysconf_init();
692
Patrick Delaunay78f68f22020-04-10 19:14:01 +0200693 if (CONFIG_IS_ENABLED(LED))
Patrick Delaunay36e3d112018-07-27 16:37:08 +0200694 led_default_state();
695
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200696 setup_led(LEDST_ON);
697
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100698 return 0;
699}
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100700
701int board_late_init(void)
702{
703#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
704 const void *fdt_compat;
705 int fdt_compat_len;
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200706 int ret;
707 u32 otp;
708 struct udevice *dev;
709 char buf[10];
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100710
711 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
712 &fdt_compat_len);
713 if (fdt_compat && fdt_compat_len) {
Patrick Delaunay4533a2c2020-04-22 14:29:14 +0200714 if (strncmp(fdt_compat, "st,", 3) != 0) {
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100715 env_set("board_name", fdt_compat);
Patrick Delaunay4533a2c2020-04-22 14:29:14 +0200716 } else {
717 char dtb_name[256];
718 int buf_len = sizeof(dtb_name);
719
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100720 env_set("board_name", fdt_compat + 3);
Patrick Delaunay4533a2c2020-04-22 14:29:14 +0200721
722 strncpy(dtb_name, fdt_compat + 3, buf_len);
723 buf_len -= strlen(fdt_compat + 3);
724 strncat(dtb_name, ".dtb", buf_len);
725 env_set("fdtfile", dtb_name);
726 }
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100727 }
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200728 ret = uclass_get_device_by_driver(UCLASS_MISC,
729 DM_GET_DRIVER(stm32mp_bsec),
730 &dev);
731
732 if (!ret)
733 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
734 &otp, sizeof(otp));
735 if (!ret && otp) {
736 snprintf(buf, sizeof(buf), "0x%04x", otp >> 16);
737 env_set("board_id", buf);
738
739 snprintf(buf, sizeof(buf), "0x%04x",
740 ((otp >> 8) & 0xF) - 1 + 0xA);
741 env_set("board_rev", buf);
742 }
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100743#endif
744
Patrick Delaunayf6626e72019-07-30 19:16:43 +0200745#ifdef CONFIG_ADC
Patrice Chotard879cde52019-02-12 16:50:40 +0100746 /* for DK1/DK2 boards */
747 board_check_usb_power();
Patrick Delaunayf6626e72019-07-30 19:16:43 +0200748#endif /* CONFIG_ADC */
Patrice Chotard879cde52019-02-12 16:50:40 +0100749
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100750 return 0;
751}
Patrice Chotard879cde52019-02-12 16:50:40 +0100752
753void board_quiesce_devices(void)
754{
755 setup_led(LEDST_OFF);
756}
Patrice Chotard41443cf2019-05-02 18:07:14 +0200757
Patrick Delaunaybff66f92019-08-01 11:29:03 +0200758/* eth init function : weak called in eqos driver */
759int board_interface_eth_init(struct udevice *dev,
760 phy_interface_t interface_type)
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200761{
762 u8 *syscfg;
763 u32 value;
Patrick Delaunaybff66f92019-08-01 11:29:03 +0200764 bool eth_clk_sel_reg = false;
765 bool eth_ref_clk_sel_reg = false;
766
767 /* Gigabit Ethernet 125MHz clock selection. */
768 eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
769
770 /* Ethernet 50Mhz RMII clock selection */
771 eth_ref_clk_sel_reg =
772 dev_read_bool(dev, "st,eth_ref_clk_sel");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200773
774 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
775
776 if (!syscfg)
777 return -ENODEV;
778
779 switch (interface_type) {
780 case PHY_INTERFACE_MODE_MII:
781 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
782 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
783 debug("%s: PHY_INTERFACE_MODE_MII\n", __func__);
784 break;
785 case PHY_INTERFACE_MODE_GMII:
786 if (eth_clk_sel_reg)
787 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
788 SYSCFG_PMCSETR_ETH_CLK_SEL;
789 else
790 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
791 debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__);
792 break;
793 case PHY_INTERFACE_MODE_RMII:
794 if (eth_ref_clk_sel_reg)
795 value = SYSCFG_PMCSETR_ETH_SEL_RMII |
796 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
797 else
798 value = SYSCFG_PMCSETR_ETH_SEL_RMII;
799 debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__);
800 break;
801 case PHY_INTERFACE_MODE_RGMII:
802 case PHY_INTERFACE_MODE_RGMII_ID:
803 case PHY_INTERFACE_MODE_RGMII_RXID:
804 case PHY_INTERFACE_MODE_RGMII_TXID:
805 if (eth_clk_sel_reg)
806 value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
807 SYSCFG_PMCSETR_ETH_CLK_SEL;
808 else
809 value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
810 debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__);
811 break;
812 default:
813 debug("%s: Do not manage %d interface\n",
814 __func__, interface_type);
815 /* Do not manage others interfaces */
816 return -EINVAL;
817 }
818
819 /* clear and set ETH configuration bits */
820 writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
821 SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
822 syscfg + SYSCFG_PMCCLRR);
823 writel(value, syscfg + SYSCFG_PMCSETR);
824
825 return 0;
826}
827
Patrice Chotard34320372019-05-02 18:28:05 +0200828enum env_location env_get_location(enum env_operation op, int prio)
829{
830 u32 bootmode = get_bootmode();
831
832 if (prio)
833 return ENVL_UNKNOWN;
834
835 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
836#ifdef CONFIG_ENV_IS_IN_EXT4
837 case BOOT_FLASH_SD:
838 case BOOT_FLASH_EMMC:
839 return ENVL_EXT4;
840#endif
841#ifdef CONFIG_ENV_IS_IN_UBI
842 case BOOT_FLASH_NAND:
Patrick Delaunayb5a7ca22020-03-18 09:22:52 +0100843 case BOOT_FLASH_SPINAND:
Patrice Chotard34320372019-05-02 18:28:05 +0200844 return ENVL_UBI;
845#endif
Patrice Chotard2c461ec2019-05-09 14:25:36 +0200846#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
847 case BOOT_FLASH_NOR:
848 return ENVL_SPI_FLASH;
849#endif
Patrice Chotard34320372019-05-02 18:28:05 +0200850 default:
851 return ENVL_NOWHERE;
852 }
853}
854
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200855#if defined(CONFIG_ENV_IS_IN_EXT4)
856const char *env_ext4_get_intf(void)
857{
858 u32 bootmode = get_bootmode();
859
860 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
861 case BOOT_FLASH_SD:
862 case BOOT_FLASH_EMMC:
863 return "mmc";
864 default:
865 return "";
866 }
867}
868
869const char *env_ext4_get_dev_part(void)
870{
871 static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
872 u32 bootmode = get_bootmode();
873
874 return dev_part[(bootmode & TAMP_BOOT_INSTANCE_MASK) - 1];
875}
876#endif
877
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200878#if defined(CONFIG_OF_BOARD_SETUP)
879int ft_board_setup(void *blob, bd_t *bd)
880{
881#ifdef CONFIG_FDT_FIXUP_PARTITIONS
882 struct node_info nodes[] = {
883 { "st,stm32f469-qspi", MTD_DEV_TYPE_NOR, },
Patrick Delaunayb5a7ca22020-03-18 09:22:52 +0100884 { "st,stm32f469-qspi", MTD_DEV_TYPE_SPINAND},
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200885 { "st,stm32mp15-fmc2", MTD_DEV_TYPE_NAND, },
886 };
887 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
888#endif
889
890 return 0;
891}
892#endif
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200893
894static void board_copro_image_process(ulong fw_image, size_t fw_size)
895{
896 int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
897
898 if (!rproc_is_initialized())
899 if (rproc_init()) {
900 printf("Remote Processor %d initialization failed\n",
901 id);
902 return;
903 }
904
905 ret = rproc_load(id, fw_image, fw_size);
906 printf("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
907 id, fw_image, fw_size, ret ? " Failed!" : " Success!");
908
Fabien Dessennead6cc942019-10-30 14:38:32 +0100909 if (!ret)
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200910 rproc_start(id);
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200911}
912
913U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);